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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Catalin Marinas:

- Allow CPUs affected by erratum 1418040 to come online late
(previously we only fixed the other case - CPUs not affected by the
erratum coming up late).

- Fix branch offset in BPF JIT.

- Defer the stolen time initialisation to the CPU online time from the
CPU starting time to avoid a (sleep-able) memory allocation in an
atomic context.

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: paravirt: Initialize steal time when cpu is online
arm64: bpf: Fix branch offset in JIT
arm64: Allow CPUs unffected by ARM erratum 1418040 to come in late

+52 -26
+6 -2
arch/arm64/kernel/cpu_errata.c
··· 910 910 .desc = "ARM erratum 1418040", 911 911 .capability = ARM64_WORKAROUND_1418040, 912 912 ERRATA_MIDR_RANGE_LIST(erratum_1418040_list), 913 - .type = (ARM64_CPUCAP_SCOPE_LOCAL_CPU | 914 - ARM64_CPUCAP_PERMITTED_FOR_LATE_CPU), 913 + /* 914 + * We need to allow affected CPUs to come in late, but 915 + * also need the non-affected CPUs to be able to come 916 + * in at any point in time. Wonderful. 917 + */ 918 + .type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE, 915 919 }, 916 920 #endif 917 921 #ifdef CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT
+15 -11
arch/arm64/kernel/paravirt.c
··· 50 50 struct pv_time_stolen_time_region *reg; 51 51 52 52 reg = per_cpu_ptr(&stolen_time_region, cpu); 53 - if (!reg->kaddr) { 54 - pr_warn_once("stolen time enabled but not configured for cpu %d\n", 55 - cpu); 53 + 54 + /* 55 + * paravirt_steal_clock() may be called before the CPU 56 + * online notification callback runs. Until the callback 57 + * has run we just return zero. 58 + */ 59 + if (!reg->kaddr) 56 60 return 0; 57 - } 58 61 59 62 return le64_to_cpu(READ_ONCE(reg->kaddr->stolen_time)); 60 63 } 61 64 62 - static int stolen_time_dying_cpu(unsigned int cpu) 65 + static int stolen_time_cpu_down_prepare(unsigned int cpu) 63 66 { 64 67 struct pv_time_stolen_time_region *reg; 65 68 ··· 76 73 return 0; 77 74 } 78 75 79 - static int init_stolen_time_cpu(unsigned int cpu) 76 + static int stolen_time_cpu_online(unsigned int cpu) 80 77 { 81 78 struct pv_time_stolen_time_region *reg; 82 79 struct arm_smccc_res res; ··· 106 103 return 0; 107 104 } 108 105 109 - static int pv_time_init_stolen_time(void) 106 + static int __init pv_time_init_stolen_time(void) 110 107 { 111 108 int ret; 112 109 113 - ret = cpuhp_setup_state(CPUHP_AP_ARM_KVMPV_STARTING, 114 - "hypervisor/arm/pvtime:starting", 115 - init_stolen_time_cpu, stolen_time_dying_cpu); 110 + ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, 111 + "hypervisor/arm/pvtime:online", 112 + stolen_time_cpu_online, 113 + stolen_time_cpu_down_prepare); 116 114 if (ret < 0) 117 115 return ret; 118 116 return 0; 119 117 } 120 118 121 - static bool has_pv_steal_clock(void) 119 + static bool __init has_pv_steal_clock(void) 122 120 { 123 121 struct arm_smccc_res res; 124 122
+31 -12
arch/arm64/net/bpf_jit_comp.c
··· 143 143 } 144 144 } 145 145 146 - static inline int bpf2a64_offset(int bpf_to, int bpf_from, 146 + static inline int bpf2a64_offset(int bpf_insn, int off, 147 147 const struct jit_ctx *ctx) 148 148 { 149 - int to = ctx->offset[bpf_to]; 150 - /* -1 to account for the Branch instruction */ 151 - int from = ctx->offset[bpf_from] - 1; 152 - 153 - return to - from; 149 + /* BPF JMP offset is relative to the next instruction */ 150 + bpf_insn++; 151 + /* 152 + * Whereas arm64 branch instructions encode the offset 153 + * from the branch itself, so we must subtract 1 from the 154 + * instruction offset. 155 + */ 156 + return ctx->offset[bpf_insn + off] - (ctx->offset[bpf_insn] - 1); 154 157 } 155 158 156 159 static void jit_fill_hole(void *area, unsigned int size) ··· 645 642 646 643 /* JUMP off */ 647 644 case BPF_JMP | BPF_JA: 648 - jmp_offset = bpf2a64_offset(i + off, i, ctx); 645 + jmp_offset = bpf2a64_offset(i, off, ctx); 649 646 check_imm26(jmp_offset); 650 647 emit(A64_B(jmp_offset), ctx); 651 648 break; ··· 672 669 case BPF_JMP32 | BPF_JSLE | BPF_X: 673 670 emit(A64_CMP(is64, dst, src), ctx); 674 671 emit_cond_jmp: 675 - jmp_offset = bpf2a64_offset(i + off, i, ctx); 672 + jmp_offset = bpf2a64_offset(i, off, ctx); 676 673 check_imm19(jmp_offset); 677 674 switch (BPF_OP(code)) { 678 675 case BPF_JEQ: ··· 911 908 const struct bpf_prog *prog = ctx->prog; 912 909 int i; 913 910 911 + /* 912 + * - offset[0] offset of the end of prologue, 913 + * start of the 1st instruction. 914 + * - offset[1] - offset of the end of 1st instruction, 915 + * start of the 2nd instruction 916 + * [....] 917 + * - offset[3] - offset of the end of 3rd instruction, 918 + * start of 4th instruction 919 + */ 914 920 for (i = 0; i < prog->len; i++) { 915 921 const struct bpf_insn *insn = &prog->insnsi[i]; 916 922 int ret; 917 923 924 + if (ctx->image == NULL) 925 + ctx->offset[i] = ctx->idx; 918 926 ret = build_insn(insn, ctx, extra_pass); 919 927 if (ret > 0) { 920 928 i++; ··· 933 919 ctx->offset[i] = ctx->idx; 934 920 continue; 935 921 } 936 - if (ctx->image == NULL) 937 - ctx->offset[i] = ctx->idx; 938 922 if (ret) 939 923 return ret; 940 924 } 925 + /* 926 + * offset is allocated with prog->len + 1 so fill in 927 + * the last element with the offset after the last 928 + * instruction (end of program) 929 + */ 930 + if (ctx->image == NULL) 931 + ctx->offset[i] = ctx->idx; 941 932 942 933 return 0; 943 934 } ··· 1021 1002 memset(&ctx, 0, sizeof(ctx)); 1022 1003 ctx.prog = prog; 1023 1004 1024 - ctx.offset = kcalloc(prog->len, sizeof(int), GFP_KERNEL); 1005 + ctx.offset = kcalloc(prog->len + 1, sizeof(int), GFP_KERNEL); 1025 1006 if (ctx.offset == NULL) { 1026 1007 prog = orig_prog; 1027 1008 goto out_off; ··· 1108 1089 prog->jited_len = prog_size; 1109 1090 1110 1091 if (!prog->is_func || extra_pass) { 1111 - bpf_prog_fill_jited_linfo(prog, ctx.offset); 1092 + bpf_prog_fill_jited_linfo(prog, ctx.offset + 1); 1112 1093 out_off: 1113 1094 kfree(ctx.offset); 1114 1095 kfree(jit_data);
-1
include/linux/cpuhotplug.h
··· 142 142 /* Must be the last timer callback */ 143 143 CPUHP_AP_DUMMY_TIMER_STARTING, 144 144 CPUHP_AP_ARM_XEN_STARTING, 145 - CPUHP_AP_ARM_KVMPV_STARTING, 146 145 CPUHP_AP_ARM_CORESIGHT_STARTING, 147 146 CPUHP_AP_ARM_CORESIGHT_CTI_STARTING, 148 147 CPUHP_AP_ARM64_ISNDEP_STARTING,