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Merge git://git.infradead.org/mtd-2.6

* git://git.infradead.org/mtd-2.6:
mtd: nand: Fix probe of Samsung NAND chips
mtd: nand: Fix regression in BBM detection
pxa3xx: fix ns2cycle equation

+5 -8
+4 -7
drivers/mtd/nand/nand_base.c
··· 2866 2866 */ 2867 2867 if (id_data[0] == id_data[6] && id_data[1] == id_data[7] && 2868 2868 id_data[0] == NAND_MFR_SAMSUNG && 2869 + (chip->cellinfo & NAND_CI_CELLTYPE_MSK) && 2869 2870 id_data[5] != 0x00) { 2870 2871 /* Calc pagesize */ 2871 2872 mtd->writesize = 2048 << (extid & 0x03); ··· 2935 2934 chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32)) + 32 - 1; 2936 2935 2937 2936 /* Set the bad block position */ 2938 - if (!(busw & NAND_BUSWIDTH_16) && (*maf_id == NAND_MFR_STMICRO || 2939 - (*maf_id == NAND_MFR_SAMSUNG && 2940 - mtd->writesize == 512) || 2941 - *maf_id == NAND_MFR_AMD)) 2942 - chip->badblockpos = NAND_SMALL_BADBLOCK_POS; 2943 - else 2937 + if (mtd->writesize > 512 || (busw & NAND_BUSWIDTH_16)) 2944 2938 chip->badblockpos = NAND_LARGE_BADBLOCK_POS; 2945 - 2939 + else 2940 + chip->badblockpos = NAND_SMALL_BADBLOCK_POS; 2946 2941 2947 2942 /* Get chip options, preserve non chip based options */ 2948 2943 chip->options &= ~NAND_CHIPOPTIONS_MSK;
+1 -1
drivers/mtd/nand/pxa3xx_nand.c
··· 363 363 #define tAR_NDTR1(r) (((r) >> 0) & 0xf) 364 364 365 365 /* convert nano-seconds to nand flash controller clock cycles */ 366 - #define ns2cycle(ns, clk) (int)(((ns) * (clk / 1000000) / 1000) - 1) 366 + #define ns2cycle(ns, clk) (int)((ns) * (clk / 1000000) / 1000) 367 367 368 368 /* convert nand flash controller clock cycles to nano-seconds */ 369 369 #define cycle2ns(c, clk) ((((c) + 1) * 1000000 + clk / 500) / (clk / 1000))