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iio: adc: ad4080: prepare driver for multi-part support

Refactor the ad4080 driver to support multiple ADC variants with
different resolution bits and LVDS CNV clock count maximums.

Changes:
- Add lvds_cnv_clk_cnt_max field to chip_info structure
- Create AD4080_CHANNEL_DEFINE macro for variable resolution/storage bits
- Make LVDS CNV clock count configurable per chip variant
- Use chip_info->product_id for chip identification comparison

This prepares the infrastructure for adding support for additional
ADC parts with different specifications while maintaining backward
compatibility with existing AD4080 functionality.

Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

authored by

Antoniu Miclaus and committed by
Jonathan Cameron 69ca4df3 b66cddc8

+23 -19
+23 -19
drivers/iio/adc/ad4080.c
··· 167 167 const unsigned int (*scale_table)[2]; 168 168 const struct iio_chan_spec *channels; 169 169 unsigned int num_channels; 170 + unsigned int lvds_cnv_clk_cnt_max; 170 171 }; 171 172 172 173 struct ad4080_state { ··· 415 414 { } 416 415 }; 417 416 418 - static const struct iio_chan_spec ad4080_channel = { 419 - .type = IIO_VOLTAGE, 420 - .indexed = 1, 421 - .channel = 0, 422 - .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE), 423 - .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) | 424 - BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 425 - .info_mask_shared_by_all_available = 426 - BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 427 - .ext_info = ad4080_ext_info, 428 - .scan_index = 0, 429 - .scan_type = { 430 - .sign = 's', 431 - .realbits = 20, 432 - .storagebits = 32, 433 - }, 434 - }; 417 + #define AD4080_CHANNEL_DEFINE(bits, storage) { \ 418 + .type = IIO_VOLTAGE, \ 419 + .indexed = 1, \ 420 + .channel = 0, \ 421 + .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE), \ 422 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ 423 + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ 424 + .info_mask_shared_by_all_available = \ 425 + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ 426 + .ext_info = ad4080_ext_info, \ 427 + .scan_index = 0, \ 428 + .scan_type = { \ 429 + .sign = 's', \ 430 + .realbits = (bits), \ 431 + .storagebits = (storage), \ 432 + }, \ 433 + } 434 + 435 + static const struct iio_chan_spec ad4080_channel = AD4080_CHANNEL_DEFINE(20, 32); 435 436 436 437 static const struct ad4080_chip_info ad4080_chip_info = { 437 438 .name = "ad4080", ··· 442 439 .num_scales = ARRAY_SIZE(ad4080_scale_table), 443 440 .num_channels = 1, 444 441 .channels = &ad4080_channel, 442 + .lvds_cnv_clk_cnt_max = AD4080_LVDS_CNV_CLK_CNT_MAX, 445 443 }; 446 444 447 445 static int ad4080_setup(struct iio_dev *indio_dev) ··· 469 465 return ret; 470 466 471 467 id = le16_to_cpu(id_le); 472 - if (id != AD4080_CHIP_ID) 468 + if (id != st->info->product_id) 473 469 dev_info(dev, "Unrecognized CHIP_ID 0x%X\n", id); 474 470 475 471 ret = regmap_set_bits(st->regmap, AD4080_REG_GPIO_CONFIG_A, ··· 495 491 AD4080_REG_ADC_DATA_INTF_CONFIG_B, 496 492 AD4080_ADC_DATA_INTF_CONFIG_B_LVDS_CNV_CLK_CNT_MSK, 497 493 FIELD_PREP(AD4080_ADC_DATA_INTF_CONFIG_B_LVDS_CNV_CLK_CNT_MSK, 498 - AD4080_LVDS_CNV_CLK_CNT_MAX)); 494 + st->info->lvds_cnv_clk_cnt_max)); 499 495 if (ret) 500 496 return ret; 501 497