tjh.dev / kernel
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drm/msm/dpu: Support YUV formats on writeback for DPU 5.x+

Now that CDM_0 has been enabled for DPU 5.x+, add support for YUV formats
on writeback

Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/641270/
Signed-off-by: Rob Clark <robdclark@chromium.org>

authored by

Jessica Zhang and committed by
Rob Clark 69d02730 e79751f6

+24 -24
+2 -2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
··· 343 343 .name = "wb_2", .id = WB_2, 344 344 .base = 0x65000, .len = 0x2c8, 345 345 .features = WB_SM8250_MASK, 346 - .format_list = wb2_formats_rgb, 347 - .num_formats = ARRAY_SIZE(wb2_formats_rgb), 346 + .format_list = wb2_formats_rgb_yuv, 347 + .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv), 348 348 .xin_id = 6, 349 349 .vbif_idx = VBIF_RT, 350 350 .maxlinewidth = 4096,
+2 -2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
··· 298 298 .name = "wb_2", .id = WB_2, 299 299 .base = 0x65000, .len = 0x2c8, 300 300 .features = WB_SM8250_MASK, 301 - .format_list = wb2_formats_rgb, 302 - .num_formats = ARRAY_SIZE(wb2_formats_rgb), 301 + .format_list = wb2_formats_rgb_yuv, 302 + .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv), 303 303 .clk_ctrl = DPU_CLK_CTRL_WB2, 304 304 .xin_id = 6, 305 305 .vbif_idx = VBIF_RT,
+2 -2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
··· 305 305 .name = "wb_2", .id = WB_2, 306 306 .base = 0x65000, .len = 0x2c8, 307 307 .features = WB_SM8250_MASK, 308 - .format_list = wb2_formats_rgb, 309 - .num_formats = ARRAY_SIZE(wb2_formats_rgb), 308 + .format_list = wb2_formats_rgb_yuv, 309 + .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv), 310 310 .clk_ctrl = DPU_CLK_CTRL_WB2, 311 311 .xin_id = 6, 312 312 .vbif_idx = VBIF_RT,
+2 -2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
··· 261 261 .name = "wb_2", .id = WB_2, 262 262 .base = 0x65000, .len = 0x2c8, 263 263 .features = WB_SM8250_MASK, 264 - .format_list = wb2_formats_rgb, 265 - .num_formats = ARRAY_SIZE(wb2_formats_rgb), 264 + .format_list = wb2_formats_rgb_yuv, 265 + .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv), 266 266 .clk_ctrl = DPU_CLK_CTRL_WB2, 267 267 .xin_id = 6, 268 268 .vbif_idx = VBIF_RT,
+2 -2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h
··· 168 168 .name = "wb_2", .id = WB_2, 169 169 .base = 0x65000, .len = 0x2c8, 170 170 .features = WB_SM8250_MASK, 171 - .format_list = wb2_formats_rgb, 172 - .num_formats = ARRAY_SIZE(wb2_formats_rgb), 171 + .format_list = wb2_formats_rgb_yuv, 172 + .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv), 173 173 .clk_ctrl = DPU_CLK_CTRL_WB2, 174 174 .xin_id = 6, 175 175 .vbif_idx = VBIF_RT,
+2 -2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
··· 145 145 .name = "wb_2", .id = WB_2, 146 146 .base = 0x65000, .len = 0x2c8, 147 147 .features = WB_SM8250_MASK, 148 - .format_list = wb2_formats_rgb, 149 - .num_formats = ARRAY_SIZE(wb2_formats_rgb), 148 + .format_list = wb2_formats_rgb_yuv, 149 + .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv), 150 150 .clk_ctrl = DPU_CLK_CTRL_WB2, 151 151 .xin_id = 6, 152 152 .vbif_idx = VBIF_RT,
+2 -2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
··· 157 157 .name = "wb_2", .id = WB_2, 158 158 .base = 0x65000, .len = 0x2c8, 159 159 .features = WB_SM8250_MASK, 160 - .format_list = wb2_formats_rgb, 161 - .num_formats = ARRAY_SIZE(wb2_formats_rgb), 160 + .format_list = wb2_formats_rgb_yuv, 161 + .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv), 162 162 .clk_ctrl = DPU_CLK_CTRL_WB2, 163 163 .xin_id = 6, 164 164 .vbif_idx = VBIF_RT,
+2 -2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
··· 151 151 .name = "wb_2", .id = WB_2, 152 152 .base = 0x65000, .len = 0x2c8, 153 153 .features = WB_SM8250_MASK, 154 - .format_list = wb2_formats_rgb, 155 - .num_formats = ARRAY_SIZE(wb2_formats_rgb), 154 + .format_list = wb2_formats_rgb_yuv, 155 + .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv), 156 156 .clk_ctrl = DPU_CLK_CTRL_WB2, 157 157 .xin_id = 6, 158 158 .vbif_idx = VBIF_RT,
+2 -2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
··· 305 305 .name = "wb_2", .id = WB_2, 306 306 .base = 0x65000, .len = 0x2c8, 307 307 .features = WB_SM8250_MASK, 308 - .format_list = wb2_formats_rgb, 309 - .num_formats = ARRAY_SIZE(wb2_formats_rgb), 308 + .format_list = wb2_formats_rgb_yuv, 309 + .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv), 310 310 .clk_ctrl = DPU_CLK_CTRL_WB2, 311 311 .xin_id = 6, 312 312 .vbif_idx = VBIF_RT,
+2 -2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
··· 321 321 .name = "wb_2", .id = WB_2, 322 322 .base = 0x65000, .len = 0x2c8, 323 323 .features = WB_SM8250_MASK, 324 - .format_list = wb2_formats_rgb, 325 - .num_formats = ARRAY_SIZE(wb2_formats_rgb), 324 + .format_list = wb2_formats_rgb_yuv, 325 + .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv), 326 326 .clk_ctrl = DPU_CLK_CTRL_WB2, 327 327 .xin_id = 6, 328 328 .vbif_idx = VBIF_RT,
+2 -2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
··· 317 317 .name = "wb_2", .id = WB_2, 318 318 .base = 0x65000, .len = 0x2c8, 319 319 .features = WB_SM8250_MASK, 320 - .format_list = wb2_formats_rgb, 321 - .num_formats = ARRAY_SIZE(wb2_formats_rgb), 320 + .format_list = wb2_formats_rgb_yuv, 321 + .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv), 322 322 .xin_id = 6, 323 323 .vbif_idx = VBIF_RT, 324 324 .maxlinewidth = 4096,
+2 -2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h
··· 317 317 .name = "wb_2", .id = WB_2, 318 318 .base = 0x65000, .len = 0x2c8, 319 319 .features = WB_SM8250_MASK, 320 - .format_list = wb2_formats_rgb, 321 - .num_formats = ARRAY_SIZE(wb2_formats_rgb), 320 + .format_list = wb2_formats_rgb_yuv, 321 + .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv), 322 322 .xin_id = 6, 323 323 .vbif_idx = VBIF_RT, 324 324 .maxlinewidth = 4096,