net: phy: mediatek: add Airoha PHY ID to SoC driver

Airoha AN7581 SoC ship with a Switch based on the MT753x Switch embedded
in other SoC like the MT7581 and the MT7988. Similar to these they
require configuring some pin to enable LED PHYs.

Add support for the PHY ID for the Airoha embedded Switch and define a
simple probe function to toggle these pins. Also fill the LED functions
and add dedicated function to define LED polarity.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Link: https://patch.msgid.link/20250410100410.348-2-ansuelsmth@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

authored by

Christian Marangi and committed by

Jakub Kicinski 1 year ago 6a325aed e5566162

+65 -1

2 changed files

expand all

drivers

net

phy

mediatek

Kconfig

mtk-ge-soc.c

+3 -1

drivers/net/phy/mediatek/Kconfig

··· 15 15 16 16 config MEDIATEK_GE_SOC_PHY 17 17 tristate "MediaTek SoC Ethernet PHYs" 18 - depends on (ARM64 && ARCH_MEDIATEK && NVMEM_MTK_EFUSE) || COMPILE_TEST 18 + depends on ARM64 || COMPILE_TEST 19 + depends on ARCH_AIROHA || (ARCH_MEDIATEK && NVMEM_MTK_EFUSE) || \ 20 + COMPILE_TEST 19 21 select MTK_NET_PHYLIB 20 22 help 21 23 Supports MediaTek SoC built-in Gigabit Ethernet PHYs.

+62

drivers/net/phy/mediatek/mtk-ge-soc.c

··· 11 11 #include "../phylib.h" 12 12 #include "mtk.h" 13 13 14 + #define MTK_PHY_MAX_LEDS 2 15 + 14 16 #define MTK_GPHY_ID_MT7981 0x03a29461 15 17 #define MTK_GPHY_ID_MT7988 0x03a29481 18 + #define MTK_GPHY_ID_AN7581 0x03a294c1 16 19 17 20 #define MTK_EXT_PAGE_ACCESS 0x1f 18 21 #define MTK_PHY_PAGE_STANDARD 0x0000 ··· 1409 1406 return mt798x_phy_calibration(phydev); 1410 1407 } 1411 1408 1409 + static int an7581_phy_probe(struct phy_device *phydev) 1410 + { 1411 + struct mtk_socphy_priv *priv; 1412 + struct pinctrl *pinctrl; 1413 + 1414 + /* Toggle pinctrl to enable PHY LED */ 1415 + pinctrl = devm_pinctrl_get_select(&phydev->mdio.dev, "gbe-led"); 1416 + if (IS_ERR(pinctrl)) 1417 + dev_err(&phydev->mdio.bus->dev, 1418 + "Failed to setup PHY LED pinctrl\n"); 1419 + 1420 + priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); 1421 + if (!priv) 1422 + return -ENOMEM; 1423 + 1424 + phydev->priv = priv; 1425 + 1426 + return 0; 1427 + } 1428 + 1429 + static int an7581_phy_led_polarity_set(struct phy_device *phydev, int index, 1430 + unsigned long modes) 1431 + { 1432 + u32 mode; 1433 + u16 val; 1434 + 1435 + if (index >= MTK_PHY_MAX_LEDS) 1436 + return -EINVAL; 1437 + 1438 + for_each_set_bit(mode, &modes, __PHY_LED_MODES_NUM) { 1439 + switch (mode) { 1440 + case PHY_LED_ACTIVE_LOW: 1441 + val = MTK_PHY_LED_ON_POLARITY; 1442 + break; 1443 + case PHY_LED_ACTIVE_HIGH: 1444 + val = 0; 1445 + break; 1446 + default: 1447 + return -EINVAL; 1448 + } 1449 + } 1450 + 1451 + return phy_modify_mmd(phydev, MDIO_MMD_VEND2, index ? 1452 + MTK_PHY_LED1_ON_CTRL : MTK_PHY_LED0_ON_CTRL, 1453 + MTK_PHY_LED_ON_POLARITY, val); 1454 + } 1455 + 1412 1456 static struct phy_driver mtk_socphy_driver[] = { 1413 1457 { 1414 1458 PHY_ID_MATCH_EXACT(MTK_GPHY_ID_MT7981), ··· 1491 1441 .led_hw_control_set = mt798x_phy_led_hw_control_set, 1492 1442 .led_hw_control_get = mt798x_phy_led_hw_control_get, 1493 1443 }, 1444 + { 1445 + PHY_ID_MATCH_EXACT(MTK_GPHY_ID_AN7581), 1446 + .name = "Airoha AN7581 PHY", 1447 + .probe = an7581_phy_probe, 1448 + .led_blink_set = mt798x_phy_led_blink_set, 1449 + .led_brightness_set = mt798x_phy_led_brightness_set, 1450 + .led_hw_is_supported = mt798x_phy_led_hw_is_supported, 1451 + .led_hw_control_set = mt798x_phy_led_hw_control_set, 1452 + .led_hw_control_get = mt798x_phy_led_hw_control_get, 1453 + .led_polarity_set = an7581_phy_led_polarity_set, 1454 + }, 1494 1455 }; 1495 1456 1496 1457 module_phy_driver(mtk_socphy_driver); ··· 1509 1448 static const struct mdio_device_id __maybe_unused mtk_socphy_tbl[] = { 1510 1449 { PHY_ID_MATCH_EXACT(MTK_GPHY_ID_MT7981) }, 1511 1450 { PHY_ID_MATCH_EXACT(MTK_GPHY_ID_MT7988) }, 1451 + { PHY_ID_MATCH_EXACT(MTK_GPHY_ID_AN7581) }, 1512 1452 { } 1513 1453 }; 1514 1454

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