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dt-bindings: usb: dwc3: Move Amlogic G12A DWC3 Glue Bindings to YAML schemas

Now that we have the DT validation in place, let's convert the device tree
bindings for the Amlogic G12A DWC3 Glue Bindings over to a YAML schemas,
the AXG and GXL glue bindings will be converted later.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
[robh: drop maxItems on vbus-supply]
Signed-off-by: Rob Herring <robh@kernel.org>

authored by

Neil Armstrong and committed by
Rob Herring
6aec9751 f0d83c66

+127 -88
-88
Documentation/devicetree/bindings/usb/amlogic,dwc3.txt
··· 40 40 phy-names = "usb2-phy", "usb3-phy"; 41 41 }; 42 42 }; 43 - 44 - Amlogic Meson G12A DWC3 USB SoC Controller Glue 45 - 46 - The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3 47 - in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode 48 - only. 49 - 50 - A glue connects the DWC3 core to USB2 PHYs and optionnaly to an USB3 PHY. 51 - 52 - One of the USB2 PHY can be re-routed in peripheral mode to a DWC2 USB IP. 53 - 54 - The DWC3 Glue controls the PHY routing and power, an interrupt line is 55 - connected to the Glue to serve as OTG ID change detection. 56 - 57 - Required properties: 58 - - compatible: Should be "amlogic,meson-g12a-usb-ctrl" 59 - - clocks: a handle for the "USB" clock 60 - - resets: a handle for the shared "USB" reset line 61 - - reg: The base address and length of the registers 62 - - interrupts: the interrupt specifier for the OTG detection 63 - - phys: handle to used PHYs on the system 64 - - a <0> phandle can be used if a PHY is not used 65 - - phy-names: names of the used PHYs on the system : 66 - - "usb2-phy0" for USB2 PHY0 if USBHOST_A port is used 67 - - "usb2-phy1" for USB2 PHY1 if USBOTG_B port is used 68 - - "usb3-phy0" for USB3 PHY if USB3_0 is used 69 - - dr_mode: should be "host", "peripheral", or "otg" depending on 70 - the usage and configuration of the OTG Capable port. 71 - - "host" and "peripheral" means a fixed Host or Device only connection 72 - - "otg" means the port can be used as both Host or Device and 73 - be switched automatically using the OTG ID pin. 74 - 75 - Optional properties: 76 - - vbus-supply: should be a phandle to the regulator controlling the VBUS 77 - power supply when used in OTG switchable mode 78 - 79 - Required child nodes: 80 - 81 - A child node must exist to represent the core DWC3 IP block. The name of 82 - the node is not important. The content of the node is defined in dwc3.txt. 83 - 84 - A child node must exist to represent the core DWC2 IP block. The name of 85 - the node is not important. The content of the node is defined in dwc2.txt. 86 - 87 - PHY documentation is provided in the following places: 88 - - Documentation/devicetree/bindings/phy/meson-g12a-usb2-phy.txt 89 - - Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt 90 - 91 - Example device nodes: 92 - usb: usb@ffe09000 { 93 - compatible = "amlogic,meson-g12a-usb-ctrl"; 94 - reg = <0x0 0xffe09000 0x0 0xa0>; 95 - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 96 - #address-cells = <2>; 97 - #size-cells = <2>; 98 - ranges; 99 - 100 - clocks = <&clkc CLKID_USB>; 101 - resets = <&reset RESET_USB>; 102 - 103 - dr_mode = "otg"; 104 - 105 - phys = <&usb2_phy0>, <&usb2_phy1>, 106 - <&usb3_pcie_phy PHY_TYPE_USB3>; 107 - phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0"; 108 - 109 - dwc2: usb@ff400000 { 110 - compatible = "amlogic,meson-g12a-usb", "snps,dwc2"; 111 - reg = <0x0 0xff400000 0x0 0x40000>; 112 - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 113 - clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; 114 - clock-names = "ddr"; 115 - phys = <&usb2_phy1>; 116 - dr_mode = "peripheral"; 117 - g-rx-fifo-size = <192>; 118 - g-np-tx-fifo-size = <128>; 119 - g-tx-fifo-size = <128 128 16 16 16>; 120 - }; 121 - 122 - dwc3: usb@ff500000 { 123 - compatible = "snps,dwc3"; 124 - reg = <0x0 0xff500000 0x0 0x100000>; 125 - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 126 - dr_mode = "host"; 127 - snps,dis_u2_susphy_quirk; 128 - snps,quirk-frame-length-adjustment; 129 - }; 130 - };
+127
Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + # Copyright 2019 BayLibre, SAS 3 + %YAML 1.2 4 + --- 5 + $id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#" 6 + $schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 + 8 + title: Amlogic Meson G12A DWC3 USB SoC Controller Glue 9 + 10 + maintainers: 11 + - Neil Armstrong <narmstrong@baylibre.com> 12 + 13 + description: | 14 + The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3 15 + in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode 16 + only. 17 + 18 + A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY. 19 + 20 + One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP. 21 + 22 + The DWC3 Glue controls the PHY routing and power, an interrupt line is 23 + connected to the Glue to serve as OTG ID change detection. 24 + 25 + properties: 26 + compatible: 27 + enum: 28 + - amlogic,meson-g12a-usb-ctrl 29 + 30 + ranges: true 31 + 32 + "#address-cells": 33 + enum: [ 1, 2 ] 34 + 35 + "#size-cells": 36 + enum: [ 1, 2 ] 37 + 38 + clocks: 39 + minItems: 1 40 + 41 + resets: 42 + minItems: 1 43 + 44 + reg: 45 + maxItems: 1 46 + 47 + interrupts: 48 + maxItems: 1 49 + 50 + phy-names: 51 + items: 52 + - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used 53 + - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used 54 + - const: usb3-phy0 # USB3 PHY if USB3_0 is used 55 + 56 + phys: 57 + minItems: 1 58 + maxItems: 3 59 + 60 + dr_mode: true 61 + 62 + power-domains: 63 + maxItems: 1 64 + 65 + vbus-supply: 66 + description: VBUS power supply when used in OTG switchable mode 67 + 68 + patternProperties: 69 + "^usb@[0-9a-f]+$": 70 + type: object 71 + 72 + additionalProperties: false 73 + 74 + required: 75 + - compatible 76 + - "#address-cells" 77 + - "#size-cells" 78 + - ranges 79 + - clocks 80 + - resets 81 + - reg 82 + - interrupts 83 + - phy-names 84 + - phys 85 + - dr_mode 86 + 87 + examples: 88 + - | 89 + usb: usb@ffe09000 { 90 + compatible = "amlogic,meson-g12a-usb-ctrl"; 91 + reg = <0x0 0xffe09000 0x0 0xa0>; 92 + interrupts = <16>; 93 + #address-cells = <1>; 94 + #size-cells = <1>; 95 + ranges; 96 + 97 + clocks = <&clkc_usb>; 98 + resets = <&reset_usb>; 99 + 100 + dr_mode = "otg"; 101 + 102 + phys = <&usb2_phy0>, <&usb2_phy1>, <&usb3_phy0>; 103 + phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0"; 104 + 105 + dwc2: usb@ff400000 { 106 + compatible = "amlogic,meson-g12a-usb", "snps,dwc2"; 107 + reg = <0xff400000 0x40000>; 108 + interrupts = <31>; 109 + clocks = <&clkc_usb1>; 110 + clock-names = "ddr"; 111 + phys = <&usb2_phy1>; 112 + dr_mode = "peripheral"; 113 + g-rx-fifo-size = <192>; 114 + g-np-tx-fifo-size = <128>; 115 + g-tx-fifo-size = <128 128 16 16 16>; 116 + }; 117 + 118 + dwc3: usb@ff500000 { 119 + compatible = "snps,dwc3"; 120 + reg = <0xff500000 0x100000>; 121 + interrupts = <30>; 122 + dr_mode = "host"; 123 + snps,dis_u2_susphy_quirk; 124 + snps,quirk-frame-length-adjustment; 125 + }; 126 + }; 127 +