dt-bindings: pinctrl: document polarfire soc mssio pin controller

On Polarfire SoC, the Bank 2 and Bank 4 IOs connected to the
Multiprocessor Subsystem (MSS) are controlled by IOMUX_CRs 1 through 6,
which determine what function in routed to them, and
MSSIO_BANK#_IO_CFG_CRs, which determine the configuration of each pin.

Document it, including several custom configuration options that stem
from MSS Configurator options (the MSS Configurator is part of the FPGA
tooling for this device). "ibufmd" unfortunately is not a 1:1 mapping
with an MSS Configurator option, unlike clamp-diode or lockdown, and I
do not know the effect of any bits in the field. I have no been able to
find an explanation for these bits in documentation.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>

authored by

Conor Dooley and committed by

Linus Walleij 5 months ago 6b324d19 43722575

+113

2 changed files

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Documentation

devicetree

bindings

pinctrl

microchip,mpfs-pinctrl-mssio.yaml

soc

microchip

microchip,mpfs-mss-top-sysreg.yaml

+109

Documentation/devicetree/bindings/pinctrl/microchip,mpfs-pinctrl-mssio.yaml

··· 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/pinctrl/microchip,mpfs-pinctrl-mssio.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Microchip Polarfire SoC MSSIO pinctrl 8 + 9 + maintainers: 10 + - Conor Dooley <conor.dooley@microchip.com> 11 + 12 + properties: 13 + compatible: 14 + oneOf: 15 + - const: microchip,mpfs-pinctrl-mssio 16 + - items: 17 + - const: microchip,pic64gx-pinctrl-mssio 18 + - const: microchip,mpfs-pinctrl-mssio 19 + 20 + reg: 21 + maxItems: 1 22 + 23 + pinctrl-use-default: true 24 + 25 + patternProperties: 26 + '-cfg$': 27 + type: object 28 + additionalProperties: false 29 + 30 + patternProperties: 31 + '-pins$': 32 + type: object 33 + additionalProperties: false 34 + 35 + allOf: 36 + - $ref: pincfg-node.yaml# 37 + - $ref: pinmux-node.yaml# 38 + 39 + properties: 40 + pins: 41 + description: 42 + The list of IOs that properties in the pincfg node apply to. 43 + 44 + function: 45 + description: 46 + A string containing the name of the function to mux for these 47 + pins. The "reserved" function tristates a pin. 48 + enum: [ sd, emmc, qspi, spi, usb, uart, i2c, can, mdio, misc 49 + reserved, gpio, fabric-test, tied-low, tied-high, tristate ] 50 + 51 + bias-bus-hold: true 52 + bias-disable: true 53 + bias-pull-down: true 54 + bias-pull-up: true 55 + input-schmitt-enable: true 56 + low-power-enable: true 57 + 58 + drive-strength: 59 + enum: [ 2, 4, 6, 8, 10, 12, 16, 20 ] 60 + 61 + power-source: 62 + description: 63 + Which bank voltage to use. This cannot differ for pins in a 64 + given bank, the whole bank uses the same voltage. 65 + enum: [ 1200000, 1500000, 1800000, 2500000, 3300000 ] 66 + 67 + microchip,clamp-diode: 68 + $ref: /schemas/types.yaml#/definitions/flag 69 + description: 70 + Reflects the "Clamp Diode" setting in the MSS Configurator for 71 + this pin. This setting controls whether or not input voltage 72 + clamping should be enabled. 73 + 74 + microchip,ibufmd: 75 + $ref: /schemas/types.yaml#/definitions/uint32 76 + default: 0 77 + description: 78 + Reflects the "IBUFMD" bits in the MSS Configurator output files 79 + for this pin. 80 + 81 + required: 82 + - pins 83 + - function 84 + - power-source 85 + 86 + required: 87 + - compatible 88 + - reg 89 + 90 + additionalProperties: false 91 + 92 + examples: 93 + - | 94 + pinctrl@204 { 95 + compatible = "microchip,mpfs-pinctrl-mssio"; 96 + reg = <0x204 0x7c>; 97 + 98 + ikrd-spi1-cfg { 99 + spi1-pins { 100 + pins = <30>, <31>, <32>, <33>; 101 + function = "spi"; 102 + bias-pull-up; 103 + drive-strength = <8>; 104 + power-source = <3300000>; 105 + microchip,ibufmd = <0x1>; 106 + }; 107 + }; 108 + }; 109 + ...

Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-mss-top-sysreg.yaml

··· 42 42 type: object 43 43 $ref: /schemas/pinctrl/microchip,mpfs-pinctrl-iomux0.yaml 44 44 45 + pinctrl@204: 46 + type: object 47 + $ref: /schemas/pinctrl/microchip,mpfs-pinctrl-mssio.yaml 48 + 45 49 required: 46 50 - compatible 47 51 - reg

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