+38 -21

drivers/usb/class/cdc-wdm.c

reviewed

··· 57 57 58 58 #define WDM_MAX 16 59 59 60 60 + /* CDC-WMC r1.1 requires wMaxCommand to be "at least 256 decimal (0x100)" */ 61 61 + #define WDM_DEFAULT_BUFSIZE 256 60 62 61 63 static DEFINE_MUTEX(wdm_mutex); 62 64 ··· 90 88 int count; 91 89 dma_addr_t shandle; 92 90 dma_addr_t ihandle; 93 93 - struct mutex lock; 91 91 + struct mutex wlock; 92 92 + struct mutex rlock; 94 93 wait_queue_head_t wait; 95 94 struct work_struct rxwork; 96 95 int werr; ··· 326 323 } 327 324 328 325 /* concurrent writes and disconnect */ 329 329 - r = mutex_lock_interruptible(&desc->lock); 326 326 + r = mutex_lock_interruptible(&desc->wlock); 330 327 rv = -ERESTARTSYS; 331 328 if (r) { 332 329 kfree(buf); ··· 389 386 out: 390 387 usb_autopm_put_interface(desc->intf); 391 388 outnp: 392 392 - mutex_unlock(&desc->lock); 389 389 + mutex_unlock(&desc->wlock); 393 390 outnl: 394 391 return rv < 0 ? rv : count; 395 392 } ··· 402 399 struct wdm_device *desc = file->private_data; 403 400 404 401 405 405 - rv = mutex_lock_interruptible(&desc->lock); /*concurrent reads */ 402 402 + rv = mutex_lock_interruptible(&desc->rlock); /*concurrent reads */ 406 403 if (rv < 0) 407 404 return -ERESTARTSYS; 408 405 ··· 470 467 for (i = 0; i < desc->length - cntr; i++) 471 468 desc->ubuf[i] = desc->ubuf[i + cntr]; 472 469 470 470 + spin_lock_irq(&desc->iuspin); 473 471 desc->length -= cntr; 472 472 + spin_unlock_irq(&desc->iuspin); 474 473 /* in case we had outstanding data */ 475 474 if (!desc->length) 476 475 clear_bit(WDM_READ, &desc->flags); 477 476 rv = cntr; 478 477 479 478 err: 480 480 - mutex_unlock(&desc->lock); 479 479 + mutex_unlock(&desc->rlock); 481 480 return rv; 482 481 } 483 482 ··· 545 540 } 546 541 intf->needs_remote_wakeup = 1; 547 542 548 548 - mutex_lock(&desc->lock); 543 543 + /* using write lock to protect desc->count */ 544 544 + mutex_lock(&desc->wlock); 549 545 if (!desc->count++) { 550 546 desc->werr = 0; 551 547 desc->rerr = 0; ··· 559 553 } else { 560 554 rv = 0; 561 555 } 562 562 - mutex_unlock(&desc->lock); 556 556 + mutex_unlock(&desc->wlock); 563 557 usb_autopm_put_interface(desc->intf); 564 558 out: 565 559 mutex_unlock(&wdm_mutex); ··· 571 565 struct wdm_device *desc = file->private_data; 572 566 573 567 mutex_lock(&wdm_mutex); 574 574 - mutex_lock(&desc->lock); 568 568 + 569 569 + /* using write lock to protect desc->count */ 570 570 + mutex_lock(&desc->wlock); 575 571 desc->count--; 576 576 - mutex_unlock(&desc->lock); 572 572 + mutex_unlock(&desc->wlock); 577 573 578 574 if (!desc->count) { 579 575 dev_dbg(&desc->intf->dev, "wdm_release: cleanup"); ··· 638 630 struct usb_cdc_dmm_desc *dmhd; 639 631 u8 *buffer = intf->altsetting->extra; 640 632 int buflen = intf->altsetting->extralen; 641 641 - u16 maxcom = 0; 633 633 + u16 maxcom = WDM_DEFAULT_BUFSIZE; 642 634 643 635 if (!buffer) 644 636 goto out; ··· 673 665 desc = kzalloc(sizeof(struct wdm_device), GFP_KERNEL); 674 666 if (!desc) 675 667 goto out; 676 676 - mutex_init(&desc->lock); 668 668 + mutex_init(&desc->rlock); 669 669 + mutex_init(&desc->wlock); 677 670 spin_lock_init(&desc->iuspin); 678 671 init_waitqueue_head(&desc->wait); 679 672 desc->wMaxCommand = maxcom; ··· 725 716 goto err; 726 717 727 718 desc->inbuf = usb_alloc_coherent(interface_to_usbdev(intf), 728 728 - desc->bMaxPacketSize0, 719 719 + desc->wMaxCommand, 729 720 GFP_KERNEL, 730 721 &desc->response->transfer_dma); 731 722 if (!desc->inbuf) ··· 788 779 /* to terminate pending flushes */ 789 780 clear_bit(WDM_IN_USE, &desc->flags); 790 781 spin_unlock_irqrestore(&desc->iuspin, flags); 791 791 - mutex_lock(&desc->lock); 782 782 + wake_up_all(&desc->wait); 783 783 + mutex_lock(&desc->rlock); 784 784 + mutex_lock(&desc->wlock); 792 785 kill_urbs(desc); 793 786 cancel_work_sync(&desc->rxwork); 794 794 - mutex_unlock(&desc->lock); 795 795 - wake_up_all(&desc->wait); 787 787 + mutex_unlock(&desc->wlock); 788 788 + mutex_unlock(&desc->rlock); 796 789 if (!desc->count) 797 790 cleanup(desc); 798 791 mutex_unlock(&wdm_mutex); ··· 809 798 dev_dbg(&desc->intf->dev, "wdm%d_suspend\n", intf->minor); 810 799 811 800 /* if this is an autosuspend the caller does the locking */ 812 812 - if (!PMSG_IS_AUTO(message)) 813 813 - mutex_lock(&desc->lock); 801 801 + if (!PMSG_IS_AUTO(message)) { 802 802 + mutex_lock(&desc->rlock); 803 803 + mutex_lock(&desc->wlock); 804 804 + } 814 805 spin_lock_irq(&desc->iuspin); 815 806 816 807 if (PMSG_IS_AUTO(message) && ··· 828 815 kill_urbs(desc); 829 816 cancel_work_sync(&desc->rxwork); 830 817 } 831 831 - if (!PMSG_IS_AUTO(message)) 832 832 - mutex_unlock(&desc->lock); 818 818 + if (!PMSG_IS_AUTO(message)) { 819 819 + mutex_unlock(&desc->wlock); 820 820 + mutex_unlock(&desc->rlock); 821 821 + } 833 822 834 823 return rv; 835 824 } ··· 869 854 { 870 855 struct wdm_device *desc = usb_get_intfdata(intf); 871 856 872 872 - mutex_lock(&desc->lock); 857 857 + mutex_lock(&desc->rlock); 858 858 + mutex_lock(&desc->wlock); 873 859 kill_urbs(desc); 874 860 875 861 /* ··· 892 876 int rv; 893 877 894 878 rv = recover_from_urb_loss(desc); 895 895 - mutex_unlock(&desc->lock); 879 879 + mutex_unlock(&desc->wlock); 880 880 + mutex_unlock(&desc->rlock); 896 881 return 0; 897 882 } 898 883

+4 -11

drivers/usb/dwc3/ep0.c

reviewed

··· 126 126 struct dwc3_request *req) 127 127 { 128 128 struct dwc3 *dwc = dep->dwc; 129 129 - u32 type; 130 129 int ret = 0; 131 130 132 131 req->request.actual = 0; ··· 148 149 149 150 direction = !!(dep->flags & DWC3_EP0_DIR_IN); 150 151 151 151 - if (dwc->ep0state == EP0_STATUS_PHASE) { 152 152 - type = dwc->three_stage_setup 153 153 - ? DWC3_TRBCTL_CONTROL_STATUS3 154 154 - : DWC3_TRBCTL_CONTROL_STATUS2; 155 155 - } else if (dwc->ep0state == EP0_DATA_PHASE) { 156 156 - type = DWC3_TRBCTL_CONTROL_DATA; 157 157 - } else { 158 158 - /* should never happen */ 159 159 - WARN_ON(1); 152 152 + if (dwc->ep0state != EP0_DATA_PHASE) { 153 153 + dev_WARN(dwc->dev, "Unexpected pending request\n"); 160 154 return 0; 161 155 } 162 156 163 157 ret = dwc3_ep0_start_trans(dwc, direction, 164 164 - req->request.dma, req->request.length, type); 158 158 + req->request.dma, req->request.length, 159 159 + DWC3_TRBCTL_CONTROL_DATA); 165 160 dep->flags &= ~(DWC3_EP_PENDING_REQUEST | 166 161 DWC3_EP0_DIR_IN); 167 162 } else if (dwc->delayed_status) {

+1 -1

drivers/usb/dwc3/gadget.c

reviewed

··· 101 101 if (req->request.num_mapped_sgs) { 102 102 req->request.dma = DMA_ADDR_INVALID; 103 103 dma_unmap_sg(dwc->dev, req->request.sg, 104 104 - req->request.num_sgs, 104 104 + req->request.num_mapped_sgs, 105 105 req->direction ? DMA_TO_DEVICE 106 106 : DMA_FROM_DEVICE); 107 107

+3 -4

drivers/usb/gadget/composite.c

reviewed

··· 175 175 _ep->comp_desc = comp_desc; 176 176 if (g->speed == USB_SPEED_SUPER) { 177 177 switch (usb_endpoint_type(_ep->desc)) { 178 178 - case USB_ENDPOINT_XFER_BULK: 179 179 - case USB_ENDPOINT_XFER_INT: 180 180 - _ep->maxburst = comp_desc->bMaxBurst; 181 181 - break; 182 178 case USB_ENDPOINT_XFER_ISOC: 183 179 /* mult: bits 1:0 of bmAttributes */ 184 180 _ep->mult = comp_desc->bmAttributes & 0x3; 181 181 + case USB_ENDPOINT_XFER_BULK: 182 182 + case USB_ENDPOINT_XFER_INT: 183 183 + _ep->maxburst = comp_desc->bMaxBurst; 185 184 break; 186 185 default: 187 186 /* Do nothing for control endpoints */

+1 -1

drivers/usb/gadget/epautoconf.c

reviewed

··· 126 126 * descriptor and see if the EP matches it 127 127 */ 128 128 if (usb_endpoint_xfer_bulk(desc)) { 129 129 - if (ep_comp) { 129 129 + if (ep_comp && gadget->max_speed >= USB_SPEED_SUPER) { 130 130 num_req_streams = ep_comp->bmAttributes & 0x1f; 131 131 if (num_req_streams > ep->max_streams) 132 132 return 0;

+5 -5

drivers/usb/gadget/f_mass_storage.c

reviewed

··· 3123 3123 3124 3124 struct fsg_module_parameters { 3125 3125 char *file[FSG_MAX_LUNS]; 3126 3126 - int ro[FSG_MAX_LUNS]; 3127 3127 - int removable[FSG_MAX_LUNS]; 3128 3128 - int cdrom[FSG_MAX_LUNS]; 3129 3129 - int nofua[FSG_MAX_LUNS]; 3126 3126 + bool ro[FSG_MAX_LUNS]; 3127 3127 + bool removable[FSG_MAX_LUNS]; 3128 3128 + bool cdrom[FSG_MAX_LUNS]; 3129 3129 + bool nofua[FSG_MAX_LUNS]; 3130 3130 3131 3131 unsigned int file_count, ro_count, removable_count, cdrom_count; 3132 3132 unsigned int nofua_count; 3133 3133 unsigned int luns; /* nluns */ 3134 3134 - int stall; /* can_stall */ 3134 3134 + bool stall; /* can_stall */ 3135 3135 }; 3136 3136 3137 3137 #define _FSG_MODULE_PARAM_ARRAY(prefix, params, name, type, desc) \

+2 -2

drivers/usb/gadget/fsl_udc_core.c

reviewed

··· 1430 1430 int pipe = get_pipe_by_windex(wIndex); 1431 1431 struct fsl_ep *ep; 1432 1432 1433 1433 - if (wValue != 0 || wLength != 0 || pipe > udc->max_ep) 1433 1433 + if (wValue != 0 || wLength != 0 || pipe >= udc->max_ep) 1434 1434 break; 1435 1435 ep = get_ep_by_pipe(udc, pipe); 1436 1436 ··· 1673 1673 if (!bit_pos) 1674 1674 return; 1675 1675 1676 1676 - for (i = 0; i < udc->max_ep * 2; i++) { 1676 1676 + for (i = 0; i < udc->max_ep; i++) { 1677 1677 ep_num = i >> 1; 1678 1678 direction = i % 2; 1679 1679

+10 -97

drivers/usb/gadget/langwell_udc.c

reviewed

··· 11 11 /* #undef DEBUG */ 12 12 /* #undef VERBOSE_DEBUG */ 13 13 14 14 - #if defined(CONFIG_USB_LANGWELL_OTG) 15 15 - #define OTG_TRANSCEIVER 16 16 - #endif 17 17 - 18 18 - 19 14 #include <linux/module.h> 20 15 #include <linux/pci.h> 21 16 #include <linux/dma-mapping.h> ··· 1517 1522 1518 1523 1519 1524 /* stop all USB activities */ 1520 1520 - static void stop_activity(struct langwell_udc *dev, 1521 1521 - struct usb_gadget_driver *driver) 1525 1525 + static void stop_activity(struct langwell_udc *dev) 1522 1526 { 1523 1527 struct langwell_ep *ep; 1524 1528 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__); ··· 1529 1535 } 1530 1536 1531 1537 /* report disconnect; the driver is already quiesced */ 1532 1532 - if (driver) { 1538 1538 + if (dev->driver) { 1533 1539 spin_unlock(&dev->lock); 1534 1534 - driver->disconnect(&dev->gadget); 1540 1540 + dev->driver->disconnect(&dev->gadget); 1535 1541 spin_lock(&dev->lock); 1536 1542 } 1537 1543 ··· 1919 1925 1920 1926 /* stop all usb activities */ 1921 1927 dev->gadget.speed = USB_SPEED_UNKNOWN; 1922 1922 - stop_activity(dev, driver); 1923 1923 - spin_unlock_irqrestore(&dev->lock, flags); 1924 1924 - 1925 1928 dev->gadget.dev.driver = NULL; 1926 1929 dev->driver = NULL; 1930 1930 + stop_activity(dev); 1931 1931 + spin_unlock_irqrestore(&dev->lock, flags); 1927 1932 1928 1933 device_remove_file(&dev->pdev->dev, &dev_attr_function); 1929 1934 ··· 2308 2315 2309 2316 if (!gadget_is_otg(&dev->gadget)) 2310 2317 break; 2311 2311 - else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE) { 2318 2318 + else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE) 2312 2319 dev->gadget.b_hnp_enable = 1; 2313 2313 - #ifdef OTG_TRANSCEIVER 2314 2314 - if (!dev->lotg->otg.default_a) 2315 2315 - dev->lotg->hsm.b_hnp_enable = 1; 2316 2316 - #endif 2317 2317 - } else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT) 2320 2320 + else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT) 2318 2321 dev->gadget.a_hnp_support = 1; 2319 2322 else if (setup->bRequest == 2320 2323 USB_DEVICE_A_ALT_HNP_SUPPORT) ··· 2722 2733 dev->bus_reset = 1; 2723 2734 2724 2735 /* reset all the queues, stop all USB activities */ 2725 2725 - stop_activity(dev, dev->driver); 2736 2736 + stop_activity(dev); 2726 2737 dev->usb_state = USB_STATE_DEFAULT; 2727 2738 } else { 2728 2739 dev_vdbg(&dev->pdev->dev, "device controller reset\n"); ··· 2730 2741 langwell_udc_reset(dev); 2731 2742 2732 2743 /* reset all the queues, stop all USB activities */ 2733 2733 - stop_activity(dev, dev->driver); 2744 2744 + stop_activity(dev); 2734 2745 2735 2746 /* reset ep0 dQH and endptctrl */ 2736 2747 ep0_reset(dev); ··· 2740 2751 2741 2752 dev->usb_state = USB_STATE_ATTACHED; 2742 2753 } 2743 2743 - 2744 2744 - #ifdef OTG_TRANSCEIVER 2745 2745 - /* refer to USB OTG 6.6.2.3 b_hnp_en is cleared */ 2746 2746 - if (!dev->lotg->otg.default_a) 2747 2747 - dev->lotg->hsm.b_hnp_enable = 0; 2748 2748 - #endif 2749 2754 2750 2755 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__); 2751 2756 } ··· 2752 2769 2753 2770 dev->resume_state = dev->usb_state; 2754 2771 dev->usb_state = USB_STATE_SUSPENDED; 2755 2755 - 2756 2756 - #ifdef OTG_TRANSCEIVER 2757 2757 - if (dev->lotg->otg.default_a) { 2758 2758 - if (dev->lotg->hsm.b_bus_suspend_vld == 1) { 2759 2759 - dev->lotg->hsm.b_bus_suspend = 1; 2760 2760 - /* notify transceiver the state changes */ 2761 2761 - if (spin_trylock(&dev->lotg->wq_lock)) { 2762 2762 - langwell_update_transceiver(); 2763 2763 - spin_unlock(&dev->lotg->wq_lock); 2764 2764 - } 2765 2765 - } 2766 2766 - dev->lotg->hsm.b_bus_suspend_vld++; 2767 2767 - } else { 2768 2768 - if (!dev->lotg->hsm.a_bus_suspend) { 2769 2769 - dev->lotg->hsm.a_bus_suspend = 1; 2770 2770 - /* notify transceiver the state changes */ 2771 2771 - if (spin_trylock(&dev->lotg->wq_lock)) { 2772 2772 - langwell_update_transceiver(); 2773 2773 - spin_unlock(&dev->lotg->wq_lock); 2774 2774 - } 2775 2775 - } 2776 2776 - } 2777 2777 - #endif 2778 2772 2779 2773 /* report suspend to the driver */ 2780 2774 if (dev->driver) { ··· 2782 2822 /* exit PHY low power suspend */ 2783 2823 if (dev->pdev->device != 0x0829) 2784 2824 langwell_phy_low_power(dev, 0); 2785 2785 - 2786 2786 - #ifdef OTG_TRANSCEIVER 2787 2787 - if (dev->lotg->otg.default_a == 0) 2788 2788 - dev->lotg->hsm.a_bus_suspend = 0; 2789 2789 - #endif 2790 2825 2791 2826 /* report resume to the driver */ 2792 2827 if (dev->driver) { ··· 2975 3020 2976 3021 dev->done = &done; 2977 3022 2978 2978 - #ifndef OTG_TRANSCEIVER 2979 3023 /* free dTD dma_pool and dQH */ 2980 3024 if (dev->dtd_pool) 2981 3025 dma_pool_destroy(dev->dtd_pool); ··· 2986 3032 /* release SRAM caching */ 2987 3033 if (dev->has_sram && dev->got_sram) 2988 3034 sram_deinit(dev); 2989 2989 - #endif 2990 3035 2991 3036 if (dev->status_req) { 2992 3037 kfree(dev->status_req->req.buf); ··· 2998 3045 if (dev->got_irq) 2999 3046 free_irq(pdev->irq, dev); 3000 3047 3001 3001 - #ifndef OTG_TRANSCEIVER 3002 3048 if (dev->cap_regs) 3003 3049 iounmap(dev->cap_regs); 3004 3050 ··· 3007 3055 3008 3056 if (dev->enabled) 3009 3057 pci_disable_device(pdev); 3010 3010 - #else 3011 3011 - if (dev->transceiver) { 3012 3012 - otg_put_transceiver(dev->transceiver); 3013 3013 - dev->transceiver = NULL; 3014 3014 - dev->lotg = NULL; 3015 3015 - } 3016 3016 - #endif 3017 3058 3018 3059 dev->cap_regs = NULL; 3019 3060 ··· 3017 3072 device_remove_file(&pdev->dev, &dev_attr_langwell_udc); 3018 3073 device_remove_file(&pdev->dev, &dev_attr_remote_wakeup); 3019 3074 3020 3020 - #ifndef OTG_TRANSCEIVER 3021 3075 pci_set_drvdata(pdev, NULL); 3022 3022 - #endif 3023 3076 3024 3077 /* free dev, wait for the release() finished */ 3025 3078 wait_for_completion(&done); ··· 3032 3089 const struct pci_device_id *id) 3033 3090 { 3034 3091 struct langwell_udc *dev; 3035 3035 - #ifndef OTG_TRANSCEIVER 3036 3092 unsigned long resource, len; 3037 3037 - #endif 3038 3093 void __iomem *base = NULL; 3039 3094 size_t size; 3040 3095 int retval; ··· 3050 3109 dev->pdev = pdev; 3051 3110 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__); 3052 3111 3053 3053 - #ifdef OTG_TRANSCEIVER 3054 3054 - /* PCI device is already enabled by otg_transceiver driver */ 3055 3055 - dev->enabled = 1; 3056 3056 - 3057 3057 - /* mem region and register base */ 3058 3058 - dev->region = 1; 3059 3059 - dev->transceiver = otg_get_transceiver(); 3060 3060 - dev->lotg = otg_to_langwell(dev->transceiver); 3061 3061 - base = dev->lotg->regs; 3062 3062 - #else 3063 3112 pci_set_drvdata(pdev, dev); 3064 3113 3065 3114 /* now all the pci goodies ... */ ··· 3070 3139 dev->region = 1; 3071 3140 3072 3141 base = ioremap_nocache(resource, len); 3073 3073 - #endif 3074 3142 if (base == NULL) { 3075 3143 dev_err(&dev->pdev->dev, "can't map memory\n"); 3076 3144 retval = -EFAULT; ··· 3093 3163 dev->got_sram = 0; 3094 3164 dev_vdbg(&dev->pdev->dev, "dev->has_sram: %d\n", dev->has_sram); 3095 3165 3096 3096 - #ifndef OTG_TRANSCEIVER 3097 3166 /* enable SRAM caching if detected */ 3098 3167 if (dev->has_sram && !dev->got_sram) 3099 3168 sram_init(dev); ··· 3111 3182 goto error; 3112 3183 } 3113 3184 dev->got_irq = 1; 3114 3114 - #endif 3115 3185 3116 3186 /* set stopped bit */ 3117 3187 dev->stopped = 1; ··· 3185 3257 dev->remote_wakeup = 0; 3186 3258 dev->dev_status = 1 << USB_DEVICE_SELF_POWERED; 3187 3259 3188 3188 - #ifndef OTG_TRANSCEIVER 3189 3260 /* reset device controller */ 3190 3261 langwell_udc_reset(dev); 3191 3191 - #endif 3192 3262 3193 3263 /* initialize gadget structure */ 3194 3264 dev->gadget.ops = &langwell_ops; /* usb_gadget_ops */ ··· 3194 3268 INIT_LIST_HEAD(&dev->gadget.ep_list); /* ep_list */ 3195 3269 dev->gadget.speed = USB_SPEED_UNKNOWN; /* speed */ 3196 3270 dev->gadget.max_speed = USB_SPEED_HIGH; /* support dual speed */ 3197 3197 - #ifdef OTG_TRANSCEIVER 3198 3198 - dev->gadget.is_otg = 1; /* support otg mode */ 3199 3199 - #endif 3200 3271 3201 3272 /* the "gadget" abstracts/virtualizes the controller */ 3202 3273 dev_set_name(&dev->gadget.dev, "gadget"); ··· 3205 3282 /* controller endpoints reinit */ 3206 3283 eps_reinit(dev); 3207 3284 3208 3208 - #ifndef OTG_TRANSCEIVER 3209 3285 /* reset ep0 dQH and endptctrl */ 3210 3286 ep0_reset(dev); 3211 3211 - #endif 3212 3287 3213 3288 /* create dTD dma_pool resource */ 3214 3289 dev->dtd_pool = dma_pool_create("langwell_dtd", ··· 3288 3367 3289 3368 spin_lock_irq(&dev->lock); 3290 3369 /* stop all usb activities */ 3291 3291 - stop_activity(dev, dev->driver); 3370 3370 + stop_activity(dev); 3292 3371 spin_unlock_irq(&dev->lock); 3293 3372 3294 3373 /* free dTD dma_pool and dQH */ ··· 3446 3525 3447 3526 static int __init init(void) 3448 3527 { 3449 3449 - #ifdef OTG_TRANSCEIVER 3450 3450 - return langwell_register_peripheral(&langwell_pci_driver); 3451 3451 - #else 3452 3528 return pci_register_driver(&langwell_pci_driver); 3453 3453 - #endif 3454 3529 } 3455 3530 module_init(init); 3456 3531 3457 3532 3458 3533 static void __exit cleanup(void) 3459 3534 { 3460 3460 - #ifdef OTG_TRANSCEIVER 3461 3461 - return langwell_unregister_peripheral(&langwell_pci_driver); 3462 3462 - #else 3463 3535 pci_unregister_driver(&langwell_pci_driver); 3464 3464 - #endif 3465 3536 } 3466 3537 module_exit(cleanup); 3467 3538

-1

drivers/usb/gadget/langwell_udc.h

reviewed

··· 8 8 */ 9 9 10 10 #include <linux/usb/langwell_udc.h> 11 11 - #include <linux/usb/langwell_otg.h> 12 11 13 12 /*-------------------------------------------------------------------------*/ 14 13

+3 -3

drivers/usb/gadget/storage_common.c

reviewed

··· 598 598 | USB_5GBPS_OPERATION), 599 599 .bFunctionalitySupport = USB_LOW_SPEED_OPERATION, 600 600 .bU1devExitLat = USB_DEFAULT_U1_DEV_EXIT_LAT, 601 601 - .bU2DevExitLat = USB_DEFAULT_U2_DEV_EXIT_LAT, 601 601 + .bU2DevExitLat = cpu_to_le16(USB_DEFAULT_U2_DEV_EXIT_LAT), 602 602 }; 603 603 604 604 static __maybe_unused struct usb_bos_descriptor fsg_bos_desc = { 605 605 .bLength = USB_DT_BOS_SIZE, 606 606 .bDescriptorType = USB_DT_BOS, 607 607 608 608 - .wTotalLength = USB_DT_BOS_SIZE 608 608 + .wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE 609 609 + USB_DT_USB_EXT_CAP_SIZE 610 610 - + USB_DT_USB_SS_CAP_SIZE, 610 610 + + USB_DT_USB_SS_CAP_SIZE), 611 611 612 612 .bNumDeviceCaps = 2, 613 613 };

+1 -1

drivers/usb/host/ehci-fsl.c

reviewed

··· 125 125 */ 126 126 if (pdata->init && pdata->init(pdev)) { 127 127 retval = -ENODEV; 128 128 - goto err3; 128 128 + goto err4; 129 129 } 130 130 131 131 /* Enable USB controller, 83xx or 8536 */

+6

drivers/usb/host/ehci-pci.c

reviewed

··· 276 276 277 277 /* Serial Bus Release Number is at PCI 0x60 offset */ 278 278 pci_read_config_byte(pdev, 0x60, &ehci->sbrn); 279 279 + if (pdev->vendor == PCI_VENDOR_ID_STMICRO 280 280 + && pdev->device == PCI_DEVICE_ID_STMICRO_USB_HOST) 281 281 + ehci->sbrn = 0x20; /* ConneXT has no sbrn register */ 279 282 280 283 /* Keep this around for a while just in case some EHCI 281 284 * implementation uses legacy PCI PM support. This test ··· 529 526 /* handle any USB 2.0 EHCI controller */ 530 527 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_EHCI, ~0), 531 528 .driver_data = (unsigned long) &ehci_pci_hc_driver, 529 529 + }, { 530 530 + PCI_VDEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_USB_HOST), 531 531 + .driver_data = (unsigned long) &ehci_pci_hc_driver, 532 532 }, 533 533 { /* end: all zeroes */ } 534 534 };

+10 -2

drivers/usb/host/ohci-dbg.c

reviewed

··· 82 82 ohci_dbg(ohci,format, ## arg ); \ 83 83 } while (0); 84 84 85 85 + /* Version for use where "next" is the address of a local variable */ 86 86 + #define ohci_dbg_nosw(ohci, next, size, format, arg...) \ 87 87 + do { \ 88 88 + unsigned s_len; \ 89 89 + s_len = scnprintf(*next, *size, format, ## arg); \ 90 90 + *size -= s_len; *next += s_len; \ 91 91 + } while (0); 92 92 + 85 93 86 94 static void ohci_dump_intr_mask ( 87 95 struct ohci_hcd *ohci, ··· 661 653 662 654 /* dump driver info, then registers in spec order */ 663 655 664 664 - ohci_dbg_sw (ohci, &next, &size, 656 656 + ohci_dbg_nosw(ohci, &next, &size, 665 657 "bus %s, device %s\n" 666 658 "%s\n" 667 659 "%s\n", ··· 680 672 681 673 /* hcca */ 682 674 if (ohci->hcca) 683 683 - ohci_dbg_sw (ohci, &next, &size, 675 675 + ohci_dbg_nosw(ohci, &next, &size, 684 676 "hcca frame 0x%04x\n", ohci_frame_no(ohci)); 685 677 686 678 /* other registers mostly affect frame timings */

+4

drivers/usb/host/ohci-pci.c

reviewed

··· 397 397 /* handle any USB OHCI controller */ 398 398 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0), 399 399 .driver_data = (unsigned long) &ohci_pci_hc_driver, 400 400 + }, { 401 401 + /* The device in the ConneXT I/O hub has no class reg */ 402 402 + PCI_VDEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_USB_OHCI), 403 403 + .driver_data = (unsigned long) &ohci_pci_hc_driver, 400 404 }, { /* end: all zeroes */ } 401 405 }; 402 406 MODULE_DEVICE_TABLE (pci, pci_ids);

+4 -2

drivers/usb/host/xhci-ring.c

reviewed

··· 1204 1204 * 1205 1205 * Returns a zero-based port number, which is suitable for indexing into each of 1206 1206 * the split roothubs' port arrays and bus state arrays. 1207 1207 + * Add one to it in order to call xhci_find_slot_id_by_port. 1207 1208 */ 1208 1209 static unsigned int find_faked_portnum_from_hw_portnum(struct usb_hcd *hcd, 1209 1210 struct xhci_hcd *xhci, u32 port_id) ··· 1325 1324 xhci_set_link_state(xhci, port_array, faked_port_index, 1326 1325 XDEV_U0); 1327 1326 slot_id = xhci_find_slot_id_by_port(hcd, xhci, 1328 1328 - faked_port_index); 1327 1327 + faked_port_index + 1); 1329 1328 if (!slot_id) { 1330 1329 xhci_dbg(xhci, "slot_id is zero\n"); 1331 1330 goto cleanup; ··· 3324 3323 /* Check TD length */ 3325 3324 if (running_total != td_len) { 3326 3325 xhci_err(xhci, "ISOC TD length unmatch\n"); 3327 3327 - return -EINVAL; 3326 3326 + ret = -EINVAL; 3327 3327 + goto cleanup; 3328 3328 } 3329 3329 } 3330 3330

-3

drivers/usb/misc/emi26.c

reviewed

··· 37 37 static int emi26_load_firmware (struct usb_device *dev); 38 38 static int emi26_probe(struct usb_interface *intf, const struct usb_device_id *id); 39 39 static void emi26_disconnect(struct usb_interface *intf); 40 40 - static int __init emi26_init (void); 41 41 - static void __exit emi26_exit (void); 42 42 - 43 40 44 41 /* thanks to drivers/usb/serial/keyspan_pda.c code */ 45 42 static int emi26_writememory (struct usb_device *dev, int address,

-3

drivers/usb/misc/emi62.c

reviewed

··· 46 46 static int emi62_load_firmware (struct usb_device *dev); 47 47 static int emi62_probe(struct usb_interface *intf, const struct usb_device_id *id); 48 48 static void emi62_disconnect(struct usb_interface *intf); 49 49 - static int __init emi62_init (void); 50 50 - static void __exit emi62_exit (void); 51 51 - 52 49 53 50 /* thanks to drivers/usb/serial/keyspan_pda.c code */ 54 51 static int emi62_writememory(struct usb_device *dev, int address,

+1 -1

drivers/usb/misc/usbsevseg.c

reviewed

··· 24 24 25 25 #define VENDOR_ID 0x0fc5 26 26 #define PRODUCT_ID 0x1227 27 27 - #define MAXLEN 6 27 27 + #define MAXLEN 8 28 28 29 29 /* table of devices that work with this driver */ 30 30 static const struct usb_device_id id_table[] = {

-3

drivers/usb/musb/davinci.c

reviewed

··· 33 33 #include <linux/platform_device.h> 34 34 #include <linux/dma-mapping.h> 35 35 36 36 - #include <mach/hardware.h> 37 37 - #include <mach/memory.h> 38 38 - #include <asm/gpio.h> 39 36 #include <mach/cputype.h> 40 37 41 38 #include <asm/mach-types.h>

+3 -2

drivers/usb/musb/musb_core.c

reviewed

··· 981 981 unsigned long flags; 982 982 983 983 pm_runtime_get_sync(musb->controller); 984 984 + 985 985 + musb_gadget_cleanup(musb); 986 986 + 984 987 spin_lock_irqsave(&musb->lock, flags); 985 988 musb_platform_disable(musb); 986 989 musb_generic_disable(musb); ··· 1829 1826 #ifdef CONFIG_SYSFS 1830 1827 sysfs_remove_group(&musb->controller->kobj, &musb_attr_group); 1831 1828 #endif 1832 1832 - 1833 1833 - musb_gadget_cleanup(musb); 1834 1829 1835 1830 if (musb->nIrq >= 0) { 1836 1831 if (musb->irq_wake)

+2 -2

drivers/usb/musb/omap2430.c

reviewed

··· 222 222 musb_writel(musb->mregs, OTG_FORCESTDBY, l); 223 223 } 224 224 225 225 - /* blocking notifier support */ 226 225 static int musb_otg_notifications(struct notifier_block *nb, 227 226 unsigned long event, void *unused) 228 227 { ··· 230 231 musb->xceiv_event = event; 231 232 schedule_work(&musb->otg_notifier_work); 232 233 233 233 - return 0; 234 234 + return NOTIFY_OK; 234 235 } 235 236 236 237 static void musb_otg_notifier_work(struct work_struct *data_notifier_work) ··· 385 386 static int omap2430_musb_exit(struct musb *musb) 386 387 { 387 388 del_timer_sync(&musb_idle_timer); 389 389 + cancel_work_sync(&musb->otg_notifier_work); 388 390 389 391 omap2430_low_level_exit(musb); 390 392 otg_put_transceiver(musb->xceiv);

+2 -16

drivers/usb/otg/Kconfig

reviewed

··· 86 86 built-in with usb ip or which are autonomous and doesn't require any 87 87 phy programming such as ISP1x04 etc. 88 88 89 89 - config USB_LANGWELL_OTG 90 90 - tristate "Intel Langwell USB OTG dual-role support" 91 91 - depends on USB && PCI && INTEL_SCU_IPC 92 92 - select USB_OTG 93 93 - select USB_OTG_UTILS 94 94 - help 95 95 - Say Y here if you want to build Intel Langwell USB OTG 96 96 - transciever driver in kernel. This driver implements role 97 97 - switch between EHCI host driver and Langwell USB OTG 98 98 - client driver. 99 99 - 100 100 - To compile this driver as a module, choose M here: the 101 101 - module will be called langwell_otg. 102 102 - 103 89 config USB_MSM_OTG 104 90 tristate "OTG support for Qualcomm on-chip USB controller" 105 91 depends on (USB || USB_GADGET) && ARCH_MSM ··· 110 124 111 125 config FSL_USB2_OTG 112 126 bool "Freescale USB OTG Transceiver Driver" 113 113 - depends on USB_EHCI_FSL && USB_GADGET_FSL_USB2 127 127 + depends on USB_EHCI_FSL && USB_GADGET_FSL_USB2 && USB_SUSPEND 114 128 select USB_OTG 115 129 select USB_OTG_UTILS 116 130 help ··· 118 132 119 133 config USB_MV_OTG 120 134 tristate "Marvell USB OTG support" 121 121 - depends on USB_MV_UDC 135 135 + depends on USB_MV_UDC && USB_SUSPEND 122 136 select USB_OTG 123 137 select USB_OTG_UTILS 124 138 help

-1

drivers/usb/otg/Makefile

reviewed

··· 13 13 obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o 14 14 obj-$(CONFIG_TWL4030_USB) += twl4030-usb.o 15 15 obj-$(CONFIG_TWL6030_USB) += twl6030-usb.o 16 16 - obj-$(CONFIG_USB_LANGWELL_OTG) += langwell_otg.o 17 16 obj-$(CONFIG_NOP_USB_XCEIV) += nop-usb-xceiv.o 18 17 obj-$(CONFIG_USB_ULPI) += ulpi.o 19 18 obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi_viewport.o

-2347

drivers/usb/otg/langwell_otg.c

reviewed

··· 1 1 - /* 2 2 - * Intel Langwell USB OTG transceiver driver 3 3 - * Copyright (C) 2008 - 2010, Intel Corporation. 4 4 - * 5 5 - * This program is free software; you can redistribute it and/or modify it 6 6 - * under the terms and conditions of the GNU General Public License, 7 7 - * version 2, as published by the Free Software Foundation. 8 8 - * 9 9 - * This program is distributed in the hope it will be useful, but WITHOUT 10 10 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 11 - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 12 - * more details. 13 13 - * 14 14 - * You should have received a copy of the GNU General Public License along with 15 15 - * this program; if not, write to the Free Software Foundation, Inc., 16 16 - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 17 17 - * 18 18 - */ 19 19 - /* This driver helps to switch Langwell OTG controller function between host 20 20 - * and peripheral. It works with EHCI driver and Langwell client controller 21 21 - * driver together. 22 22 - */ 23 23 - #include <linux/module.h> 24 24 - #include <linux/init.h> 25 25 - #include <linux/pci.h> 26 26 - #include <linux/errno.h> 27 27 - #include <linux/interrupt.h> 28 28 - #include <linux/kernel.h> 29 29 - #include <linux/device.h> 30 30 - #include <linux/moduleparam.h> 31 31 - #include <linux/usb/ch9.h> 32 32 - #include <linux/usb/gadget.h> 33 33 - #include <linux/usb.h> 34 34 - #include <linux/usb/otg.h> 35 35 - #include <linux/usb/hcd.h> 36 36 - #include <linux/notifier.h> 37 37 - #include <linux/delay.h> 38 38 - #include <asm/intel_scu_ipc.h> 39 39 - 40 40 - #include <linux/usb/langwell_otg.h> 41 41 - 42 42 - #define DRIVER_DESC "Intel Langwell USB OTG transceiver driver" 43 43 - #define DRIVER_VERSION "July 10, 2010" 44 44 - 45 45 - MODULE_DESCRIPTION(DRIVER_DESC); 46 46 - MODULE_AUTHOR("Henry Yuan <hang.yuan@intel.com>, Hao Wu <hao.wu@intel.com>"); 47 47 - MODULE_VERSION(DRIVER_VERSION); 48 48 - MODULE_LICENSE("GPL"); 49 49 - 50 50 - static const char driver_name[] = "langwell_otg"; 51 51 - 52 52 - static int langwell_otg_probe(struct pci_dev *pdev, 53 53 - const struct pci_device_id *id); 54 54 - static void langwell_otg_remove(struct pci_dev *pdev); 55 55 - static int langwell_otg_suspend(struct pci_dev *pdev, pm_message_t message); 56 56 - static int langwell_otg_resume(struct pci_dev *pdev); 57 57 - 58 58 - static int langwell_otg_set_host(struct otg_transceiver *otg, 59 59 - struct usb_bus *host); 60 60 - static int langwell_otg_set_peripheral(struct otg_transceiver *otg, 61 61 - struct usb_gadget *gadget); 62 62 - static int langwell_otg_start_srp(struct otg_transceiver *otg); 63 63 - 64 64 - static const struct pci_device_id pci_ids[] = {{ 65 65 - .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe), 66 66 - .class_mask = ~0, 67 67 - .vendor = 0x8086, 68 68 - .device = 0x0811, 69 69 - .subvendor = PCI_ANY_ID, 70 70 - .subdevice = PCI_ANY_ID, 71 71 - }, { /* end: all zeroes */ } 72 72 - }; 73 73 - 74 74 - static struct pci_driver otg_pci_driver = { 75 75 - .name = (char *) driver_name, 76 76 - .id_table = pci_ids, 77 77 - 78 78 - .probe = langwell_otg_probe, 79 79 - .remove = langwell_otg_remove, 80 80 - 81 81 - .suspend = langwell_otg_suspend, 82 82 - .resume = langwell_otg_resume, 83 83 - }; 84 84 - 85 85 - /* HSM timers */ 86 86 - static inline struct langwell_otg_timer *otg_timer_initializer 87 87 - (void (*function)(unsigned long), unsigned long expires, unsigned long data) 88 88 - { 89 89 - struct langwell_otg_timer *timer; 90 90 - timer = kmalloc(sizeof(struct langwell_otg_timer), GFP_KERNEL); 91 91 - if (timer == NULL) 92 92 - return timer; 93 93 - 94 94 - timer->function = function; 95 95 - timer->expires = expires; 96 96 - timer->data = data; 97 97 - return timer; 98 98 - } 99 99 - 100 100 - static struct langwell_otg_timer *a_wait_vrise_tmr, *a_aidl_bdis_tmr, 101 101 - *b_se0_srp_tmr, *b_srp_init_tmr; 102 102 - 103 103 - static struct list_head active_timers; 104 104 - 105 105 - static struct langwell_otg *the_transceiver; 106 106 - 107 107 - /* host/client notify transceiver when event affects HNP state */ 108 108 - void langwell_update_transceiver(void) 109 109 - { 110 110 - struct langwell_otg *lnw = the_transceiver; 111 111 - 112 112 - dev_dbg(lnw->dev, "transceiver is updated\n"); 113 113 - 114 114 - if (!lnw->qwork) 115 115 - return ; 116 116 - 117 117 - queue_work(lnw->qwork, &lnw->work); 118 118 - } 119 119 - EXPORT_SYMBOL(langwell_update_transceiver); 120 120 - 121 121 - static int langwell_otg_set_host(struct otg_transceiver *otg, 122 122 - struct usb_bus *host) 123 123 - { 124 124 - otg->host = host; 125 125 - 126 126 - return 0; 127 127 - } 128 128 - 129 129 - static int langwell_otg_set_peripheral(struct otg_transceiver *otg, 130 130 - struct usb_gadget *gadget) 131 131 - { 132 132 - otg->gadget = gadget; 133 133 - 134 134 - return 0; 135 135 - } 136 136 - 137 137 - static int langwell_otg_set_power(struct otg_transceiver *otg, 138 138 - unsigned mA) 139 139 - { 140 140 - return 0; 141 141 - } 142 142 - 143 143 - /* A-device drives vbus, controlled through IPC commands */ 144 144 - static int langwell_otg_set_vbus(struct otg_transceiver *otg, bool enabled) 145 145 - { 146 146 - struct langwell_otg *lnw = the_transceiver; 147 147 - u8 sub_id; 148 148 - 149 149 - dev_dbg(lnw->dev, "%s <--- %s\n", __func__, enabled ? "on" : "off"); 150 150 - 151 151 - if (enabled) 152 152 - sub_id = 0x8; /* Turn on the VBus */ 153 153 - else 154 154 - sub_id = 0x9; /* Turn off the VBus */ 155 155 - 156 156 - if (intel_scu_ipc_simple_command(0xef, sub_id)) { 157 157 - dev_dbg(lnw->dev, "Failed to set Vbus via IPC commands\n"); 158 158 - return -EBUSY; 159 159 - } 160 160 - 161 161 - dev_dbg(lnw->dev, "%s --->\n", __func__); 162 162 - 163 163 - return 0; 164 164 - } 165 165 - 166 166 - /* charge vbus or discharge vbus through a resistor to ground */ 167 167 - static void langwell_otg_chrg_vbus(int on) 168 168 - { 169 169 - struct langwell_otg *lnw = the_transceiver; 170 170 - u32 val; 171 171 - 172 172 - val = readl(lnw->iotg.base + CI_OTGSC); 173 173 - 174 174 - if (on) 175 175 - writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_VC, 176 176 - lnw->iotg.base + CI_OTGSC); 177 177 - else 178 178 - writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_VD, 179 179 - lnw->iotg.base + CI_OTGSC); 180 180 - } 181 181 - 182 182 - /* Start SRP */ 183 183 - static int langwell_otg_start_srp(struct otg_transceiver *otg) 184 184 - { 185 185 - struct langwell_otg *lnw = the_transceiver; 186 186 - struct intel_mid_otg_xceiv *iotg = &lnw->iotg; 187 187 - u32 val; 188 188 - 189 189 - dev_dbg(lnw->dev, "%s --->\n", __func__); 190 190 - 191 191 - val = readl(iotg->base + CI_OTGSC); 192 192 - 193 193 - writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_HADP, 194 194 - iotg->base + CI_OTGSC); 195 195 - 196 196 - /* Check if the data plus is finished or not */ 197 197 - msleep(8); 198 198 - val = readl(iotg->base + CI_OTGSC); 199 199 - if (val & (OTGSC_HADP | OTGSC_DP)) 200 200 - dev_dbg(lnw->dev, "DataLine SRP Error\n"); 201 201 - 202 202 - /* Disable interrupt - b_sess_vld */ 203 203 - val = readl(iotg->base + CI_OTGSC); 204 204 - val &= (~(OTGSC_BSVIE | OTGSC_BSEIE)); 205 205 - writel(val, iotg->base + CI_OTGSC); 206 206 - 207 207 - /* Start VBus SRP, drive vbus to generate VBus pulse */ 208 208 - iotg->otg.set_vbus(&iotg->otg, true); 209 209 - msleep(15); 210 210 - iotg->otg.set_vbus(&iotg->otg, false); 211 211 - 212 212 - /* Enable interrupt - b_sess_vld*/ 213 213 - val = readl(iotg->base + CI_OTGSC); 214 214 - dev_dbg(lnw->dev, "after VBUS pulse otgsc = %x\n", val); 215 215 - 216 216 - val |= (OTGSC_BSVIE | OTGSC_BSEIE); 217 217 - writel(val, iotg->base + CI_OTGSC); 218 218 - 219 219 - /* If Vbus is valid, then update the hsm */ 220 220 - if (val & OTGSC_BSV) { 221 221 - dev_dbg(lnw->dev, "no b_sess_vld interrupt\n"); 222 222 - 223 223 - lnw->iotg.hsm.b_sess_vld = 1; 224 224 - langwell_update_transceiver(); 225 225 - } 226 226 - 227 227 - dev_dbg(lnw->dev, "%s <---\n", __func__); 228 228 - return 0; 229 229 - } 230 230 - 231 231 - /* stop SOF via bus_suspend */ 232 232 - static void langwell_otg_loc_sof(int on) 233 233 - { 234 234 - struct langwell_otg *lnw = the_transceiver; 235 235 - struct usb_hcd *hcd; 236 236 - int err; 237 237 - 238 238 - dev_dbg(lnw->dev, "%s ---> %s\n", __func__, on ? "suspend" : "resume"); 239 239 - 240 240 - hcd = bus_to_hcd(lnw->iotg.otg.host); 241 241 - if (on) 242 242 - err = hcd->driver->bus_resume(hcd); 243 243 - else 244 244 - err = hcd->driver->bus_suspend(hcd); 245 245 - 246 246 - if (err) 247 247 - dev_dbg(lnw->dev, "Fail to resume/suspend USB bus - %d\n", err); 248 248 - 249 249 - dev_dbg(lnw->dev, "%s <---\n", __func__); 250 250 - } 251 251 - 252 252 - static int langwell_otg_check_otgsc(void) 253 253 - { 254 254 - struct langwell_otg *lnw = the_transceiver; 255 255 - u32 otgsc, usbcfg; 256 256 - 257 257 - dev_dbg(lnw->dev, "check sync OTGSC and USBCFG registers\n"); 258 258 - 259 259 - otgsc = readl(lnw->iotg.base + CI_OTGSC); 260 260 - usbcfg = readl(lnw->usbcfg); 261 261 - 262 262 - dev_dbg(lnw->dev, "OTGSC = %08x, USBCFG = %08x\n", 263 263 - otgsc, usbcfg); 264 264 - dev_dbg(lnw->dev, "OTGSC_AVV = %d\n", !!(otgsc & OTGSC_AVV)); 265 265 - dev_dbg(lnw->dev, "USBCFG.VBUSVAL = %d\n", 266 266 - !!(usbcfg & USBCFG_VBUSVAL)); 267 267 - dev_dbg(lnw->dev, "OTGSC_ASV = %d\n", !!(otgsc & OTGSC_ASV)); 268 268 - dev_dbg(lnw->dev, "USBCFG.AVALID = %d\n", 269 269 - !!(usbcfg & USBCFG_AVALID)); 270 270 - dev_dbg(lnw->dev, "OTGSC_BSV = %d\n", !!(otgsc & OTGSC_BSV)); 271 271 - dev_dbg(lnw->dev, "USBCFG.BVALID = %d\n", 272 272 - !!(usbcfg & USBCFG_BVALID)); 273 273 - dev_dbg(lnw->dev, "OTGSC_BSE = %d\n", !!(otgsc & OTGSC_BSE)); 274 274 - dev_dbg(lnw->dev, "USBCFG.SESEND = %d\n", 275 275 - !!(usbcfg & USBCFG_SESEND)); 276 276 - 277 277 - /* Check USBCFG VBusValid/AValid/BValid/SessEnd */ 278 278 - if (!!(otgsc & OTGSC_AVV) ^ !!(usbcfg & USBCFG_VBUSVAL)) { 279 279 - dev_dbg(lnw->dev, "OTGSC.AVV != USBCFG.VBUSVAL\n"); 280 280 - goto err; 281 281 - } 282 282 - if (!!(otgsc & OTGSC_ASV) ^ !!(usbcfg & USBCFG_AVALID)) { 283 283 - dev_dbg(lnw->dev, "OTGSC.ASV != USBCFG.AVALID\n"); 284 284 - goto err; 285 285 - } 286 286 - if (!!(otgsc & OTGSC_BSV) ^ !!(usbcfg & USBCFG_BVALID)) { 287 287 - dev_dbg(lnw->dev, "OTGSC.BSV != USBCFG.BVALID\n"); 288 288 - goto err; 289 289 - } 290 290 - if (!!(otgsc & OTGSC_BSE) ^ !!(usbcfg & USBCFG_SESEND)) { 291 291 - dev_dbg(lnw->dev, "OTGSC.BSE != USBCFG.SESSEN\n"); 292 292 - goto err; 293 293 - } 294 294 - 295 295 - dev_dbg(lnw->dev, "OTGSC and USBCFG are synced\n"); 296 296 - 297 297 - return 0; 298 298 - 299 299 - err: 300 300 - dev_warn(lnw->dev, "OTGSC isn't equal to USBCFG\n"); 301 301 - return -EPIPE; 302 302 - } 303 303 - 304 304 - 305 305 - static void langwell_otg_phy_low_power(int on) 306 306 - { 307 307 - struct langwell_otg *lnw = the_transceiver; 308 308 - struct intel_mid_otg_xceiv *iotg = &lnw->iotg; 309 309 - u8 val, phcd; 310 310 - int retval; 311 311 - 312 312 - dev_dbg(lnw->dev, "%s ---> %s mode\n", 313 313 - __func__, on ? "Low power" : "Normal"); 314 314 - 315 315 - phcd = 0x40; 316 316 - 317 317 - val = readb(iotg->base + CI_HOSTPC1 + 2); 318 318 - 319 319 - if (on) { 320 320 - /* Due to hardware issue, after set PHCD, sync will failed 321 321 - * between USBCFG and OTGSC, so before set PHCD, check if 322 322 - * sync is in process now. If the answer is "yes", then do 323 323 - * not touch PHCD bit */ 324 324 - retval = langwell_otg_check_otgsc(); 325 325 - if (retval) { 326 326 - dev_dbg(lnw->dev, "Skip PHCD programming..\n"); 327 327 - return ; 328 328 - } 329 329 - 330 330 - writeb(val | phcd, iotg->base + CI_HOSTPC1 + 2); 331 331 - } else 332 332 - writeb(val & ~phcd, iotg->base + CI_HOSTPC1 + 2); 333 333 - 334 334 - dev_dbg(lnw->dev, "%s <--- done\n", __func__); 335 335 - } 336 336 - 337 337 - /* After drv vbus, add 5 ms delay to set PHCD */ 338 338 - static void langwell_otg_phy_low_power_wait(int on) 339 339 - { 340 340 - struct langwell_otg *lnw = the_transceiver; 341 341 - 342 342 - dev_dbg(lnw->dev, "add 5ms delay before programing PHCD\n"); 343 343 - 344 344 - mdelay(5); 345 345 - langwell_otg_phy_low_power(on); 346 346 - } 347 347 - 348 348 - /* Enable/Disable OTG interrupt */ 349 349 - static void langwell_otg_intr(int on) 350 350 - { 351 351 - struct langwell_otg *lnw = the_transceiver; 352 352 - struct intel_mid_otg_xceiv *iotg = &lnw->iotg; 353 353 - u32 val; 354 354 - 355 355 - dev_dbg(lnw->dev, "%s ---> %s\n", __func__, on ? "on" : "off"); 356 356 - 357 357 - val = readl(iotg->base + CI_OTGSC); 358 358 - 359 359 - /* OTGSC_INT_MASK doesn't contains 1msInt */ 360 360 - if (on) { 361 361 - val = val | (OTGSC_INT_MASK); 362 362 - writel(val, iotg->base + CI_OTGSC); 363 363 - } else { 364 364 - val = val & ~(OTGSC_INT_MASK); 365 365 - writel(val, iotg->base + CI_OTGSC); 366 366 - } 367 367 - 368 368 - dev_dbg(lnw->dev, "%s <---\n", __func__); 369 369 - } 370 370 - 371 371 - /* set HAAR: Hardware Assist Auto-Reset */ 372 372 - static void langwell_otg_HAAR(int on) 373 373 - { 374 374 - struct langwell_otg *lnw = the_transceiver; 375 375 - struct intel_mid_otg_xceiv *iotg = &lnw->iotg; 376 376 - u32 val; 377 377 - 378 378 - dev_dbg(lnw->dev, "%s ---> %s\n", __func__, on ? "on" : "off"); 379 379 - 380 380 - val = readl(iotg->base + CI_OTGSC); 381 381 - if (on) 382 382 - writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_HAAR, 383 383 - iotg->base + CI_OTGSC); 384 384 - else 385 385 - writel((val & ~OTGSC_INTSTS_MASK) & ~OTGSC_HAAR, 386 386 - iotg->base + CI_OTGSC); 387 387 - 388 388 - dev_dbg(lnw->dev, "%s <---\n", __func__); 389 389 - } 390 390 - 391 391 - /* set HABA: Hardware Assist B-Disconnect to A-Connect */ 392 392 - static void langwell_otg_HABA(int on) 393 393 - { 394 394 - struct langwell_otg *lnw = the_transceiver; 395 395 - struct intel_mid_otg_xceiv *iotg = &lnw->iotg; 396 396 - u32 val; 397 397 - 398 398 - dev_dbg(lnw->dev, "%s ---> %s\n", __func__, on ? "on" : "off"); 399 399 - 400 400 - val = readl(iotg->base + CI_OTGSC); 401 401 - if (on) 402 402 - writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_HABA, 403 403 - iotg->base + CI_OTGSC); 404 404 - else 405 405 - writel((val & ~OTGSC_INTSTS_MASK) & ~OTGSC_HABA, 406 406 - iotg->base + CI_OTGSC); 407 407 - 408 408 - dev_dbg(lnw->dev, "%s <---\n", __func__); 409 409 - } 410 410 - 411 411 - static int langwell_otg_check_se0_srp(int on) 412 412 - { 413 413 - struct langwell_otg *lnw = the_transceiver; 414 414 - int delay_time = TB_SE0_SRP * 10; 415 415 - u32 val; 416 416 - 417 417 - dev_dbg(lnw->dev, "%s --->\n", __func__); 418 418 - 419 419 - do { 420 420 - udelay(100); 421 421 - if (!delay_time--) 422 422 - break; 423 423 - val = readl(lnw->iotg.base + CI_PORTSC1); 424 424 - val &= PORTSC_LS; 425 425 - } while (!val); 426 426 - 427 427 - dev_dbg(lnw->dev, "%s <---\n", __func__); 428 428 - return val; 429 429 - } 430 430 - 431 431 - /* The timeout callback function to set time out bit */ 432 432 - static void set_tmout(unsigned long indicator) 433 433 - { 434 434 - *(int *)indicator = 1; 435 435 - } 436 436 - 437 437 - void langwell_otg_nsf_msg(unsigned long indicator) 438 438 - { 439 439 - struct langwell_otg *lnw = the_transceiver; 440 440 - 441 441 - switch (indicator) { 442 442 - case 2: 443 443 - case 4: 444 444 - case 6: 445 445 - case 7: 446 446 - dev_warn(lnw->dev, 447 447 - "OTG:NSF-%lu - deivce not responding\n", indicator); 448 448 - break; 449 449 - case 3: 450 450 - dev_warn(lnw->dev, 451 451 - "OTG:NSF-%lu - deivce not supported\n", indicator); 452 452 - break; 453 453 - default: 454 454 - dev_warn(lnw->dev, "Do not have this kind of NSF\n"); 455 455 - break; 456 456 - } 457 457 - } 458 458 - 459 459 - /* Initialize timers */ 460 460 - static int langwell_otg_init_timers(struct otg_hsm *hsm) 461 461 - { 462 462 - /* HSM used timers */ 463 463 - a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE, 464 464 - (unsigned long)&hsm->a_wait_vrise_tmout); 465 465 - if (a_wait_vrise_tmr == NULL) 466 466 - return -ENOMEM; 467 467 - a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS, 468 468 - (unsigned long)&hsm->a_aidl_bdis_tmout); 469 469 - if (a_aidl_bdis_tmr == NULL) 470 470 - return -ENOMEM; 471 471 - b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP, 472 472 - (unsigned long)&hsm->b_se0_srp); 473 473 - if (b_se0_srp_tmr == NULL) 474 474 - return -ENOMEM; 475 475 - b_srp_init_tmr = otg_timer_initializer(&set_tmout, TB_SRP_INIT, 476 476 - (unsigned long)&hsm->b_srp_init_tmout); 477 477 - if (b_srp_init_tmr == NULL) 478 478 - return -ENOMEM; 479 479 - 480 480 - return 0; 481 481 - } 482 482 - 483 483 - /* Free timers */ 484 484 - static void langwell_otg_free_timers(void) 485 485 - { 486 486 - kfree(a_wait_vrise_tmr); 487 487 - kfree(a_aidl_bdis_tmr); 488 488 - kfree(b_se0_srp_tmr); 489 489 - kfree(b_srp_init_tmr); 490 490 - } 491 491 - 492 492 - /* The timeout callback function to set time out bit */ 493 493 - static void langwell_otg_timer_fn(unsigned long indicator) 494 494 - { 495 495 - struct langwell_otg *lnw = the_transceiver; 496 496 - 497 497 - *(int *)indicator = 1; 498 498 - 499 499 - dev_dbg(lnw->dev, "kernel timer - timeout\n"); 500 500 - 501 501 - langwell_update_transceiver(); 502 502 - } 503 503 - 504 504 - /* kernel timer used instead of HW based interrupt */ 505 505 - static void langwell_otg_add_ktimer(enum langwell_otg_timer_type timers) 506 506 - { 507 507 - struct langwell_otg *lnw = the_transceiver; 508 508 - struct intel_mid_otg_xceiv *iotg = &lnw->iotg; 509 509 - unsigned long j = jiffies; 510 510 - unsigned long data, time; 511 511 - 512 512 - switch (timers) { 513 513 - case TA_WAIT_VRISE_TMR: 514 514 - iotg->hsm.a_wait_vrise_tmout = 0; 515 515 - data = (unsigned long)&iotg->hsm.a_wait_vrise_tmout; 516 516 - time = TA_WAIT_VRISE; 517 517 - break; 518 518 - case TA_WAIT_BCON_TMR: 519 519 - iotg->hsm.a_wait_bcon_tmout = 0; 520 520 - data = (unsigned long)&iotg->hsm.a_wait_bcon_tmout; 521 521 - time = TA_WAIT_BCON; 522 522 - break; 523 523 - case TA_AIDL_BDIS_TMR: 524 524 - iotg->hsm.a_aidl_bdis_tmout = 0; 525 525 - data = (unsigned long)&iotg->hsm.a_aidl_bdis_tmout; 526 526 - time = TA_AIDL_BDIS; 527 527 - break; 528 528 - case TB_ASE0_BRST_TMR: 529 529 - iotg->hsm.b_ase0_brst_tmout = 0; 530 530 - data = (unsigned long)&iotg->hsm.b_ase0_brst_tmout; 531 531 - time = TB_ASE0_BRST; 532 532 - break; 533 533 - case TB_SRP_INIT_TMR: 534 534 - iotg->hsm.b_srp_init_tmout = 0; 535 535 - data = (unsigned long)&iotg->hsm.b_srp_init_tmout; 536 536 - time = TB_SRP_INIT; 537 537 - break; 538 538 - case TB_SRP_FAIL_TMR: 539 539 - iotg->hsm.b_srp_fail_tmout = 0; 540 540 - data = (unsigned long)&iotg->hsm.b_srp_fail_tmout; 541 541 - time = TB_SRP_FAIL; 542 542 - break; 543 543 - case TB_BUS_SUSPEND_TMR: 544 544 - iotg->hsm.b_bus_suspend_tmout = 0; 545 545 - data = (unsigned long)&iotg->hsm.b_bus_suspend_tmout; 546 546 - time = TB_BUS_SUSPEND; 547 547 - break; 548 548 - default: 549 549 - dev_dbg(lnw->dev, "unknown timer, cannot enable it\n"); 550 550 - return; 551 551 - } 552 552 - 553 553 - lnw->hsm_timer.data = data; 554 554 - lnw->hsm_timer.function = langwell_otg_timer_fn; 555 555 - lnw->hsm_timer.expires = j + time * HZ / 1000; /* milliseconds */ 556 556 - 557 557 - add_timer(&lnw->hsm_timer); 558 558 - 559 559 - dev_dbg(lnw->dev, "add timer successfully\n"); 560 560 - } 561 561 - 562 562 - /* Add timer to timer list */ 563 563 - static void langwell_otg_add_timer(void *gtimer) 564 564 - { 565 565 - struct langwell_otg_timer *timer = (struct langwell_otg_timer *)gtimer; 566 566 - struct langwell_otg_timer *tmp_timer; 567 567 - struct intel_mid_otg_xceiv *iotg = &the_transceiver->iotg; 568 568 - u32 val32; 569 569 - 570 570 - /* Check if the timer is already in the active list, 571 571 - * if so update timer count 572 572 - */ 573 573 - list_for_each_entry(tmp_timer, &active_timers, list) 574 574 - if (tmp_timer == timer) { 575 575 - timer->count = timer->expires; 576 576 - return; 577 577 - } 578 578 - timer->count = timer->expires; 579 579 - 580 580 - if (list_empty(&active_timers)) { 581 581 - val32 = readl(iotg->base + CI_OTGSC); 582 582 - writel(val32 | OTGSC_1MSE, iotg->base + CI_OTGSC); 583 583 - } 584 584 - 585 585 - list_add_tail(&timer->list, &active_timers); 586 586 - } 587 587 - 588 588 - /* Remove timer from the timer list; clear timeout status */ 589 589 - static void langwell_otg_del_timer(void *gtimer) 590 590 - { 591 591 - struct langwell_otg *lnw = the_transceiver; 592 592 - struct langwell_otg_timer *timer = (struct langwell_otg_timer *)gtimer; 593 593 - struct langwell_otg_timer *tmp_timer, *del_tmp; 594 594 - u32 val32; 595 595 - 596 596 - list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) 597 597 - if (tmp_timer == timer) 598 598 - list_del(&timer->list); 599 599 - 600 600 - if (list_empty(&active_timers)) { 601 601 - val32 = readl(lnw->iotg.base + CI_OTGSC); 602 602 - writel(val32 & ~OTGSC_1MSE, lnw->iotg.base + CI_OTGSC); 603 603 - } 604 604 - } 605 605 - 606 606 - /* Reduce timer count by 1, and find timeout conditions.*/ 607 607 - static int langwell_otg_tick_timer(u32 *int_sts) 608 608 - { 609 609 - struct langwell_otg *lnw = the_transceiver; 610 610 - struct langwell_otg_timer *tmp_timer, *del_tmp; 611 611 - int expired = 0; 612 612 - 613 613 - list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) { 614 614 - tmp_timer->count--; 615 615 - /* check if timer expires */ 616 616 - if (!tmp_timer->count) { 617 617 - list_del(&tmp_timer->list); 618 618 - tmp_timer->function(tmp_timer->data); 619 619 - expired = 1; 620 620 - } 621 621 - } 622 622 - 623 623 - if (list_empty(&active_timers)) { 624 624 - dev_dbg(lnw->dev, "tick timer: disable 1ms int\n"); 625 625 - *int_sts = *int_sts & ~OTGSC_1MSE; 626 626 - } 627 627 - return expired; 628 628 - } 629 629 - 630 630 - static void reset_otg(void) 631 631 - { 632 632 - struct langwell_otg *lnw = the_transceiver; 633 633 - int delay_time = 1000; 634 634 - u32 val; 635 635 - 636 636 - dev_dbg(lnw->dev, "reseting OTG controller ...\n"); 637 637 - val = readl(lnw->iotg.base + CI_USBCMD); 638 638 - writel(val | USBCMD_RST, lnw->iotg.base + CI_USBCMD); 639 639 - do { 640 640 - udelay(100); 641 641 - if (!delay_time--) 642 642 - dev_dbg(lnw->dev, "reset timeout\n"); 643 643 - val = readl(lnw->iotg.base + CI_USBCMD); 644 644 - val &= USBCMD_RST; 645 645 - } while (val != 0); 646 646 - dev_dbg(lnw->dev, "reset done.\n"); 647 647 - } 648 648 - 649 649 - static void set_host_mode(void) 650 650 - { 651 651 - struct langwell_otg *lnw = the_transceiver; 652 652 - u32 val; 653 653 - 654 654 - reset_otg(); 655 655 - val = readl(lnw->iotg.base + CI_USBMODE); 656 656 - val = (val & (~USBMODE_CM)) | USBMODE_HOST; 657 657 - writel(val, lnw->iotg.base + CI_USBMODE); 658 658 - } 659 659 - 660 660 - static void set_client_mode(void) 661 661 - { 662 662 - struct langwell_otg *lnw = the_transceiver; 663 663 - u32 val; 664 664 - 665 665 - reset_otg(); 666 666 - val = readl(lnw->iotg.base + CI_USBMODE); 667 667 - val = (val & (~USBMODE_CM)) | USBMODE_DEVICE; 668 668 - writel(val, lnw->iotg.base + CI_USBMODE); 669 669 - } 670 670 - 671 671 - static void init_hsm(void) 672 672 - { 673 673 - struct langwell_otg *lnw = the_transceiver; 674 674 - struct intel_mid_otg_xceiv *iotg = &lnw->iotg; 675 675 - u32 val32; 676 676 - 677 677 - /* read OTGSC after reset */ 678 678 - val32 = readl(lnw->iotg.base + CI_OTGSC); 679 679 - dev_dbg(lnw->dev, "%s: OTGSC init value = 0x%x\n", __func__, val32); 680 680 - 681 681 - /* set init state */ 682 682 - if (val32 & OTGSC_ID) { 683 683 - iotg->hsm.id = 1; 684 684 - iotg->otg.default_a = 0; 685 685 - set_client_mode(); 686 686 - iotg->otg.state = OTG_STATE_B_IDLE; 687 687 - } else { 688 688 - iotg->hsm.id = 0; 689 689 - iotg->otg.default_a = 1; 690 690 - set_host_mode(); 691 691 - iotg->otg.state = OTG_STATE_A_IDLE; 692 692 - } 693 693 - 694 694 - /* set session indicator */ 695 695 - if (val32 & OTGSC_BSE) 696 696 - iotg->hsm.b_sess_end = 1; 697 697 - if (val32 & OTGSC_BSV) 698 698 - iotg->hsm.b_sess_vld = 1; 699 699 - if (val32 & OTGSC_ASV) 700 700 - iotg->hsm.a_sess_vld = 1; 701 701 - if (val32 & OTGSC_AVV) 702 702 - iotg->hsm.a_vbus_vld = 1; 703 703 - 704 704 - /* defautly power the bus */ 705 705 - iotg->hsm.a_bus_req = 1; 706 706 - iotg->hsm.a_bus_drop = 0; 707 707 - /* defautly don't request bus as B device */ 708 708 - iotg->hsm.b_bus_req = 0; 709 709 - /* no system error */ 710 710 - iotg->hsm.a_clr_err = 0; 711 711 - 712 712 - langwell_otg_phy_low_power_wait(1); 713 713 - } 714 714 - 715 715 - static void update_hsm(void) 716 716 - { 717 717 - struct langwell_otg *lnw = the_transceiver; 718 718 - struct intel_mid_otg_xceiv *iotg = &lnw->iotg; 719 719 - u32 val32; 720 720 - 721 721 - /* read OTGSC */ 722 722 - val32 = readl(lnw->iotg.base + CI_OTGSC); 723 723 - dev_dbg(lnw->dev, "%s: OTGSC value = 0x%x\n", __func__, val32); 724 724 - 725 725 - iotg->hsm.id = !!(val32 & OTGSC_ID); 726 726 - iotg->hsm.b_sess_end = !!(val32 & OTGSC_BSE); 727 727 - iotg->hsm.b_sess_vld = !!(val32 & OTGSC_BSV); 728 728 - iotg->hsm.a_sess_vld = !!(val32 & OTGSC_ASV); 729 729 - iotg->hsm.a_vbus_vld = !!(val32 & OTGSC_AVV); 730 730 - } 731 731 - 732 732 - static irqreturn_t otg_dummy_irq(int irq, void *_dev) 733 733 - { 734 734 - struct langwell_otg *lnw = the_transceiver; 735 735 - void __iomem *reg_base = _dev; 736 736 - u32 val; 737 737 - u32 int_mask = 0; 738 738 - 739 739 - val = readl(reg_base + CI_USBMODE); 740 740 - if ((val & USBMODE_CM) != USBMODE_DEVICE) 741 741 - return IRQ_NONE; 742 742 - 743 743 - val = readl(reg_base + CI_USBSTS); 744 744 - int_mask = val & INTR_DUMMY_MASK; 745 745 - 746 746 - if (int_mask == 0) 747 747 - return IRQ_NONE; 748 748 - 749 749 - /* clear hsm.b_conn here since host driver can't detect it 750 750 - * otg_dummy_irq called means B-disconnect happened. 751 751 - */ 752 752 - if (lnw->iotg.hsm.b_conn) { 753 753 - lnw->iotg.hsm.b_conn = 0; 754 754 - if (spin_trylock(&lnw->wq_lock)) { 755 755 - langwell_update_transceiver(); 756 756 - spin_unlock(&lnw->wq_lock); 757 757 - } 758 758 - } 759 759 - 760 760 - /* Clear interrupts */ 761 761 - writel(int_mask, reg_base + CI_USBSTS); 762 762 - return IRQ_HANDLED; 763 763 - } 764 764 - 765 765 - static irqreturn_t otg_irq(int irq, void *_dev) 766 766 - { 767 767 - struct langwell_otg *lnw = _dev; 768 768 - struct intel_mid_otg_xceiv *iotg = &lnw->iotg; 769 769 - u32 int_sts, int_en; 770 770 - u32 int_mask = 0; 771 771 - int flag = 0; 772 772 - 773 773 - int_sts = readl(lnw->iotg.base + CI_OTGSC); 774 774 - int_en = (int_sts & OTGSC_INTEN_MASK) >> 8; 775 775 - int_mask = int_sts & int_en; 776 776 - if (int_mask == 0) 777 777 - return IRQ_NONE; 778 778 - 779 779 - if (int_mask & OTGSC_IDIS) { 780 780 - dev_dbg(lnw->dev, "%s: id change int\n", __func__); 781 781 - iotg->hsm.id = (int_sts & OTGSC_ID) ? 1 : 0; 782 782 - dev_dbg(lnw->dev, "id = %d\n", iotg->hsm.id); 783 783 - flag = 1; 784 784 - } 785 785 - if (int_mask & OTGSC_DPIS) { 786 786 - dev_dbg(lnw->dev, "%s: data pulse int\n", __func__); 787 787 - iotg->hsm.a_srp_det = (int_sts & OTGSC_DPS) ? 1 : 0; 788 788 - dev_dbg(lnw->dev, "data pulse = %d\n", iotg->hsm.a_srp_det); 789 789 - flag = 1; 790 790 - } 791 791 - if (int_mask & OTGSC_BSEIS) { 792 792 - dev_dbg(lnw->dev, "%s: b session end int\n", __func__); 793 793 - iotg->hsm.b_sess_end = (int_sts & OTGSC_BSE) ? 1 : 0; 794 794 - dev_dbg(lnw->dev, "b_sess_end = %d\n", iotg->hsm.b_sess_end); 795 795 - flag = 1; 796 796 - } 797 797 - if (int_mask & OTGSC_BSVIS) { 798 798 - dev_dbg(lnw->dev, "%s: b session valid int\n", __func__); 799 799 - iotg->hsm.b_sess_vld = (int_sts & OTGSC_BSV) ? 1 : 0; 800 800 - dev_dbg(lnw->dev, "b_sess_vld = %d\n", iotg->hsm.b_sess_end); 801 801 - flag = 1; 802 802 - } 803 803 - if (int_mask & OTGSC_ASVIS) { 804 804 - dev_dbg(lnw->dev, "%s: a session valid int\n", __func__); 805 805 - iotg->hsm.a_sess_vld = (int_sts & OTGSC_ASV) ? 1 : 0; 806 806 - dev_dbg(lnw->dev, "a_sess_vld = %d\n", iotg->hsm.a_sess_vld); 807 807 - flag = 1; 808 808 - } 809 809 - if (int_mask & OTGSC_AVVIS) { 810 810 - dev_dbg(lnw->dev, "%s: a vbus valid int\n", __func__); 811 811 - iotg->hsm.a_vbus_vld = (int_sts & OTGSC_AVV) ? 1 : 0; 812 812 - dev_dbg(lnw->dev, "a_vbus_vld = %d\n", iotg->hsm.a_vbus_vld); 813 813 - flag = 1; 814 814 - } 815 815 - 816 816 - if (int_mask & OTGSC_1MSS) { 817 817 - /* need to schedule otg_work if any timer is expired */ 818 818 - if (langwell_otg_tick_timer(&int_sts)) 819 819 - flag = 1; 820 820 - } 821 821 - 822 822 - writel((int_sts & ~OTGSC_INTSTS_MASK) | int_mask, 823 823 - lnw->iotg.base + CI_OTGSC); 824 824 - if (flag) 825 825 - langwell_update_transceiver(); 826 826 - 827 827 - return IRQ_HANDLED; 828 828 - } 829 829 - 830 830 - static int langwell_otg_iotg_notify(struct notifier_block *nb, 831 831 - unsigned long action, void *data) 832 832 - { 833 833 - struct langwell_otg *lnw = the_transceiver; 834 834 - struct intel_mid_otg_xceiv *iotg = data; 835 835 - int flag = 0; 836 836 - 837 837 - if (iotg == NULL) 838 838 - return NOTIFY_BAD; 839 839 - 840 840 - if (lnw == NULL) 841 841 - return NOTIFY_BAD; 842 842 - 843 843 - switch (action) { 844 844 - case MID_OTG_NOTIFY_CONNECT: 845 845 - dev_dbg(lnw->dev, "Lnw OTG Notify Connect Event\n"); 846 846 - if (iotg->otg.default_a == 1) 847 847 - iotg->hsm.b_conn = 1; 848 848 - else 849 849 - iotg->hsm.a_conn = 1; 850 850 - flag = 1; 851 851 - break; 852 852 - case MID_OTG_NOTIFY_DISCONN: 853 853 - dev_dbg(lnw->dev, "Lnw OTG Notify Disconnect Event\n"); 854 854 - if (iotg->otg.default_a == 1) 855 855 - iotg->hsm.b_conn = 0; 856 856 - else 857 857 - iotg->hsm.a_conn = 0; 858 858 - flag = 1; 859 859 - break; 860 860 - case MID_OTG_NOTIFY_HSUSPEND: 861 861 - dev_dbg(lnw->dev, "Lnw OTG Notify Host Bus suspend Event\n"); 862 862 - if (iotg->otg.default_a == 1) 863 863 - iotg->hsm.a_suspend_req = 1; 864 864 - else 865 865 - iotg->hsm.b_bus_req = 0; 866 866 - flag = 1; 867 867 - break; 868 868 - case MID_OTG_NOTIFY_HRESUME: 869 869 - dev_dbg(lnw->dev, "Lnw OTG Notify Host Bus resume Event\n"); 870 870 - if (iotg->otg.default_a == 1) 871 871 - iotg->hsm.b_bus_resume = 1; 872 872 - flag = 1; 873 873 - break; 874 874 - case MID_OTG_NOTIFY_CSUSPEND: 875 875 - dev_dbg(lnw->dev, "Lnw OTG Notify Client Bus suspend Event\n"); 876 876 - if (iotg->otg.default_a == 1) { 877 877 - if (iotg->hsm.b_bus_suspend_vld == 2) { 878 878 - iotg->hsm.b_bus_suspend = 1; 879 879 - iotg->hsm.b_bus_suspend_vld = 0; 880 880 - flag = 1; 881 881 - } else { 882 882 - iotg->hsm.b_bus_suspend_vld++; 883 883 - flag = 0; 884 884 - } 885 885 - } else { 886 886 - if (iotg->hsm.a_bus_suspend == 0) { 887 887 - iotg->hsm.a_bus_suspend = 1; 888 888 - flag = 1; 889 889 - } 890 890 - } 891 891 - break; 892 892 - case MID_OTG_NOTIFY_CRESUME: 893 893 - dev_dbg(lnw->dev, "Lnw OTG Notify Client Bus resume Event\n"); 894 894 - if (iotg->otg.default_a == 0) 895 895 - iotg->hsm.a_bus_suspend = 0; 896 896 - flag = 0; 897 897 - break; 898 898 - case MID_OTG_NOTIFY_HOSTADD: 899 899 - dev_dbg(lnw->dev, "Lnw OTG Nofity Host Driver Add\n"); 900 900 - flag = 1; 901 901 - break; 902 902 - case MID_OTG_NOTIFY_HOSTREMOVE: 903 903 - dev_dbg(lnw->dev, "Lnw OTG Nofity Host Driver remove\n"); 904 904 - flag = 1; 905 905 - break; 906 906 - case MID_OTG_NOTIFY_CLIENTADD: 907 907 - dev_dbg(lnw->dev, "Lnw OTG Nofity Client Driver Add\n"); 908 908 - flag = 1; 909 909 - break; 910 910 - case MID_OTG_NOTIFY_CLIENTREMOVE: 911 911 - dev_dbg(lnw->dev, "Lnw OTG Nofity Client Driver remove\n"); 912 912 - flag = 1; 913 913 - break; 914 914 - default: 915 915 - dev_dbg(lnw->dev, "Lnw OTG Nofity unknown notify message\n"); 916 916 - return NOTIFY_DONE; 917 917 - } 918 918 - 919 919 - if (flag) 920 920 - langwell_update_transceiver(); 921 921 - 922 922 - return NOTIFY_OK; 923 923 - } 924 924 - 925 925 - static void langwell_otg_work(struct work_struct *work) 926 926 - { 927 927 - struct langwell_otg *lnw; 928 928 - struct intel_mid_otg_xceiv *iotg; 929 929 - int retval; 930 930 - struct pci_dev *pdev; 931 931 - 932 932 - lnw = container_of(work, struct langwell_otg, work); 933 933 - iotg = &lnw->iotg; 934 934 - pdev = to_pci_dev(lnw->dev); 935 935 - 936 936 - dev_dbg(lnw->dev, "%s: old state = %s\n", __func__, 937 937 - otg_state_string(iotg->otg.state)); 938 938 - 939 939 - switch (iotg->otg.state) { 940 940 - case OTG_STATE_UNDEFINED: 941 941 - case OTG_STATE_B_IDLE: 942 942 - if (!iotg->hsm.id) { 943 943 - langwell_otg_del_timer(b_srp_init_tmr); 944 944 - del_timer_sync(&lnw->hsm_timer); 945 945 - 946 946 - iotg->otg.default_a = 1; 947 947 - iotg->hsm.a_srp_det = 0; 948 948 - 949 949 - langwell_otg_chrg_vbus(0); 950 950 - set_host_mode(); 951 951 - langwell_otg_phy_low_power(1); 952 952 - 953 953 - iotg->otg.state = OTG_STATE_A_IDLE; 954 954 - langwell_update_transceiver(); 955 955 - } else if (iotg->hsm.b_sess_vld) { 956 956 - langwell_otg_del_timer(b_srp_init_tmr); 957 957 - del_timer_sync(&lnw->hsm_timer); 958 958 - iotg->hsm.b_sess_end = 0; 959 959 - iotg->hsm.a_bus_suspend = 0; 960 960 - langwell_otg_chrg_vbus(0); 961 961 - 962 962 - if (lnw->iotg.start_peripheral) { 963 963 - lnw->iotg.start_peripheral(&lnw->iotg); 964 964 - iotg->otg.state = OTG_STATE_B_PERIPHERAL; 965 965 - } else 966 966 - dev_dbg(lnw->dev, "client driver not loaded\n"); 967 967 - 968 968 - } else if (iotg->hsm.b_srp_init_tmout) { 969 969 - iotg->hsm.b_srp_init_tmout = 0; 970 970 - dev_warn(lnw->dev, "SRP init timeout\n"); 971 971 - } else if (iotg->hsm.b_srp_fail_tmout) { 972 972 - iotg->hsm.b_srp_fail_tmout = 0; 973 973 - iotg->hsm.b_bus_req = 0; 974 974 - 975 975 - /* No silence failure */ 976 976 - langwell_otg_nsf_msg(6); 977 977 - } else if (iotg->hsm.b_bus_req && iotg->hsm.b_sess_end) { 978 978 - del_timer_sync(&lnw->hsm_timer); 979 979 - /* workaround for b_se0_srp detection */ 980 980 - retval = langwell_otg_check_se0_srp(0); 981 981 - if (retval) { 982 982 - iotg->hsm.b_bus_req = 0; 983 983 - dev_dbg(lnw->dev, "LS isn't SE0, try later\n"); 984 984 - } else { 985 985 - /* clear the PHCD before start srp */ 986 986 - langwell_otg_phy_low_power(0); 987 987 - 988 988 - /* Start SRP */ 989 989 - langwell_otg_add_timer(b_srp_init_tmr); 990 990 - iotg->otg.start_srp(&iotg->otg); 991 991 - langwell_otg_del_timer(b_srp_init_tmr); 992 992 - langwell_otg_add_ktimer(TB_SRP_FAIL_TMR); 993 993 - 994 994 - /* reset PHY low power mode here */ 995 995 - langwell_otg_phy_low_power_wait(1); 996 996 - } 997 997 - } 998 998 - break; 999 999 - case OTG_STATE_B_SRP_INIT: 1000 1000 - if (!iotg->hsm.id) { 1001 1001 - iotg->otg.default_a = 1; 1002 1002 - iotg->hsm.a_srp_det = 0; 1003 1003 - 1004 1004 - /* Turn off VBus */ 1005 1005 - iotg->otg.set_vbus(&iotg->otg, false); 1006 1006 - langwell_otg_chrg_vbus(0); 1007 1007 - set_host_mode(); 1008 1008 - langwell_otg_phy_low_power(1); 1009 1009 - iotg->otg.state = OTG_STATE_A_IDLE; 1010 1010 - langwell_update_transceiver(); 1011 1011 - } else if (iotg->hsm.b_sess_vld) { 1012 1012 - langwell_otg_chrg_vbus(0); 1013 1013 - if (lnw->iotg.start_peripheral) { 1014 1014 - lnw->iotg.start_peripheral(&lnw->iotg); 1015 1015 - iotg->otg.state = OTG_STATE_B_PERIPHERAL; 1016 1016 - } else 1017 1017 - dev_dbg(lnw->dev, "client driver not loaded\n"); 1018 1018 - } 1019 1019 - break; 1020 1020 - case OTG_STATE_B_PERIPHERAL: 1021 1021 - if (!iotg->hsm.id) { 1022 1022 - iotg->otg.default_a = 1; 1023 1023 - iotg->hsm.a_srp_det = 0; 1024 1024 - 1025 1025 - langwell_otg_chrg_vbus(0); 1026 1026 - 1027 1027 - if (lnw->iotg.stop_peripheral) 1028 1028 - lnw->iotg.stop_peripheral(&lnw->iotg); 1029 1029 - else 1030 1030 - dev_dbg(lnw->dev, 1031 1031 - "client driver has been removed.\n"); 1032 1032 - 1033 1033 - set_host_mode(); 1034 1034 - langwell_otg_phy_low_power(1); 1035 1035 - iotg->otg.state = OTG_STATE_A_IDLE; 1036 1036 - langwell_update_transceiver(); 1037 1037 - } else if (!iotg->hsm.b_sess_vld) { 1038 1038 - iotg->hsm.b_hnp_enable = 0; 1039 1039 - 1040 1040 - if (lnw->iotg.stop_peripheral) 1041 1041 - lnw->iotg.stop_peripheral(&lnw->iotg); 1042 1042 - else 1043 1043 - dev_dbg(lnw->dev, 1044 1044 - "client driver has been removed.\n"); 1045 1045 - 1046 1046 - iotg->otg.state = OTG_STATE_B_IDLE; 1047 1047 - } else if (iotg->hsm.b_bus_req && iotg->otg.gadget && 1048 1048 - iotg->otg.gadget->b_hnp_enable && 1049 1049 - iotg->hsm.a_bus_suspend) { 1050 1050 - 1051 1051 - if (lnw->iotg.stop_peripheral) 1052 1052 - lnw->iotg.stop_peripheral(&lnw->iotg); 1053 1053 - else 1054 1054 - dev_dbg(lnw->dev, 1055 1055 - "client driver has been removed.\n"); 1056 1056 - 1057 1057 - langwell_otg_HAAR(1); 1058 1058 - iotg->hsm.a_conn = 0; 1059 1059 - 1060 1060 - if (lnw->iotg.start_host) { 1061 1061 - lnw->iotg.start_host(&lnw->iotg); 1062 1062 - iotg->otg.state = OTG_STATE_B_WAIT_ACON; 1063 1063 - } else 1064 1064 - dev_dbg(lnw->dev, 1065 1065 - "host driver not loaded.\n"); 1066 1066 - 1067 1067 - iotg->hsm.a_bus_resume = 0; 1068 1068 - langwell_otg_add_ktimer(TB_ASE0_BRST_TMR); 1069 1069 - } 1070 1070 - break; 1071 1071 - 1072 1072 - case OTG_STATE_B_WAIT_ACON: 1073 1073 - if (!iotg->hsm.id) { 1074 1074 - /* delete hsm timer for b_ase0_brst_tmr */ 1075 1075 - del_timer_sync(&lnw->hsm_timer); 1076 1076 - 1077 1077 - iotg->otg.default_a = 1; 1078 1078 - iotg->hsm.a_srp_det = 0; 1079 1079 - 1080 1080 - langwell_otg_chrg_vbus(0); 1081 1081 - 1082 1082 - langwell_otg_HAAR(0); 1083 1083 - if (lnw->iotg.stop_host) 1084 1084 - lnw->iotg.stop_host(&lnw->iotg); 1085 1085 - else 1086 1086 - dev_dbg(lnw->dev, 1087 1087 - "host driver has been removed.\n"); 1088 1088 - 1089 1089 - set_host_mode(); 1090 1090 - langwell_otg_phy_low_power(1); 1091 1091 - iotg->otg.state = OTG_STATE_A_IDLE; 1092 1092 - langwell_update_transceiver(); 1093 1093 - } else if (!iotg->hsm.b_sess_vld) { 1094 1094 - /* delete hsm timer for b_ase0_brst_tmr */ 1095 1095 - del_timer_sync(&lnw->hsm_timer); 1096 1096 - 1097 1097 - iotg->hsm.b_hnp_enable = 0; 1098 1098 - iotg->hsm.b_bus_req = 0; 1099 1099 - 1100 1100 - langwell_otg_chrg_vbus(0); 1101 1101 - langwell_otg_HAAR(0); 1102 1102 - 1103 1103 - if (lnw->iotg.stop_host) 1104 1104 - lnw->iotg.stop_host(&lnw->iotg); 1105 1105 - else 1106 1106 - dev_dbg(lnw->dev, 1107 1107 - "host driver has been removed.\n"); 1108 1108 - 1109 1109 - set_client_mode(); 1110 1110 - langwell_otg_phy_low_power(1); 1111 1111 - iotg->otg.state = OTG_STATE_B_IDLE; 1112 1112 - } else if (iotg->hsm.a_conn) { 1113 1113 - /* delete hsm timer for b_ase0_brst_tmr */ 1114 1114 - del_timer_sync(&lnw->hsm_timer); 1115 1115 - 1116 1116 - langwell_otg_HAAR(0); 1117 1117 - iotg->otg.state = OTG_STATE_B_HOST; 1118 1118 - langwell_update_transceiver(); 1119 1119 - } else if (iotg->hsm.a_bus_resume || 1120 1120 - iotg->hsm.b_ase0_brst_tmout) { 1121 1121 - /* delete hsm timer for b_ase0_brst_tmr */ 1122 1122 - del_timer_sync(&lnw->hsm_timer); 1123 1123 - 1124 1124 - langwell_otg_HAAR(0); 1125 1125 - langwell_otg_nsf_msg(7); 1126 1126 - 1127 1127 - if (lnw->iotg.stop_host) 1128 1128 - lnw->iotg.stop_host(&lnw->iotg); 1129 1129 - else 1130 1130 - dev_dbg(lnw->dev, 1131 1131 - "host driver has been removed.\n"); 1132 1132 - 1133 1133 - iotg->hsm.a_bus_suspend = 0; 1134 1134 - iotg->hsm.b_bus_req = 0; 1135 1135 - 1136 1136 - if (lnw->iotg.start_peripheral) 1137 1137 - lnw->iotg.start_peripheral(&lnw->iotg); 1138 1138 - else 1139 1139 - dev_dbg(lnw->dev, 1140 1140 - "client driver not loaded.\n"); 1141 1141 - 1142 1142 - iotg->otg.state = OTG_STATE_B_PERIPHERAL; 1143 1143 - } 1144 1144 - break; 1145 1145 - 1146 1146 - case OTG_STATE_B_HOST: 1147 1147 - if (!iotg->hsm.id) { 1148 1148 - iotg->otg.default_a = 1; 1149 1149 - iotg->hsm.a_srp_det = 0; 1150 1150 - 1151 1151 - langwell_otg_chrg_vbus(0); 1152 1152 - 1153 1153 - if (lnw->iotg.stop_host) 1154 1154 - lnw->iotg.stop_host(&lnw->iotg); 1155 1155 - else 1156 1156 - dev_dbg(lnw->dev, 1157 1157 - "host driver has been removed.\n"); 1158 1158 - 1159 1159 - set_host_mode(); 1160 1160 - langwell_otg_phy_low_power(1); 1161 1161 - iotg->otg.state = OTG_STATE_A_IDLE; 1162 1162 - langwell_update_transceiver(); 1163 1163 - } else if (!iotg->hsm.b_sess_vld) { 1164 1164 - iotg->hsm.b_hnp_enable = 0; 1165 1165 - iotg->hsm.b_bus_req = 0; 1166 1166 - 1167 1167 - langwell_otg_chrg_vbus(0); 1168 1168 - if (lnw->iotg.stop_host) 1169 1169 - lnw->iotg.stop_host(&lnw->iotg); 1170 1170 - else 1171 1171 - dev_dbg(lnw->dev, 1172 1172 - "host driver has been removed.\n"); 1173 1173 - 1174 1174 - set_client_mode(); 1175 1175 - langwell_otg_phy_low_power(1); 1176 1176 - iotg->otg.state = OTG_STATE_B_IDLE; 1177 1177 - } else if ((!iotg->hsm.b_bus_req) || 1178 1178 - (!iotg->hsm.a_conn)) { 1179 1179 - iotg->hsm.b_bus_req = 0; 1180 1180 - langwell_otg_loc_sof(0); 1181 1181 - 1182 1182 - if (lnw->iotg.stop_host) 1183 1183 - lnw->iotg.stop_host(&lnw->iotg); 1184 1184 - else 1185 1185 - dev_dbg(lnw->dev, 1186 1186 - "host driver has been removed.\n"); 1187 1187 - 1188 1188 - iotg->hsm.a_bus_suspend = 0; 1189 1189 - 1190 1190 - if (lnw->iotg.start_peripheral) 1191 1191 - lnw->iotg.start_peripheral(&lnw->iotg); 1192 1192 - else 1193 1193 - dev_dbg(lnw->dev, 1194 1194 - "client driver not loaded.\n"); 1195 1195 - 1196 1196 - iotg->otg.state = OTG_STATE_B_PERIPHERAL; 1197 1197 - } 1198 1198 - break; 1199 1199 - 1200 1200 - case OTG_STATE_A_IDLE: 1201 1201 - iotg->otg.default_a = 1; 1202 1202 - if (iotg->hsm.id) { 1203 1203 - iotg->otg.default_a = 0; 1204 1204 - iotg->hsm.b_bus_req = 0; 1205 1205 - iotg->hsm.vbus_srp_up = 0; 1206 1206 - 1207 1207 - langwell_otg_chrg_vbus(0); 1208 1208 - set_client_mode(); 1209 1209 - langwell_otg_phy_low_power(1); 1210 1210 - iotg->otg.state = OTG_STATE_B_IDLE; 1211 1211 - langwell_update_transceiver(); 1212 1212 - } else if (!iotg->hsm.a_bus_drop && 1213 1213 - (iotg->hsm.a_srp_det || iotg->hsm.a_bus_req)) { 1214 1214 - langwell_otg_phy_low_power(0); 1215 1215 - 1216 1216 - /* Turn on VBus */ 1217 1217 - iotg->otg.set_vbus(&iotg->otg, true); 1218 1218 - 1219 1219 - iotg->hsm.vbus_srp_up = 0; 1220 1220 - iotg->hsm.a_wait_vrise_tmout = 0; 1221 1221 - langwell_otg_add_timer(a_wait_vrise_tmr); 1222 1222 - iotg->otg.state = OTG_STATE_A_WAIT_VRISE; 1223 1223 - langwell_update_transceiver(); 1224 1224 - } else if (!iotg->hsm.a_bus_drop && iotg->hsm.a_sess_vld) { 1225 1225 - iotg->hsm.vbus_srp_up = 1; 1226 1226 - } else if (!iotg->hsm.a_sess_vld && iotg->hsm.vbus_srp_up) { 1227 1227 - msleep(10); 1228 1228 - langwell_otg_phy_low_power(0); 1229 1229 - 1230 1230 - /* Turn on VBus */ 1231 1231 - iotg->otg.set_vbus(&iotg->otg, true); 1232 1232 - iotg->hsm.a_srp_det = 1; 1233 1233 - iotg->hsm.vbus_srp_up = 0; 1234 1234 - iotg->hsm.a_wait_vrise_tmout = 0; 1235 1235 - langwell_otg_add_timer(a_wait_vrise_tmr); 1236 1236 - iotg->otg.state = OTG_STATE_A_WAIT_VRISE; 1237 1237 - langwell_update_transceiver(); 1238 1238 - } else if (!iotg->hsm.a_sess_vld && 1239 1239 - !iotg->hsm.vbus_srp_up) { 1240 1240 - langwell_otg_phy_low_power(1); 1241 1241 - } 1242 1242 - break; 1243 1243 - case OTG_STATE_A_WAIT_VRISE: 1244 1244 - if (iotg->hsm.id) { 1245 1245 - langwell_otg_del_timer(a_wait_vrise_tmr); 1246 1246 - iotg->hsm.b_bus_req = 0; 1247 1247 - iotg->otg.default_a = 0; 1248 1248 - 1249 1249 - /* Turn off VBus */ 1250 1250 - iotg->otg.set_vbus(&iotg->otg, false); 1251 1251 - set_client_mode(); 1252 1252 - langwell_otg_phy_low_power_wait(1); 1253 1253 - iotg->otg.state = OTG_STATE_B_IDLE; 1254 1254 - } else if (iotg->hsm.a_vbus_vld) { 1255 1255 - langwell_otg_del_timer(a_wait_vrise_tmr); 1256 1256 - iotg->hsm.b_conn = 0; 1257 1257 - if (lnw->iotg.start_host) 1258 1258 - lnw->iotg.start_host(&lnw->iotg); 1259 1259 - else { 1260 1260 - dev_dbg(lnw->dev, "host driver not loaded.\n"); 1261 1261 - break; 1262 1262 - } 1263 1263 - 1264 1264 - langwell_otg_add_ktimer(TA_WAIT_BCON_TMR); 1265 1265 - iotg->otg.state = OTG_STATE_A_WAIT_BCON; 1266 1266 - } else if (iotg->hsm.a_wait_vrise_tmout) { 1267 1267 - iotg->hsm.b_conn = 0; 1268 1268 - if (iotg->hsm.a_vbus_vld) { 1269 1269 - if (lnw->iotg.start_host) 1270 1270 - lnw->iotg.start_host(&lnw->iotg); 1271 1271 - else { 1272 1272 - dev_dbg(lnw->dev, 1273 1273 - "host driver not loaded.\n"); 1274 1274 - break; 1275 1275 - } 1276 1276 - langwell_otg_add_ktimer(TA_WAIT_BCON_TMR); 1277 1277 - iotg->otg.state = OTG_STATE_A_WAIT_BCON; 1278 1278 - } else { 1279 1279 - 1280 1280 - /* Turn off VBus */ 1281 1281 - iotg->otg.set_vbus(&iotg->otg, false); 1282 1282 - langwell_otg_phy_low_power_wait(1); 1283 1283 - iotg->otg.state = OTG_STATE_A_VBUS_ERR; 1284 1284 - } 1285 1285 - } 1286 1286 - break; 1287 1287 - case OTG_STATE_A_WAIT_BCON: 1288 1288 - if (iotg->hsm.id) { 1289 1289 - /* delete hsm timer for a_wait_bcon_tmr */ 1290 1290 - del_timer_sync(&lnw->hsm_timer); 1291 1291 - 1292 1292 - iotg->otg.default_a = 0; 1293 1293 - iotg->hsm.b_bus_req = 0; 1294 1294 - 1295 1295 - if (lnw->iotg.stop_host) 1296 1296 - lnw->iotg.stop_host(&lnw->iotg); 1297 1297 - else 1298 1298 - dev_dbg(lnw->dev, 1299 1299 - "host driver has been removed.\n"); 1300 1300 - 1301 1301 - /* Turn off VBus */ 1302 1302 - iotg->otg.set_vbus(&iotg->otg, false); 1303 1303 - set_client_mode(); 1304 1304 - langwell_otg_phy_low_power_wait(1); 1305 1305 - iotg->otg.state = OTG_STATE_B_IDLE; 1306 1306 - langwell_update_transceiver(); 1307 1307 - } else if (!iotg->hsm.a_vbus_vld) { 1308 1308 - /* delete hsm timer for a_wait_bcon_tmr */ 1309 1309 - del_timer_sync(&lnw->hsm_timer); 1310 1310 - 1311 1311 - if (lnw->iotg.stop_host) 1312 1312 - lnw->iotg.stop_host(&lnw->iotg); 1313 1313 - else 1314 1314 - dev_dbg(lnw->dev, 1315 1315 - "host driver has been removed.\n"); 1316 1316 - 1317 1317 - /* Turn off VBus */ 1318 1318 - iotg->otg.set_vbus(&iotg->otg, false); 1319 1319 - langwell_otg_phy_low_power_wait(1); 1320 1320 - iotg->otg.state = OTG_STATE_A_VBUS_ERR; 1321 1321 - } else if (iotg->hsm.a_bus_drop || 1322 1322 - (iotg->hsm.a_wait_bcon_tmout && 1323 1323 - !iotg->hsm.a_bus_req)) { 1324 1324 - /* delete hsm timer for a_wait_bcon_tmr */ 1325 1325 - del_timer_sync(&lnw->hsm_timer); 1326 1326 - 1327 1327 - if (lnw->iotg.stop_host) 1328 1328 - lnw->iotg.stop_host(&lnw->iotg); 1329 1329 - else 1330 1330 - dev_dbg(lnw->dev, 1331 1331 - "host driver has been removed.\n"); 1332 1332 - 1333 1333 - /* Turn off VBus */ 1334 1334 - iotg->otg.set_vbus(&iotg->otg, false); 1335 1335 - iotg->otg.state = OTG_STATE_A_WAIT_VFALL; 1336 1336 - } else if (iotg->hsm.b_conn) { 1337 1337 - /* delete hsm timer for a_wait_bcon_tmr */ 1338 1338 - del_timer_sync(&lnw->hsm_timer); 1339 1339 - 1340 1340 - iotg->hsm.a_suspend_req = 0; 1341 1341 - iotg->otg.state = OTG_STATE_A_HOST; 1342 1342 - if (iotg->hsm.a_srp_det && iotg->otg.host && 1343 1343 - !iotg->otg.host->b_hnp_enable) { 1344 1344 - /* SRP capable peripheral-only device */ 1345 1345 - iotg->hsm.a_bus_req = 1; 1346 1346 - iotg->hsm.a_srp_det = 0; 1347 1347 - } else if (!iotg->hsm.a_bus_req && iotg->otg.host && 1348 1348 - iotg->otg.host->b_hnp_enable) { 1349 1349 - /* It is not safe enough to do a fast 1350 1350 - * transition from A_WAIT_BCON to 1351 1351 - * A_SUSPEND */ 1352 1352 - msleep(10000); 1353 1353 - if (iotg->hsm.a_bus_req) 1354 1354 - break; 1355 1355 - 1356 1356 - if (request_irq(pdev->irq, 1357 1357 - otg_dummy_irq, IRQF_SHARED, 1358 1358 - driver_name, iotg->base) != 0) { 1359 1359 - dev_dbg(lnw->dev, 1360 1360 - "request interrupt %d fail\n", 1361 1361 - pdev->irq); 1362 1362 - } 1363 1363 - 1364 1364 - langwell_otg_HABA(1); 1365 1365 - iotg->hsm.b_bus_resume = 0; 1366 1366 - iotg->hsm.a_aidl_bdis_tmout = 0; 1367 1367 - 1368 1368 - langwell_otg_loc_sof(0); 1369 1369 - /* clear PHCD to enable HW timer */ 1370 1370 - langwell_otg_phy_low_power(0); 1371 1371 - langwell_otg_add_timer(a_aidl_bdis_tmr); 1372 1372 - iotg->otg.state = OTG_STATE_A_SUSPEND; 1373 1373 - } else if (!iotg->hsm.a_bus_req && iotg->otg.host && 1374 1374 - !iotg->otg.host->b_hnp_enable) { 1375 1375 - if (lnw->iotg.stop_host) 1376 1376 - lnw->iotg.stop_host(&lnw->iotg); 1377 1377 - else 1378 1378 - dev_dbg(lnw->dev, 1379 1379 - "host driver removed.\n"); 1380 1380 - 1381 1381 - /* Turn off VBus */ 1382 1382 - iotg->otg.set_vbus(&iotg->otg, false); 1383 1383 - iotg->otg.state = OTG_STATE_A_WAIT_VFALL; 1384 1384 - } 1385 1385 - } 1386 1386 - break; 1387 1387 - case OTG_STATE_A_HOST: 1388 1388 - if (iotg->hsm.id) { 1389 1389 - iotg->otg.default_a = 0; 1390 1390 - iotg->hsm.b_bus_req = 0; 1391 1391 - 1392 1392 - if (lnw->iotg.stop_host) 1393 1393 - lnw->iotg.stop_host(&lnw->iotg); 1394 1394 - else 1395 1395 - dev_dbg(lnw->dev, 1396 1396 - "host driver has been removed.\n"); 1397 1397 - 1398 1398 - /* Turn off VBus */ 1399 1399 - iotg->otg.set_vbus(&iotg->otg, false); 1400 1400 - set_client_mode(); 1401 1401 - langwell_otg_phy_low_power_wait(1); 1402 1402 - iotg->otg.state = OTG_STATE_B_IDLE; 1403 1403 - langwell_update_transceiver(); 1404 1404 - } else if (iotg->hsm.a_bus_drop || 1405 1405 - (iotg->otg.host && 1406 1406 - !iotg->otg.host->b_hnp_enable && 1407 1407 - !iotg->hsm.a_bus_req)) { 1408 1408 - if (lnw->iotg.stop_host) 1409 1409 - lnw->iotg.stop_host(&lnw->iotg); 1410 1410 - else 1411 1411 - dev_dbg(lnw->dev, 1412 1412 - "host driver has been removed.\n"); 1413 1413 - 1414 1414 - /* Turn off VBus */ 1415 1415 - iotg->otg.set_vbus(&iotg->otg, false); 1416 1416 - iotg->otg.state = OTG_STATE_A_WAIT_VFALL; 1417 1417 - } else if (!iotg->hsm.a_vbus_vld) { 1418 1418 - if (lnw->iotg.stop_host) 1419 1419 - lnw->iotg.stop_host(&lnw->iotg); 1420 1420 - else 1421 1421 - dev_dbg(lnw->dev, 1422 1422 - "host driver has been removed.\n"); 1423 1423 - 1424 1424 - /* Turn off VBus */ 1425 1425 - iotg->otg.set_vbus(&iotg->otg, false); 1426 1426 - langwell_otg_phy_low_power_wait(1); 1427 1427 - iotg->otg.state = OTG_STATE_A_VBUS_ERR; 1428 1428 - } else if (iotg->otg.host && 1429 1429 - iotg->otg.host->b_hnp_enable && 1430 1430 - !iotg->hsm.a_bus_req) { 1431 1431 - /* Set HABA to enable hardware assistance to signal 1432 1432 - * A-connect after receiver B-disconnect. Hardware 1433 1433 - * will then set client mode and enable URE, SLE and 1434 1434 - * PCE after the assistance. otg_dummy_irq is used to 1435 1435 - * clean these ints when client driver is not resumed. 1436 1436 - */ 1437 1437 - if (request_irq(pdev->irq, otg_dummy_irq, IRQF_SHARED, 1438 1438 - driver_name, iotg->base) != 0) { 1439 1439 - dev_dbg(lnw->dev, 1440 1440 - "request interrupt %d failed\n", 1441 1441 - pdev->irq); 1442 1442 - } 1443 1443 - 1444 1444 - /* set HABA */ 1445 1445 - langwell_otg_HABA(1); 1446 1446 - iotg->hsm.b_bus_resume = 0; 1447 1447 - iotg->hsm.a_aidl_bdis_tmout = 0; 1448 1448 - langwell_otg_loc_sof(0); 1449 1449 - /* clear PHCD to enable HW timer */ 1450 1450 - langwell_otg_phy_low_power(0); 1451 1451 - langwell_otg_add_timer(a_aidl_bdis_tmr); 1452 1452 - iotg->otg.state = OTG_STATE_A_SUSPEND; 1453 1453 - } else if (!iotg->hsm.b_conn || !iotg->hsm.a_bus_req) { 1454 1454 - langwell_otg_add_ktimer(TA_WAIT_BCON_TMR); 1455 1455 - iotg->otg.state = OTG_STATE_A_WAIT_BCON; 1456 1456 - } 1457 1457 - break; 1458 1458 - case OTG_STATE_A_SUSPEND: 1459 1459 - if (iotg->hsm.id) { 1460 1460 - langwell_otg_del_timer(a_aidl_bdis_tmr); 1461 1461 - langwell_otg_HABA(0); 1462 1462 - free_irq(pdev->irq, iotg->base); 1463 1463 - iotg->otg.default_a = 0; 1464 1464 - iotg->hsm.b_bus_req = 0; 1465 1465 - 1466 1466 - if (lnw->iotg.stop_host) 1467 1467 - lnw->iotg.stop_host(&lnw->iotg); 1468 1468 - else 1469 1469 - dev_dbg(lnw->dev, 1470 1470 - "host driver has been removed.\n"); 1471 1471 - 1472 1472 - /* Turn off VBus */ 1473 1473 - iotg->otg.set_vbus(&iotg->otg, false); 1474 1474 - set_client_mode(); 1475 1475 - langwell_otg_phy_low_power(1); 1476 1476 - iotg->otg.state = OTG_STATE_B_IDLE; 1477 1477 - langwell_update_transceiver(); 1478 1478 - } else if (iotg->hsm.a_bus_req || 1479 1479 - iotg->hsm.b_bus_resume) { 1480 1480 - langwell_otg_del_timer(a_aidl_bdis_tmr); 1481 1481 - langwell_otg_HABA(0); 1482 1482 - free_irq(pdev->irq, iotg->base); 1483 1483 - iotg->hsm.a_suspend_req = 0; 1484 1484 - langwell_otg_loc_sof(1); 1485 1485 - iotg->otg.state = OTG_STATE_A_HOST; 1486 1486 - } else if (iotg->hsm.a_aidl_bdis_tmout || 1487 1487 - iotg->hsm.a_bus_drop) { 1488 1488 - langwell_otg_del_timer(a_aidl_bdis_tmr); 1489 1489 - langwell_otg_HABA(0); 1490 1490 - free_irq(pdev->irq, iotg->base); 1491 1491 - if (lnw->iotg.stop_host) 1492 1492 - lnw->iotg.stop_host(&lnw->iotg); 1493 1493 - else 1494 1494 - dev_dbg(lnw->dev, 1495 1495 - "host driver has been removed.\n"); 1496 1496 - 1497 1497 - /* Turn off VBus */ 1498 1498 - iotg->otg.set_vbus(&iotg->otg, false); 1499 1499 - iotg->otg.state = OTG_STATE_A_WAIT_VFALL; 1500 1500 - } else if (!iotg->hsm.b_conn && iotg->otg.host && 1501 1501 - iotg->otg.host->b_hnp_enable) { 1502 1502 - langwell_otg_del_timer(a_aidl_bdis_tmr); 1503 1503 - langwell_otg_HABA(0); 1504 1504 - free_irq(pdev->irq, iotg->base); 1505 1505 - 1506 1506 - if (lnw->iotg.stop_host) 1507 1507 - lnw->iotg.stop_host(&lnw->iotg); 1508 1508 - else 1509 1509 - dev_dbg(lnw->dev, 1510 1510 - "host driver has been removed.\n"); 1511 1511 - 1512 1512 - iotg->hsm.b_bus_suspend = 0; 1513 1513 - iotg->hsm.b_bus_suspend_vld = 0; 1514 1514 - 1515 1515 - /* msleep(200); */ 1516 1516 - if (lnw->iotg.start_peripheral) 1517 1517 - lnw->iotg.start_peripheral(&lnw->iotg); 1518 1518 - else 1519 1519 - dev_dbg(lnw->dev, 1520 1520 - "client driver not loaded.\n"); 1521 1521 - 1522 1522 - langwell_otg_add_ktimer(TB_BUS_SUSPEND_TMR); 1523 1523 - iotg->otg.state = OTG_STATE_A_PERIPHERAL; 1524 1524 - break; 1525 1525 - } else if (!iotg->hsm.a_vbus_vld) { 1526 1526 - langwell_otg_del_timer(a_aidl_bdis_tmr); 1527 1527 - langwell_otg_HABA(0); 1528 1528 - free_irq(pdev->irq, iotg->base); 1529 1529 - if (lnw->iotg.stop_host) 1530 1530 - lnw->iotg.stop_host(&lnw->iotg); 1531 1531 - else 1532 1532 - dev_dbg(lnw->dev, 1533 1533 - "host driver has been removed.\n"); 1534 1534 - 1535 1535 - /* Turn off VBus */ 1536 1536 - iotg->otg.set_vbus(&iotg->otg, false); 1537 1537 - langwell_otg_phy_low_power_wait(1); 1538 1538 - iotg->otg.state = OTG_STATE_A_VBUS_ERR; 1539 1539 - } 1540 1540 - break; 1541 1541 - case OTG_STATE_A_PERIPHERAL: 1542 1542 - if (iotg->hsm.id) { 1543 1543 - /* delete hsm timer for b_bus_suspend_tmr */ 1544 1544 - del_timer_sync(&lnw->hsm_timer); 1545 1545 - iotg->otg.default_a = 0; 1546 1546 - iotg->hsm.b_bus_req = 0; 1547 1547 - if (lnw->iotg.stop_peripheral) 1548 1548 - lnw->iotg.stop_peripheral(&lnw->iotg); 1549 1549 - else 1550 1550 - dev_dbg(lnw->dev, 1551 1551 - "client driver has been removed.\n"); 1552 1552 - 1553 1553 - /* Turn off VBus */ 1554 1554 - iotg->otg.set_vbus(&iotg->otg, false); 1555 1555 - set_client_mode(); 1556 1556 - langwell_otg_phy_low_power_wait(1); 1557 1557 - iotg->otg.state = OTG_STATE_B_IDLE; 1558 1558 - langwell_update_transceiver(); 1559 1559 - } else if (!iotg->hsm.a_vbus_vld) { 1560 1560 - /* delete hsm timer for b_bus_suspend_tmr */ 1561 1561 - del_timer_sync(&lnw->hsm_timer); 1562 1562 - 1563 1563 - if (lnw->iotg.stop_peripheral) 1564 1564 - lnw->iotg.stop_peripheral(&lnw->iotg); 1565 1565 - else 1566 1566 - dev_dbg(lnw->dev, 1567 1567 - "client driver has been removed.\n"); 1568 1568 - 1569 1569 - /* Turn off VBus */ 1570 1570 - iotg->otg.set_vbus(&iotg->otg, false); 1571 1571 - langwell_otg_phy_low_power_wait(1); 1572 1572 - iotg->otg.state = OTG_STATE_A_VBUS_ERR; 1573 1573 - } else if (iotg->hsm.a_bus_drop) { 1574 1574 - /* delete hsm timer for b_bus_suspend_tmr */ 1575 1575 - del_timer_sync(&lnw->hsm_timer); 1576 1576 - 1577 1577 - if (lnw->iotg.stop_peripheral) 1578 1578 - lnw->iotg.stop_peripheral(&lnw->iotg); 1579 1579 - else 1580 1580 - dev_dbg(lnw->dev, 1581 1581 - "client driver has been removed.\n"); 1582 1582 - 1583 1583 - /* Turn off VBus */ 1584 1584 - iotg->otg.set_vbus(&iotg->otg, false); 1585 1585 - iotg->otg.state = OTG_STATE_A_WAIT_VFALL; 1586 1586 - } else if (iotg->hsm.b_bus_suspend) { 1587 1587 - /* delete hsm timer for b_bus_suspend_tmr */ 1588 1588 - del_timer_sync(&lnw->hsm_timer); 1589 1589 - 1590 1590 - if (lnw->iotg.stop_peripheral) 1591 1591 - lnw->iotg.stop_peripheral(&lnw->iotg); 1592 1592 - else 1593 1593 - dev_dbg(lnw->dev, 1594 1594 - "client driver has been removed.\n"); 1595 1595 - 1596 1596 - if (lnw->iotg.start_host) 1597 1597 - lnw->iotg.start_host(&lnw->iotg); 1598 1598 - else 1599 1599 - dev_dbg(lnw->dev, 1600 1600 - "host driver not loaded.\n"); 1601 1601 - langwell_otg_add_ktimer(TA_WAIT_BCON_TMR); 1602 1602 - iotg->otg.state = OTG_STATE_A_WAIT_BCON; 1603 1603 - } else if (iotg->hsm.b_bus_suspend_tmout) { 1604 1604 - u32 val; 1605 1605 - val = readl(lnw->iotg.base + CI_PORTSC1); 1606 1606 - if (!(val & PORTSC_SUSP)) 1607 1607 - break; 1608 1608 - 1609 1609 - if (lnw->iotg.stop_peripheral) 1610 1610 - lnw->iotg.stop_peripheral(&lnw->iotg); 1611 1611 - else 1612 1612 - dev_dbg(lnw->dev, 1613 1613 - "client driver has been removed.\n"); 1614 1614 - 1615 1615 - if (lnw->iotg.start_host) 1616 1616 - lnw->iotg.start_host(&lnw->iotg); 1617 1617 - else 1618 1618 - dev_dbg(lnw->dev, 1619 1619 - "host driver not loaded.\n"); 1620 1620 - langwell_otg_add_ktimer(TA_WAIT_BCON_TMR); 1621 1621 - iotg->otg.state = OTG_STATE_A_WAIT_BCON; 1622 1622 - } 1623 1623 - break; 1624 1624 - case OTG_STATE_A_VBUS_ERR: 1625 1625 - if (iotg->hsm.id) { 1626 1626 - iotg->otg.default_a = 0; 1627 1627 - iotg->hsm.a_clr_err = 0; 1628 1628 - iotg->hsm.a_srp_det = 0; 1629 1629 - set_client_mode(); 1630 1630 - langwell_otg_phy_low_power(1); 1631 1631 - iotg->otg.state = OTG_STATE_B_IDLE; 1632 1632 - langwell_update_transceiver(); 1633 1633 - } else if (iotg->hsm.a_clr_err) { 1634 1634 - iotg->hsm.a_clr_err = 0; 1635 1635 - iotg->hsm.a_srp_det = 0; 1636 1636 - reset_otg(); 1637 1637 - init_hsm(); 1638 1638 - if (iotg->otg.state == OTG_STATE_A_IDLE) 1639 1639 - langwell_update_transceiver(); 1640 1640 - } else { 1641 1641 - /* FW will clear PHCD bit when any VBus 1642 1642 - * event detected. Reset PHCD to 1 again */ 1643 1643 - langwell_otg_phy_low_power(1); 1644 1644 - } 1645 1645 - break; 1646 1646 - case OTG_STATE_A_WAIT_VFALL: 1647 1647 - if (iotg->hsm.id) { 1648 1648 - iotg->otg.default_a = 0; 1649 1649 - set_client_mode(); 1650 1650 - langwell_otg_phy_low_power(1); 1651 1651 - iotg->otg.state = OTG_STATE_B_IDLE; 1652 1652 - langwell_update_transceiver(); 1653 1653 - } else if (iotg->hsm.a_bus_req) { 1654 1654 - 1655 1655 - /* Turn on VBus */ 1656 1656 - iotg->otg.set_vbus(&iotg->otg, true); 1657 1657 - iotg->hsm.a_wait_vrise_tmout = 0; 1658 1658 - langwell_otg_add_timer(a_wait_vrise_tmr); 1659 1659 - iotg->otg.state = OTG_STATE_A_WAIT_VRISE; 1660 1660 - } else if (!iotg->hsm.a_sess_vld) { 1661 1661 - iotg->hsm.a_srp_det = 0; 1662 1662 - set_host_mode(); 1663 1663 - langwell_otg_phy_low_power(1); 1664 1664 - iotg->otg.state = OTG_STATE_A_IDLE; 1665 1665 - } 1666 1666 - break; 1667 1667 - default: 1668 1668 - ; 1669 1669 - } 1670 1670 - 1671 1671 - dev_dbg(lnw->dev, "%s: new state = %s\n", __func__, 1672 1672 - otg_state_string(iotg->otg.state)); 1673 1673 - } 1674 1674 - 1675 1675 - static ssize_t 1676 1676 - show_registers(struct device *_dev, struct device_attribute *attr, char *buf) 1677 1677 - { 1678 1678 - struct langwell_otg *lnw = the_transceiver; 1679 1679 - char *next; 1680 1680 - unsigned size, t; 1681 1681 - 1682 1682 - next = buf; 1683 1683 - size = PAGE_SIZE; 1684 1684 - 1685 1685 - t = scnprintf(next, size, 1686 1686 - "\n" 1687 1687 - "USBCMD = 0x%08x\n" 1688 1688 - "USBSTS = 0x%08x\n" 1689 1689 - "USBINTR = 0x%08x\n" 1690 1690 - "ASYNCLISTADDR = 0x%08x\n" 1691 1691 - "PORTSC1 = 0x%08x\n" 1692 1692 - "HOSTPC1 = 0x%08x\n" 1693 1693 - "OTGSC = 0x%08x\n" 1694 1694 - "USBMODE = 0x%08x\n", 1695 1695 - readl(lnw->iotg.base + 0x30), 1696 1696 - readl(lnw->iotg.base + 0x34), 1697 1697 - readl(lnw->iotg.base + 0x38), 1698 1698 - readl(lnw->iotg.base + 0x48), 1699 1699 - readl(lnw->iotg.base + 0x74), 1700 1700 - readl(lnw->iotg.base + 0xb4), 1701 1701 - readl(lnw->iotg.base + 0xf4), 1702 1702 - readl(lnw->iotg.base + 0xf8) 1703 1703 - ); 1704 1704 - size -= t; 1705 1705 - next += t; 1706 1706 - 1707 1707 - return PAGE_SIZE - size; 1708 1708 - } 1709 1709 - static DEVICE_ATTR(registers, S_IRUGO, show_registers, NULL); 1710 1710 - 1711 1711 - static ssize_t 1712 1712 - show_hsm(struct device *_dev, struct device_attribute *attr, char *buf) 1713 1713 - { 1714 1714 - struct langwell_otg *lnw = the_transceiver; 1715 1715 - struct intel_mid_otg_xceiv *iotg = &lnw->iotg; 1716 1716 - char *next; 1717 1717 - unsigned size, t; 1718 1718 - 1719 1719 - next = buf; 1720 1720 - size = PAGE_SIZE; 1721 1721 - 1722 1722 - if (iotg->otg.host) 1723 1723 - iotg->hsm.a_set_b_hnp_en = iotg->otg.host->b_hnp_enable; 1724 1724 - 1725 1725 - if (iotg->otg.gadget) 1726 1726 - iotg->hsm.b_hnp_enable = iotg->otg.gadget->b_hnp_enable; 1727 1727 - 1728 1728 - t = scnprintf(next, size, 1729 1729 - "\n" 1730 1730 - "current state = %s\n" 1731 1731 - "a_bus_resume = \t%d\n" 1732 1732 - "a_bus_suspend = \t%d\n" 1733 1733 - "a_conn = \t%d\n" 1734 1734 - "a_sess_vld = \t%d\n" 1735 1735 - "a_srp_det = \t%d\n" 1736 1736 - "a_vbus_vld = \t%d\n" 1737 1737 - "b_bus_resume = \t%d\n" 1738 1738 - "b_bus_suspend = \t%d\n" 1739 1739 - "b_conn = \t%d\n" 1740 1740 - "b_se0_srp = \t%d\n" 1741 1741 - "b_sess_end = \t%d\n" 1742 1742 - "b_sess_vld = \t%d\n" 1743 1743 - "id = \t%d\n" 1744 1744 - "a_set_b_hnp_en = \t%d\n" 1745 1745 - "b_srp_done = \t%d\n" 1746 1746 - "b_hnp_enable = \t%d\n" 1747 1747 - "a_wait_vrise_tmout = \t%d\n" 1748 1748 - "a_wait_bcon_tmout = \t%d\n" 1749 1749 - "a_aidl_bdis_tmout = \t%d\n" 1750 1750 - "b_ase0_brst_tmout = \t%d\n" 1751 1751 - "a_bus_drop = \t%d\n" 1752 1752 - "a_bus_req = \t%d\n" 1753 1753 - "a_clr_err = \t%d\n" 1754 1754 - "a_suspend_req = \t%d\n" 1755 1755 - "b_bus_req = \t%d\n" 1756 1756 - "b_bus_suspend_tmout = \t%d\n" 1757 1757 - "b_bus_suspend_vld = \t%d\n", 1758 1758 - otg_state_string(iotg->otg.state), 1759 1759 - iotg->hsm.a_bus_resume, 1760 1760 - iotg->hsm.a_bus_suspend, 1761 1761 - iotg->hsm.a_conn, 1762 1762 - iotg->hsm.a_sess_vld, 1763 1763 - iotg->hsm.a_srp_det, 1764 1764 - iotg->hsm.a_vbus_vld, 1765 1765 - iotg->hsm.b_bus_resume, 1766 1766 - iotg->hsm.b_bus_suspend, 1767 1767 - iotg->hsm.b_conn, 1768 1768 - iotg->hsm.b_se0_srp, 1769 1769 - iotg->hsm.b_sess_end, 1770 1770 - iotg->hsm.b_sess_vld, 1771 1771 - iotg->hsm.id, 1772 1772 - iotg->hsm.a_set_b_hnp_en, 1773 1773 - iotg->hsm.b_srp_done, 1774 1774 - iotg->hsm.b_hnp_enable, 1775 1775 - iotg->hsm.a_wait_vrise_tmout, 1776 1776 - iotg->hsm.a_wait_bcon_tmout, 1777 1777 - iotg->hsm.a_aidl_bdis_tmout, 1778 1778 - iotg->hsm.b_ase0_brst_tmout, 1779 1779 - iotg->hsm.a_bus_drop, 1780 1780 - iotg->hsm.a_bus_req, 1781 1781 - iotg->hsm.a_clr_err, 1782 1782 - iotg->hsm.a_suspend_req, 1783 1783 - iotg->hsm.b_bus_req, 1784 1784 - iotg->hsm.b_bus_suspend_tmout, 1785 1785 - iotg->hsm.b_bus_suspend_vld 1786 1786 - ); 1787 1787 - size -= t; 1788 1788 - next += t; 1789 1789 - 1790 1790 - return PAGE_SIZE - size; 1791 1791 - } 1792 1792 - static DEVICE_ATTR(hsm, S_IRUGO, show_hsm, NULL); 1793 1793 - 1794 1794 - static ssize_t 1795 1795 - get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf) 1796 1796 - { 1797 1797 - struct langwell_otg *lnw = the_transceiver; 1798 1798 - char *next; 1799 1799 - unsigned size, t; 1800 1800 - 1801 1801 - next = buf; 1802 1802 - size = PAGE_SIZE; 1803 1803 - 1804 1804 - t = scnprintf(next, size, "%d", lnw->iotg.hsm.a_bus_req); 1805 1805 - size -= t; 1806 1806 - next += t; 1807 1807 - 1808 1808 - return PAGE_SIZE - size; 1809 1809 - } 1810 1810 - 1811 1811 - static ssize_t 1812 1812 - set_a_bus_req(struct device *dev, struct device_attribute *attr, 1813 1813 - const char *buf, size_t count) 1814 1814 - { 1815 1815 - struct langwell_otg *lnw = the_transceiver; 1816 1816 - struct intel_mid_otg_xceiv *iotg = &lnw->iotg; 1817 1817 - 1818 1818 - if (!iotg->otg.default_a) 1819 1819 - return -1; 1820 1820 - if (count > 2) 1821 1821 - return -1; 1822 1822 - 1823 1823 - if (buf[0] == '0') { 1824 1824 - iotg->hsm.a_bus_req = 0; 1825 1825 - dev_dbg(lnw->dev, "User request: a_bus_req = 0\n"); 1826 1826 - } else if (buf[0] == '1') { 1827 1827 - /* If a_bus_drop is TRUE, a_bus_req can't be set */ 1828 1828 - if (iotg->hsm.a_bus_drop) 1829 1829 - return -1; 1830 1830 - iotg->hsm.a_bus_req = 1; 1831 1831 - dev_dbg(lnw->dev, "User request: a_bus_req = 1\n"); 1832 1832 - } 1833 1833 - if (spin_trylock(&lnw->wq_lock)) { 1834 1834 - langwell_update_transceiver(); 1835 1835 - spin_unlock(&lnw->wq_lock); 1836 1836 - } 1837 1837 - return count; 1838 1838 - } 1839 1839 - static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req, set_a_bus_req); 1840 1840 - 1841 1841 - static ssize_t 1842 1842 - get_a_bus_drop(struct device *dev, struct device_attribute *attr, char *buf) 1843 1843 - { 1844 1844 - struct langwell_otg *lnw = the_transceiver; 1845 1845 - char *next; 1846 1846 - unsigned size, t; 1847 1847 - 1848 1848 - next = buf; 1849 1849 - size = PAGE_SIZE; 1850 1850 - 1851 1851 - t = scnprintf(next, size, "%d", lnw->iotg.hsm.a_bus_drop); 1852 1852 - size -= t; 1853 1853 - next += t; 1854 1854 - 1855 1855 - return PAGE_SIZE - size; 1856 1856 - } 1857 1857 - 1858 1858 - static ssize_t 1859 1859 - set_a_bus_drop(struct device *dev, struct device_attribute *attr, 1860 1860 - const char *buf, size_t count) 1861 1861 - { 1862 1862 - struct langwell_otg *lnw = the_transceiver; 1863 1863 - struct intel_mid_otg_xceiv *iotg = &lnw->iotg; 1864 1864 - 1865 1865 - if (!iotg->otg.default_a) 1866 1866 - return -1; 1867 1867 - if (count > 2) 1868 1868 - return -1; 1869 1869 - 1870 1870 - if (buf[0] == '0') { 1871 1871 - iotg->hsm.a_bus_drop = 0; 1872 1872 - dev_dbg(lnw->dev, "User request: a_bus_drop = 0\n"); 1873 1873 - } else if (buf[0] == '1') { 1874 1874 - iotg->hsm.a_bus_drop = 1; 1875 1875 - iotg->hsm.a_bus_req = 0; 1876 1876 - dev_dbg(lnw->dev, "User request: a_bus_drop = 1\n"); 1877 1877 - dev_dbg(lnw->dev, "User request: and a_bus_req = 0\n"); 1878 1878 - } 1879 1879 - if (spin_trylock(&lnw->wq_lock)) { 1880 1880 - langwell_update_transceiver(); 1881 1881 - spin_unlock(&lnw->wq_lock); 1882 1882 - } 1883 1883 - return count; 1884 1884 - } 1885 1885 - static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR, get_a_bus_drop, set_a_bus_drop); 1886 1886 - 1887 1887 - static ssize_t 1888 1888 - get_b_bus_req(struct device *dev, struct device_attribute *attr, char *buf) 1889 1889 - { 1890 1890 - struct langwell_otg *lnw = the_transceiver; 1891 1891 - char *next; 1892 1892 - unsigned size, t; 1893 1893 - 1894 1894 - next = buf; 1895 1895 - size = PAGE_SIZE; 1896 1896 - 1897 1897 - t = scnprintf(next, size, "%d", lnw->iotg.hsm.b_bus_req); 1898 1898 - size -= t; 1899 1899 - next += t; 1900 1900 - 1901 1901 - return PAGE_SIZE - size; 1902 1902 - } 1903 1903 - 1904 1904 - static ssize_t 1905 1905 - set_b_bus_req(struct device *dev, struct device_attribute *attr, 1906 1906 - const char *buf, size_t count) 1907 1907 - { 1908 1908 - struct langwell_otg *lnw = the_transceiver; 1909 1909 - struct intel_mid_otg_xceiv *iotg = &lnw->iotg; 1910 1910 - 1911 1911 - if (iotg->otg.default_a) 1912 1912 - return -1; 1913 1913 - 1914 1914 - if (count > 2) 1915 1915 - return -1; 1916 1916 - 1917 1917 - if (buf[0] == '0') { 1918 1918 - iotg->hsm.b_bus_req = 0; 1919 1919 - dev_dbg(lnw->dev, "User request: b_bus_req = 0\n"); 1920 1920 - } else if (buf[0] == '1') { 1921 1921 - iotg->hsm.b_bus_req = 1; 1922 1922 - dev_dbg(lnw->dev, "User request: b_bus_req = 1\n"); 1923 1923 - } 1924 1924 - if (spin_trylock(&lnw->wq_lock)) { 1925 1925 - langwell_update_transceiver(); 1926 1926 - spin_unlock(&lnw->wq_lock); 1927 1927 - } 1928 1928 - return count; 1929 1929 - } 1930 1930 - static DEVICE_ATTR(b_bus_req, S_IRUGO | S_IWUSR, get_b_bus_req, set_b_bus_req); 1931 1931 - 1932 1932 - static ssize_t 1933 1933 - set_a_clr_err(struct device *dev, struct device_attribute *attr, 1934 1934 - const char *buf, size_t count) 1935 1935 - { 1936 1936 - struct langwell_otg *lnw = the_transceiver; 1937 1937 - struct intel_mid_otg_xceiv *iotg = &lnw->iotg; 1938 1938 - 1939 1939 - if (!iotg->otg.default_a) 1940 1940 - return -1; 1941 1941 - if (count > 2) 1942 1942 - return -1; 1943 1943 - 1944 1944 - if (buf[0] == '1') { 1945 1945 - iotg->hsm.a_clr_err = 1; 1946 1946 - dev_dbg(lnw->dev, "User request: a_clr_err = 1\n"); 1947 1947 - } 1948 1948 - if (spin_trylock(&lnw->wq_lock)) { 1949 1949 - langwell_update_transceiver(); 1950 1950 - spin_unlock(&lnw->wq_lock); 1951 1951 - } 1952 1952 - return count; 1953 1953 - } 1954 1954 - static DEVICE_ATTR(a_clr_err, S_IWUSR, NULL, set_a_clr_err); 1955 1955 - 1956 1956 - static struct attribute *inputs_attrs[] = { 1957 1957 - &dev_attr_a_bus_req.attr, 1958 1958 - &dev_attr_a_bus_drop.attr, 1959 1959 - &dev_attr_b_bus_req.attr, 1960 1960 - &dev_attr_a_clr_err.attr, 1961 1961 - NULL, 1962 1962 - }; 1963 1963 - 1964 1964 - static struct attribute_group debug_dev_attr_group = { 1965 1965 - .name = "inputs", 1966 1966 - .attrs = inputs_attrs, 1967 1967 - }; 1968 1968 - 1969 1969 - static int langwell_otg_probe(struct pci_dev *pdev, 1970 1970 - const struct pci_device_id *id) 1971 1971 - { 1972 1972 - unsigned long resource, len; 1973 1973 - void __iomem *base = NULL; 1974 1974 - int retval; 1975 1975 - u32 val32; 1976 1976 - struct langwell_otg *lnw; 1977 1977 - char qname[] = "langwell_otg_queue"; 1978 1978 - 1979 1979 - retval = 0; 1980 1980 - dev_dbg(&pdev->dev, "\notg controller is detected.\n"); 1981 1981 - if (pci_enable_device(pdev) < 0) { 1982 1982 - retval = -ENODEV; 1983 1983 - goto done; 1984 1984 - } 1985 1985 - 1986 1986 - lnw = kzalloc(sizeof *lnw, GFP_KERNEL); 1987 1987 - if (lnw == NULL) { 1988 1988 - retval = -ENOMEM; 1989 1989 - goto done; 1990 1990 - } 1991 1991 - the_transceiver = lnw; 1992 1992 - 1993 1993 - /* control register: BAR 0 */ 1994 1994 - resource = pci_resource_start(pdev, 0); 1995 1995 - len = pci_resource_len(pdev, 0); 1996 1996 - if (!request_mem_region(resource, len, driver_name)) { 1997 1997 - retval = -EBUSY; 1998 1998 - goto err; 1999 1999 - } 2000 2000 - lnw->region = 1; 2001 2001 - 2002 2002 - base = ioremap_nocache(resource, len); 2003 2003 - if (base == NULL) { 2004 2004 - retval = -EFAULT; 2005 2005 - goto err; 2006 2006 - } 2007 2007 - lnw->iotg.base = base; 2008 2008 - 2009 2009 - if (!request_mem_region(USBCFG_ADDR, USBCFG_LEN, driver_name)) { 2010 2010 - retval = -EBUSY; 2011 2011 - goto err; 2012 2012 - } 2013 2013 - lnw->cfg_region = 1; 2014 2014 - 2015 2015 - /* For the SCCB.USBCFG register */ 2016 2016 - base = ioremap_nocache(USBCFG_ADDR, USBCFG_LEN); 2017 2017 - if (base == NULL) { 2018 2018 - retval = -EFAULT; 2019 2019 - goto err; 2020 2020 - } 2021 2021 - lnw->usbcfg = base; 2022 2022 - 2023 2023 - if (!pdev->irq) { 2024 2024 - dev_dbg(&pdev->dev, "No IRQ.\n"); 2025 2025 - retval = -ENODEV; 2026 2026 - goto err; 2027 2027 - } 2028 2028 - 2029 2029 - lnw->qwork = create_singlethread_workqueue(qname); 2030 2030 - if (!lnw->qwork) { 2031 2031 - dev_dbg(&pdev->dev, "cannot create workqueue %s\n", qname); 2032 2032 - retval = -ENOMEM; 2033 2033 - goto err; 2034 2034 - } 2035 2035 - INIT_WORK(&lnw->work, langwell_otg_work); 2036 2036 - 2037 2037 - /* OTG common part */ 2038 2038 - lnw->dev = &pdev->dev; 2039 2039 - lnw->iotg.otg.dev = lnw->dev; 2040 2040 - lnw->iotg.otg.label = driver_name; 2041 2041 - lnw->iotg.otg.set_host = langwell_otg_set_host; 2042 2042 - lnw->iotg.otg.set_peripheral = langwell_otg_set_peripheral; 2043 2043 - lnw->iotg.otg.set_power = langwell_otg_set_power; 2044 2044 - lnw->iotg.otg.set_vbus = langwell_otg_set_vbus; 2045 2045 - lnw->iotg.otg.start_srp = langwell_otg_start_srp; 2046 2046 - lnw->iotg.otg.state = OTG_STATE_UNDEFINED; 2047 2047 - 2048 2048 - if (otg_set_transceiver(&lnw->iotg.otg)) { 2049 2049 - dev_dbg(lnw->dev, "can't set transceiver\n"); 2050 2050 - retval = -EBUSY; 2051 2051 - goto err; 2052 2052 - } 2053 2053 - 2054 2054 - reset_otg(); 2055 2055 - init_hsm(); 2056 2056 - 2057 2057 - spin_lock_init(&lnw->lock); 2058 2058 - spin_lock_init(&lnw->wq_lock); 2059 2059 - INIT_LIST_HEAD(&active_timers); 2060 2060 - retval = langwell_otg_init_timers(&lnw->iotg.hsm); 2061 2061 - if (retval) { 2062 2062 - dev_dbg(&pdev->dev, "Failed to init timers\n"); 2063 2063 - goto err; 2064 2064 - } 2065 2065 - 2066 2066 - init_timer(&lnw->hsm_timer); 2067 2067 - ATOMIC_INIT_NOTIFIER_HEAD(&lnw->iotg.iotg_notifier); 2068 2068 - 2069 2069 - lnw->iotg_notifier.notifier_call = langwell_otg_iotg_notify; 2070 2070 - 2071 2071 - retval = intel_mid_otg_register_notifier(&lnw->iotg, 2072 2072 - &lnw->iotg_notifier); 2073 2073 - if (retval) { 2074 2074 - dev_dbg(lnw->dev, "Failed to register notifier\n"); 2075 2075 - goto err; 2076 2076 - } 2077 2077 - 2078 2078 - if (request_irq(pdev->irq, otg_irq, IRQF_SHARED, 2079 2079 - driver_name, lnw) != 0) { 2080 2080 - dev_dbg(lnw->dev, "request interrupt %d failed\n", pdev->irq); 2081 2081 - retval = -EBUSY; 2082 2082 - goto err; 2083 2083 - } 2084 2084 - 2085 2085 - /* enable OTGSC int */ 2086 2086 - val32 = OTGSC_DPIE | OTGSC_BSEIE | OTGSC_BSVIE | 2087 2087 - OTGSC_ASVIE | OTGSC_AVVIE | OTGSC_IDIE | OTGSC_IDPU; 2088 2088 - writel(val32, lnw->iotg.base + CI_OTGSC); 2089 2089 - 2090 2090 - retval = device_create_file(&pdev->dev, &dev_attr_registers); 2091 2091 - if (retval < 0) { 2092 2092 - dev_dbg(lnw->dev, 2093 2093 - "Can't register sysfs attribute: %d\n", retval); 2094 2094 - goto err; 2095 2095 - } 2096 2096 - 2097 2097 - retval = device_create_file(&pdev->dev, &dev_attr_hsm); 2098 2098 - if (retval < 0) { 2099 2099 - dev_dbg(lnw->dev, "Can't hsm sysfs attribute: %d\n", retval); 2100 2100 - goto err; 2101 2101 - } 2102 2102 - 2103 2103 - retval = sysfs_create_group(&pdev->dev.kobj, &debug_dev_attr_group); 2104 2104 - if (retval < 0) { 2105 2105 - dev_dbg(lnw->dev, 2106 2106 - "Can't register sysfs attr group: %d\n", retval); 2107 2107 - goto err; 2108 2108 - } 2109 2109 - 2110 2110 - if (lnw->iotg.otg.state == OTG_STATE_A_IDLE) 2111 2111 - langwell_update_transceiver(); 2112 2112 - 2113 2113 - return 0; 2114 2114 - 2115 2115 - err: 2116 2116 - if (the_transceiver) 2117 2117 - langwell_otg_remove(pdev); 2118 2118 - done: 2119 2119 - return retval; 2120 2120 - } 2121 2121 - 2122 2122 - static void langwell_otg_remove(struct pci_dev *pdev) 2123 2123 - { 2124 2124 - struct langwell_otg *lnw = the_transceiver; 2125 2125 - 2126 2126 - if (lnw->qwork) { 2127 2127 - flush_workqueue(lnw->qwork); 2128 2128 - destroy_workqueue(lnw->qwork); 2129 2129 - } 2130 2130 - intel_mid_otg_unregister_notifier(&lnw->iotg, &lnw->iotg_notifier); 2131 2131 - langwell_otg_free_timers(); 2132 2132 - 2133 2133 - /* disable OTGSC interrupt as OTGSC doesn't change in reset */ 2134 2134 - writel(0, lnw->iotg.base + CI_OTGSC); 2135 2135 - 2136 2136 - if (pdev->irq) 2137 2137 - free_irq(pdev->irq, lnw); 2138 2138 - if (lnw->usbcfg) 2139 2139 - iounmap(lnw->usbcfg); 2140 2140 - if (lnw->cfg_region) 2141 2141 - release_mem_region(USBCFG_ADDR, USBCFG_LEN); 2142 2142 - if (lnw->iotg.base) 2143 2143 - iounmap(lnw->iotg.base); 2144 2144 - if (lnw->region) 2145 2145 - release_mem_region(pci_resource_start(pdev, 0), 2146 2146 - pci_resource_len(pdev, 0)); 2147 2147 - 2148 2148 - otg_set_transceiver(NULL); 2149 2149 - pci_disable_device(pdev); 2150 2150 - sysfs_remove_group(&pdev->dev.kobj, &debug_dev_attr_group); 2151 2151 - device_remove_file(&pdev->dev, &dev_attr_hsm); 2152 2152 - device_remove_file(&pdev->dev, &dev_attr_registers); 2153 2153 - kfree(lnw); 2154 2154 - lnw = NULL; 2155 2155 - } 2156 2156 - 2157 2157 - static void transceiver_suspend(struct pci_dev *pdev) 2158 2158 - { 2159 2159 - pci_save_state(pdev); 2160 2160 - pci_set_power_state(pdev, PCI_D3hot); 2161 2161 - langwell_otg_phy_low_power(1); 2162 2162 - } 2163 2163 - 2164 2164 - static int langwell_otg_suspend(struct pci_dev *pdev, pm_message_t message) 2165 2165 - { 2166 2166 - struct langwell_otg *lnw = the_transceiver; 2167 2167 - struct intel_mid_otg_xceiv *iotg = &lnw->iotg; 2168 2168 - int ret = 0; 2169 2169 - 2170 2170 - /* Disbale OTG interrupts */ 2171 2171 - langwell_otg_intr(0); 2172 2172 - 2173 2173 - if (pdev->irq) 2174 2174 - free_irq(pdev->irq, lnw); 2175 2175 - 2176 2176 - /* Prevent more otg_work */ 2177 2177 - flush_workqueue(lnw->qwork); 2178 2178 - destroy_workqueue(lnw->qwork); 2179 2179 - lnw->qwork = NULL; 2180 2180 - 2181 2181 - /* start actions */ 2182 2182 - switch (iotg->otg.state) { 2183 2183 - case OTG_STATE_A_WAIT_VFALL: 2184 2184 - iotg->otg.state = OTG_STATE_A_IDLE; 2185 2185 - case OTG_STATE_A_IDLE: 2186 2186 - case OTG_STATE_B_IDLE: 2187 2187 - case OTG_STATE_A_VBUS_ERR: 2188 2188 - transceiver_suspend(pdev); 2189 2189 - break; 2190 2190 - case OTG_STATE_A_WAIT_VRISE: 2191 2191 - langwell_otg_del_timer(a_wait_vrise_tmr); 2192 2192 - iotg->hsm.a_srp_det = 0; 2193 2193 - 2194 2194 - /* Turn off VBus */ 2195 2195 - iotg->otg.set_vbus(&iotg->otg, false); 2196 2196 - iotg->otg.state = OTG_STATE_A_IDLE; 2197 2197 - transceiver_suspend(pdev); 2198 2198 - break; 2199 2199 - case OTG_STATE_A_WAIT_BCON: 2200 2200 - del_timer_sync(&lnw->hsm_timer); 2201 2201 - if (lnw->iotg.stop_host) 2202 2202 - lnw->iotg.stop_host(&lnw->iotg); 2203 2203 - else 2204 2204 - dev_dbg(&pdev->dev, "host driver has been removed.\n"); 2205 2205 - 2206 2206 - iotg->hsm.a_srp_det = 0; 2207 2207 - 2208 2208 - /* Turn off VBus */ 2209 2209 - iotg->otg.set_vbus(&iotg->otg, false); 2210 2210 - iotg->otg.state = OTG_STATE_A_IDLE; 2211 2211 - transceiver_suspend(pdev); 2212 2212 - break; 2213 2213 - case OTG_STATE_A_HOST: 2214 2214 - if (lnw->iotg.stop_host) 2215 2215 - lnw->iotg.stop_host(&lnw->iotg); 2216 2216 - else 2217 2217 - dev_dbg(&pdev->dev, "host driver has been removed.\n"); 2218 2218 - 2219 2219 - iotg->hsm.a_srp_det = 0; 2220 2220 - 2221 2221 - /* Turn off VBus */ 2222 2222 - iotg->otg.set_vbus(&iotg->otg, false); 2223 2223 - 2224 2224 - iotg->otg.state = OTG_STATE_A_IDLE; 2225 2225 - transceiver_suspend(pdev); 2226 2226 - break; 2227 2227 - case OTG_STATE_A_SUSPEND: 2228 2228 - langwell_otg_del_timer(a_aidl_bdis_tmr); 2229 2229 - langwell_otg_HABA(0); 2230 2230 - if (lnw->iotg.stop_host) 2231 2231 - lnw->iotg.stop_host(&lnw->iotg); 2232 2232 - else 2233 2233 - dev_dbg(lnw->dev, "host driver has been removed.\n"); 2234 2234 - iotg->hsm.a_srp_det = 0; 2235 2235 - 2236 2236 - /* Turn off VBus */ 2237 2237 - iotg->otg.set_vbus(&iotg->otg, false); 2238 2238 - iotg->otg.state = OTG_STATE_A_IDLE; 2239 2239 - transceiver_suspend(pdev); 2240 2240 - break; 2241 2241 - case OTG_STATE_A_PERIPHERAL: 2242 2242 - del_timer_sync(&lnw->hsm_timer); 2243 2243 - 2244 2244 - if (lnw->iotg.stop_peripheral) 2245 2245 - lnw->iotg.stop_peripheral(&lnw->iotg); 2246 2246 - else 2247 2247 - dev_dbg(&pdev->dev, 2248 2248 - "client driver has been removed.\n"); 2249 2249 - iotg->hsm.a_srp_det = 0; 2250 2250 - 2251 2251 - /* Turn off VBus */ 2252 2252 - iotg->otg.set_vbus(&iotg->otg, false); 2253 2253 - iotg->otg.state = OTG_STATE_A_IDLE; 2254 2254 - transceiver_suspend(pdev); 2255 2255 - break; 2256 2256 - case OTG_STATE_B_HOST: 2257 2257 - if (lnw->iotg.stop_host) 2258 2258 - lnw->iotg.stop_host(&lnw->iotg); 2259 2259 - else 2260 2260 - dev_dbg(&pdev->dev, "host driver has been removed.\n"); 2261 2261 - iotg->hsm.b_bus_req = 0; 2262 2262 - iotg->otg.state = OTG_STATE_B_IDLE; 2263 2263 - transceiver_suspend(pdev); 2264 2264 - break; 2265 2265 - case OTG_STATE_B_PERIPHERAL: 2266 2266 - if (lnw->iotg.stop_peripheral) 2267 2267 - lnw->iotg.stop_peripheral(&lnw->iotg); 2268 2268 - else 2269 2269 - dev_dbg(&pdev->dev, 2270 2270 - "client driver has been removed.\n"); 2271 2271 - iotg->otg.state = OTG_STATE_B_IDLE; 2272 2272 - transceiver_suspend(pdev); 2273 2273 - break; 2274 2274 - case OTG_STATE_B_WAIT_ACON: 2275 2275 - /* delete hsm timer for b_ase0_brst_tmr */ 2276 2276 - del_timer_sync(&lnw->hsm_timer); 2277 2277 - 2278 2278 - langwell_otg_HAAR(0); 2279 2279 - 2280 2280 - if (lnw->iotg.stop_host) 2281 2281 - lnw->iotg.stop_host(&lnw->iotg); 2282 2282 - else 2283 2283 - dev_dbg(&pdev->dev, "host driver has been removed.\n"); 2284 2284 - iotg->hsm.b_bus_req = 0; 2285 2285 - iotg->otg.state = OTG_STATE_B_IDLE; 2286 2286 - transceiver_suspend(pdev); 2287 2287 - break; 2288 2288 - default: 2289 2289 - dev_dbg(lnw->dev, "error state before suspend\n"); 2290 2290 - break; 2291 2291 - } 2292 2292 - 2293 2293 - return ret; 2294 2294 - } 2295 2295 - 2296 2296 - static void transceiver_resume(struct pci_dev *pdev) 2297 2297 - { 2298 2298 - pci_restore_state(pdev); 2299 2299 - pci_set_power_state(pdev, PCI_D0); 2300 2300 - } 2301 2301 - 2302 2302 - static int langwell_otg_resume(struct pci_dev *pdev) 2303 2303 - { 2304 2304 - struct langwell_otg *lnw = the_transceiver; 2305 2305 - int ret = 0; 2306 2306 - 2307 2307 - transceiver_resume(pdev); 2308 2308 - 2309 2309 - lnw->qwork = create_singlethread_workqueue("langwell_otg_queue"); 2310 2310 - if (!lnw->qwork) { 2311 2311 - dev_dbg(&pdev->dev, "cannot create langwell otg workqueuen"); 2312 2312 - ret = -ENOMEM; 2313 2313 - goto error; 2314 2314 - } 2315 2315 - 2316 2316 - if (request_irq(pdev->irq, otg_irq, IRQF_SHARED, 2317 2317 - driver_name, lnw) != 0) { 2318 2318 - dev_dbg(&pdev->dev, "request interrupt %d failed\n", pdev->irq); 2319 2319 - ret = -EBUSY; 2320 2320 - goto error; 2321 2321 - } 2322 2322 - 2323 2323 - /* enable OTG interrupts */ 2324 2324 - langwell_otg_intr(1); 2325 2325 - 2326 2326 - update_hsm(); 2327 2327 - 2328 2328 - langwell_update_transceiver(); 2329 2329 - 2330 2330 - return ret; 2331 2331 - error: 2332 2332 - langwell_otg_intr(0); 2333 2333 - transceiver_suspend(pdev); 2334 2334 - return ret; 2335 2335 - } 2336 2336 - 2337 2337 - static int __init langwell_otg_init(void) 2338 2338 - { 2339 2339 - return pci_register_driver(&otg_pci_driver); 2340 2340 - } 2341 2341 - module_init(langwell_otg_init); 2342 2342 - 2343 2343 - static void __exit langwell_otg_cleanup(void) 2344 2344 - { 2345 2345 - pci_unregister_driver(&otg_pci_driver); 2346 2346 - } 2347 2347 - module_exit(langwell_otg_cleanup);

+2

drivers/usb/otg/mv_otg.c

reviewed

··· 202 202 203 203 static void mv_otg_start_host(struct mv_otg *mvotg, int on) 204 204 { 205 205 + #ifdef CONFIG_USB 205 206 struct otg_transceiver *otg = &mvotg->otg; 206 207 struct usb_hcd *hcd; 207 208 ··· 217 216 usb_add_hcd(hcd, hcd->irq, IRQF_SHARED); 218 217 else 219 218 usb_remove_hcd(hcd); 219 219 + #endif /* CONFIG_USB */ 220 220 } 221 221 222 222 static void mv_otg_start_periphrals(struct mv_otg *mvotg, int on)

+1 -1

drivers/usb/renesas_usbhs/mod_gadget.c

reviewed

··· 425 425 struct usbhs_pipe *pipe; 426 426 int recip = ctrl->bRequestType & USB_RECIP_MASK; 427 427 int nth = le16_to_cpu(ctrl->wIndex) & USB_ENDPOINT_NUMBER_MASK; 428 428 - int ret; 428 428 + int ret = 0; 429 429 int (*func)(struct usbhs_priv *priv, struct usbhsg_uep *uep, 430 430 struct usb_ctrlrequest *ctrl); 431 431 char *msg;

+74 -29

drivers/usb/serial/cp210x.c

reviewed

··· 39 39 struct usb_serial_port *port); 40 40 static void cp210x_get_termios_port(struct usb_serial_port *port, 41 41 unsigned int *cflagp, unsigned int *baudp); 42 42 + static void cp210x_change_speed(struct tty_struct *, struct usb_serial_port *, 43 43 + struct ktermios *); 42 44 static void cp210x_set_termios(struct tty_struct *, struct usb_serial_port *, 43 45 struct ktermios*); 44 46 static int cp210x_tiocmget(struct tty_struct *); ··· 140 138 { USB_DEVICE(0x1843, 0x0200) }, /* Vaisala USB Instrument Cable */ 141 139 { USB_DEVICE(0x18EF, 0xE00F) }, /* ELV USB-I2C-Interface */ 142 140 { USB_DEVICE(0x1BE3, 0x07A6) }, /* WAGO 750-923 USB Service Cable */ 141 141 + { USB_DEVICE(0x3195, 0xF190) }, /* Link Instruments MSO-19 */ 143 142 { USB_DEVICE(0x413C, 0x9500) }, /* DW700 GPS USB interface */ 144 143 { } /* Terminating Entry */ 145 144 }; ··· 204 201 #define CP210X_EMBED_EVENTS 0x15 205 202 #define CP210X_GET_EVENTSTATE 0x16 206 203 #define CP210X_SET_CHARS 0x19 204 204 + #define CP210X_GET_BAUDRATE 0x1D 205 205 + #define CP210X_SET_BAUDRATE 0x1E 207 206 208 207 /* CP210X_IFC_ENABLE */ 209 208 #define UART_ENABLE 0x0001 ··· 365 360 * Quantises the baud rate as per AN205 Table 1 366 361 */ 367 362 static unsigned int cp210x_quantise_baudrate(unsigned int baud) { 368 368 - if (baud <= 56) baud = 0; 369 369 - else if (baud <= 300) baud = 300; 363 363 + if (baud <= 300) 364 364 + baud = 300; 370 365 else if (baud <= 600) baud = 600; 371 366 else if (baud <= 1200) baud = 1200; 372 367 else if (baud <= 1800) baud = 1800; ··· 394 389 else if (baud <= 491520) baud = 460800; 395 390 else if (baud <= 567138) baud = 500000; 396 391 else if (baud <= 670254) baud = 576000; 397 397 - else if (baud <= 1053257) baud = 921600; 398 398 - else if (baud <= 1474560) baud = 1228800; 399 399 - else if (baud <= 2457600) baud = 1843200; 400 400 - else baud = 3686400; 392 392 + else if (baud < 1000000) 393 393 + baud = 921600; 394 394 + else if (baud > 2000000) 395 395 + baud = 2000000; 401 396 return baud; 402 397 } 403 398 ··· 414 409 return result; 415 410 } 416 411 417 417 - result = usb_serial_generic_open(tty, port); 418 418 - if (result) 419 419 - return result; 420 420 - 421 412 /* Configure the termios structure */ 422 413 cp210x_get_termios(tty, port); 423 423 - return 0; 414 414 + 415 415 + /* The baud rate must be initialised on cp2104 */ 416 416 + if (tty) 417 417 + cp210x_change_speed(tty, port, NULL); 418 418 + 419 419 + return usb_serial_generic_open(tty, port); 424 420 } 425 421 426 422 static void cp210x_close(struct usb_serial_port *port) ··· 473 467 474 468 dbg("%s - port %d", __func__, port->number); 475 469 476 476 - cp210x_get_config(port, CP210X_GET_BAUDDIV, &baud, 2); 477 477 - /* Convert to baudrate */ 478 478 - if (baud) 479 479 - baud = cp210x_quantise_baudrate((BAUD_RATE_GEN_FREQ + baud/2)/ baud); 470 470 + cp210x_get_config(port, CP210X_GET_BAUDRATE, &baud, 4); 480 471 481 472 dbg("%s - baud rate = %d", __func__, baud); 482 473 *baudp = baud; ··· 582 579 *cflagp = cflag; 583 580 } 584 581 582 582 + /* 583 583 + * CP2101 supports the following baud rates: 584 584 + * 585 585 + * 300, 600, 1200, 1800, 2400, 4800, 7200, 9600, 14400, 19200, 28800, 586 586 + * 38400, 56000, 57600, 115200, 128000, 230400, 460800, 921600 587 587 + * 588 588 + * CP2102 and CP2103 support the following additional rates: 589 589 + * 590 590 + * 4000, 16000, 51200, 64000, 76800, 153600, 250000, 256000, 500000, 591 591 + * 576000 592 592 + * 593 593 + * The device will map a requested rate to a supported one, but the result 594 594 + * of requests for rates greater than 1053257 is undefined (see AN205). 595 595 + * 596 596 + * CP2104, CP2105 and CP2110 support most rates up to 2M, 921k and 1M baud, 597 597 + * respectively, with an error less than 1%. The actual rates are determined 598 598 + * by 599 599 + * 600 600 + * div = round(freq / (2 x prescale x request)) 601 601 + * actual = freq / (2 x prescale x div) 602 602 + * 603 603 + * For CP2104 and CP2105 freq is 48Mhz and prescale is 4 for request <= 365bps 604 604 + * or 1 otherwise. 605 605 + * For CP2110 freq is 24Mhz and prescale is 4 for request <= 300bps or 1 606 606 + * otherwise. 607 607 + */ 608 608 + static void cp210x_change_speed(struct tty_struct *tty, 609 609 + struct usb_serial_port *port, struct ktermios *old_termios) 610 610 + { 611 611 + u32 baud; 612 612 + 613 613 + baud = tty->termios->c_ospeed; 614 614 + 615 615 + /* This maps the requested rate to a rate valid on cp2102 or cp2103, 616 616 + * or to an arbitrary rate in [1M,2M]. 617 617 + * 618 618 + * NOTE: B0 is not implemented. 619 619 + */ 620 620 + baud = cp210x_quantise_baudrate(baud); 621 621 + 622 622 + dbg("%s - setting baud rate to %u", __func__, baud); 623 623 + if (cp210x_set_config(port, CP210X_SET_BAUDRATE, &baud, 624 624 + sizeof(baud))) { 625 625 + dev_warn(&port->dev, "failed to set baud rate to %u\n", baud); 626 626 + if (old_termios) 627 627 + baud = old_termios->c_ospeed; 628 628 + else 629 629 + baud = 9600; 630 630 + } 631 631 + 632 632 + tty_encode_baud_rate(tty, baud, baud); 633 633 + } 634 634 + 585 635 static void cp210x_set_termios(struct tty_struct *tty, 586 636 struct usb_serial_port *port, struct ktermios *old_termios) 587 637 { 588 638 unsigned int cflag, old_cflag; 589 589 - unsigned int baud = 0, bits; 639 639 + unsigned int bits; 590 640 unsigned int modem_ctl[4]; 591 641 592 642 dbg("%s - port %d", __func__, port->number); ··· 649 593 650 594 cflag = tty->termios->c_cflag; 651 595 old_cflag = old_termios->c_cflag; 652 652 - baud = cp210x_quantise_baudrate(tty_get_baud_rate(tty)); 653 596 654 654 - /* If the baud rate is to be updated*/ 655 655 - if (baud != tty_termios_baud_rate(old_termios) && baud != 0) { 656 656 - dbg("%s - Setting baud rate to %d baud", __func__, 657 657 - baud); 658 658 - if (cp210x_set_config_single(port, CP210X_SET_BAUDDIV, 659 659 - ((BAUD_RATE_GEN_FREQ + baud/2) / baud))) { 660 660 - dbg("Baud rate requested not supported by device"); 661 661 - baud = tty_termios_baud_rate(old_termios); 662 662 - } 663 663 - } 664 664 - /* Report back the resulting baud rate */ 665 665 - tty_encode_baud_rate(tty, baud, baud); 597 597 + if (tty->termios->c_ospeed != old_termios->c_ospeed) 598 598 + cp210x_change_speed(tty, port, old_termios); 666 599 667 600 /* If the number of data bits is to be updated */ 668 601 if ((cflag & CSIZE) != (old_cflag & CSIZE)) {

+10 -4

drivers/usb/serial/ftdi_sio.c

reviewed

··· 797 797 .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, 798 798 { USB_DEVICE(ADI_VID, ADI_GNICEPLUS_PID), 799 799 .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, 800 800 + { USB_DEVICE(HORNBY_VID, HORNBY_ELITE_PID) }, 800 801 { USB_DEVICE(JETI_VID, JETI_SPC1201_PID) }, 801 802 { USB_DEVICE(MARVELL_VID, MARVELL_SHEEVAPLUG_PID), 802 803 .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, ··· 805 804 { USB_DEVICE(GN_OTOMETRICS_VID, AURICAL_USB_PID) }, 806 805 { USB_DEVICE(BAYER_VID, BAYER_CONTOUR_CABLE_PID) }, 807 806 { USB_DEVICE(FTDI_VID, MARVELL_OPENRD_PID), 807 807 + .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, 808 808 + { USB_DEVICE(FTDI_VID, TI_XDS100V2_PID), 808 809 .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, 809 810 { USB_DEVICE(FTDI_VID, HAMEG_HO820_PID) }, 810 811 { USB_DEVICE(FTDI_VID, HAMEG_HO720_PID) }, ··· 844 841 .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, 845 842 { USB_DEVICE(ST_VID, ST_STMCLT1030_PID), 846 843 .driver_info = (kernel_ulong_t)&ftdi_stmclite_quirk }, 844 844 + { USB_DEVICE(FTDI_VID, FTDI_RF_R106) }, 847 845 { }, /* Optional parameter entry */ 848 846 { } /* Terminating entry */ 849 847 }; ··· 1337 1333 goto check_and_exit; 1338 1334 } 1339 1335 1340 1340 - if ((new_serial.baud_base != priv->baud_base) && 1341 1341 - (new_serial.baud_base < 9600)) { 1336 1336 + if (new_serial.baud_base != priv->baud_base) { 1342 1337 mutex_unlock(&priv->cfg_lock); 1343 1338 return -EINVAL; 1344 1339 } ··· 1827 1824 1828 1825 static int ftdi_open(struct tty_struct *tty, struct usb_serial_port *port) 1829 1826 { 1827 1827 + struct ktermios dummy; 1830 1828 struct usb_device *dev = port->serial->dev; 1831 1829 struct ftdi_private *priv = usb_get_serial_port_data(port); 1832 1830 int result; ··· 1846 1842 This is same behaviour as serial.c/rs_open() - Kuba */ 1847 1843 1848 1844 /* ftdi_set_termios will send usb control messages */ 1849 1849 - if (tty) 1850 1850 - ftdi_set_termios(tty, port, tty->termios); 1845 1845 + if (tty) { 1846 1846 + memset(&dummy, 0, sizeof(dummy)); 1847 1847 + ftdi_set_termios(tty, port, &dummy); 1848 1848 + } 1851 1849 1852 1850 /* Start reading from the device */ 1853 1851 result = usb_serial_generic_open(tty, port);

+19

drivers/usb/serial/ftdi_sio_ids.h

reviewed

··· 39 39 /* www.candapter.com Ewert Energy Systems CANdapter device */ 40 40 #define FTDI_CANDAPTER_PID 0x9F80 /* Product Id */ 41 41 42 42 + /* 43 43 + * Texas Instruments XDS100v2 JTAG / BeagleBone A3 44 44 + * http://processors.wiki.ti.com/index.php/XDS100 45 45 + * http://beagleboard.org/bone 46 46 + */ 47 47 + #define TI_XDS100V2_PID 0xa6d0 48 48 + 42 49 #define FTDI_NXTCAM_PID 0xABB8 /* NXTCam for Mindstorms NXT */ 43 50 44 51 /* US Interface Navigator (http://www.usinterface.com/) */ ··· 530 523 #define ADI_VID 0x0456 531 524 #define ADI_GNICE_PID 0xF000 532 525 #define ADI_GNICEPLUS_PID 0xF001 526 526 + 527 527 + /* 528 528 + * Hornby Elite 529 529 + */ 530 530 + #define HORNBY_VID 0x04D8 531 531 + #define HORNBY_ELITE_PID 0x000A 533 532 534 533 /* 535 534 * RATOC REX-USB60F ··· 1181 1168 */ 1182 1169 /* TagTracer MIFARE*/ 1183 1170 #define FTDI_ZEITCONTROL_TAGTRACE_MIFARE_PID 0xF7C0 1171 1171 + 1172 1172 + /* 1173 1173 + * Rainforest Automation 1174 1174 + */ 1175 1175 + /* ZigBee controller */ 1176 1176 + #define FTDI_RF_R106 0x8A28

+2 -8

drivers/usb/serial/io_ti.c

reviewed

··· 2657 2657 2658 2658 static void edge_disconnect(struct usb_serial *serial) 2659 2659 { 2660 2660 - int i; 2661 2661 - struct edgeport_port *edge_port; 2662 2662 - 2663 2660 dbg("%s", __func__); 2664 2664 - 2665 2665 - for (i = 0; i < serial->num_ports; ++i) { 2666 2666 - edge_port = usb_get_serial_port_data(serial->port[i]); 2667 2667 - edge_remove_sysfs_attrs(edge_port->port); 2668 2668 - } 2669 2661 } 2670 2662 2671 2663 static void edge_release(struct usb_serial *serial) ··· 2736 2744 .disconnect = edge_disconnect, 2737 2745 .release = edge_release, 2738 2746 .port_probe = edge_create_sysfs_attrs, 2747 2747 + .port_remove = edge_remove_sysfs_attrs, 2739 2748 .ioctl = edge_ioctl, 2740 2749 .set_termios = edge_set_termios, 2741 2750 .tiocmget = edge_tiocmget, ··· 2768 2775 .disconnect = edge_disconnect, 2769 2776 .release = edge_release, 2770 2777 .port_probe = edge_create_sysfs_attrs, 2778 2778 + .port_remove = edge_remove_sysfs_attrs, 2771 2779 .ioctl = edge_ioctl, 2772 2780 .set_termios = edge_set_termios, 2773 2781 .tiocmget = edge_tiocmget,

+1 -1

drivers/usb/serial/kobil_sct.c

reviewed

··· 38 38 #include <linux/ioctl.h> 39 39 #include "kobil_sct.h" 40 40 41 41 - static int debug; 41 41 + static bool debug; 42 42 43 43 /* Version Information */ 44 44 #define DRIVER_VERSION "21/05/2004"

+5

drivers/usb/serial/option.c

reviewed

··· 480 480 #define ZD_VENDOR_ID 0x0685 481 481 #define ZD_PRODUCT_7000 0x7000 482 482 483 483 + /* LG products */ 484 484 + #define LG_VENDOR_ID 0x1004 485 485 + #define LG_PRODUCT_L02C 0x618f 486 486 + 483 487 /* some devices interfaces need special handling due to a number of reasons */ 484 488 enum option_blacklist_reason { 485 489 OPTION_BLACKLIST_NONE = 0, ··· 1187 1183 { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLU526) }, 1188 1184 { USB_DEVICE_AND_INTERFACE_INFO(VIETTEL_VENDOR_ID, VIETTEL_PRODUCT_VT1000, 0xff, 0xff, 0xff) }, 1189 1185 { USB_DEVICE_AND_INTERFACE_INFO(ZD_VENDOR_ID, ZD_PRODUCT_7000, 0xff, 0xff, 0xff) }, 1186 1186 + { USB_DEVICE(LG_VENDOR_ID, LG_PRODUCT_L02C) }, /* docomo L-02C modem */ 1190 1187 { } /* Terminating entry */ 1191 1188 }; 1192 1189 MODULE_DEVICE_TABLE(usb, option_ids);

+6 -1

drivers/usb/serial/qcaux.c

reviewed

··· 36 36 #define UTSTARCOM_PRODUCT_UM175_V1 0x3712 37 37 #define UTSTARCOM_PRODUCT_UM175_V2 0x3714 38 38 #define UTSTARCOM_PRODUCT_UM175_ALLTEL 0x3715 39 39 + #define PANTECH_PRODUCT_UML190_VZW 0x3716 39 40 #define PANTECH_PRODUCT_UML290_VZW 0x3718 40 41 41 42 /* CMOTECH devices */ ··· 68 67 { USB_DEVICE_AND_INTERFACE_INFO(LG_VENDOR_ID, LG_PRODUCT_VX4400_6000, 0xff, 0xff, 0x00) }, 69 68 { USB_DEVICE_AND_INTERFACE_INFO(SANYO_VENDOR_ID, SANYO_PRODUCT_KATANA_LX, 0xff, 0xff, 0x00) }, 70 69 { USB_DEVICE_AND_INTERFACE_INFO(SAMSUNG_VENDOR_ID, SAMSUNG_PRODUCT_U520, 0xff, 0x00, 0x00) }, 71 71 - { USB_DEVICE_AND_INTERFACE_INFO(UTSTARCOM_VENDOR_ID, PANTECH_PRODUCT_UML290_VZW, 0xff, 0xff, 0xff) }, 70 70 + { USB_DEVICE_AND_INTERFACE_INFO(UTSTARCOM_VENDOR_ID, PANTECH_PRODUCT_UML190_VZW, 0xff, 0xff, 0xff) }, 71 71 + { USB_DEVICE_AND_INTERFACE_INFO(UTSTARCOM_VENDOR_ID, PANTECH_PRODUCT_UML190_VZW, 0xff, 0xfe, 0xff) }, 72 72 + { USB_DEVICE_AND_INTERFACE_INFO(UTSTARCOM_VENDOR_ID, PANTECH_PRODUCT_UML290_VZW, 0xff, 0xfd, 0xff) }, /* NMEA */ 73 73 + { USB_DEVICE_AND_INTERFACE_INFO(UTSTARCOM_VENDOR_ID, PANTECH_PRODUCT_UML290_VZW, 0xff, 0xfe, 0xff) }, /* WMC */ 74 74 + { USB_DEVICE_AND_INTERFACE_INFO(UTSTARCOM_VENDOR_ID, PANTECH_PRODUCT_UML290_VZW, 0xff, 0xff, 0xff) }, /* DIAG */ 72 75 { }, 73 76 }; 74 77 MODULE_DEVICE_TABLE(usb, id_table);

+1 -1

drivers/usb/storage/realtek_cr.c

reviewed

··· 789 789 rts51x_set_stat(chip, RTS51X_STAT_SS); 790 790 /* ignore mass storage interface's children */ 791 791 pm_suspend_ignore_children(&us->pusb_intf->dev, true); 792 792 - usb_autopm_put_interface(us->pusb_intf); 792 792 + usb_autopm_put_interface_async(us->pusb_intf); 793 793 US_DEBUGP("%s: RTS51X_STAT_SS 01," 794 794 "intf->pm_usage_cnt:%d, power.usage:%d\n", 795 795 __func__,

+1 -17

drivers/usb/usb-skeleton.c

reviewed

··· 27 27 #define USB_SKEL_VENDOR_ID 0xfff0 28 28 #define USB_SKEL_PRODUCT_ID 0xfff0 29 29 30 30 - static DEFINE_MUTEX(skel_mutex); 31 31 - 32 30 /* table of devices that work with this driver */ 33 31 static const struct usb_device_id skel_table[] = { 34 32 { USB_DEVICE(USB_SKEL_VENDOR_ID, USB_SKEL_PRODUCT_ID) }, ··· 99 101 goto exit; 100 102 } 101 103 102 102 - mutex_lock(&skel_mutex); 103 104 dev = usb_get_intfdata(interface); 104 105 if (!dev) { 105 105 - mutex_unlock(&skel_mutex); 106 106 retval = -ENODEV; 107 107 goto exit; 108 108 } 109 109 110 110 /* increment our usage count for the device */ 111 111 kref_get(&dev->kref); 112 112 - mutex_unlock(&skel_mutex); 113 112 114 113 /* lock the device to allow correctly handling errors 115 114 * in resumption */ 116 115 mutex_lock(&dev->io_mutex); 117 117 - if (!dev->interface) { 118 118 - retval = -ENODEV; 119 119 - goto out_err; 120 120 - } 121 116 122 117 retval = usb_autopm_get_interface(interface); 123 118 if (retval) ··· 118 127 119 128 /* save our object in the file's private structure */ 120 129 file->private_data = dev; 121 121 - 122 122 - out_err: 123 130 mutex_unlock(&dev->io_mutex); 124 124 - if (retval) 125 125 - kref_put(&dev->kref, skel_delete); 126 131 127 132 exit: 128 133 return retval; ··· 598 611 int minor = interface->minor; 599 612 600 613 dev = usb_get_intfdata(interface); 614 614 + usb_set_intfdata(interface, NULL); 601 615 602 616 /* give back our minor */ 603 617 usb_deregister_dev(interface, &skel_class); ··· 610 622 611 623 usb_kill_anchored_urbs(&dev->submitted); 612 624 613 613 - mutex_lock(&skel_mutex); 614 614 - usb_set_intfdata(interface, NULL); 615 615 - 616 625 /* decrement our usage count */ 617 626 kref_put(&dev->kref, skel_delete); 618 618 - mutex_unlock(&skel_mutex); 619 627 620 628 dev_info(&interface->dev, "USB Skeleton #%d now disconnected", minor); 621 629 }

+1 -1

drivers/usb/wusbcore/Kconfig

reviewed

··· 6 6 depends on EXPERIMENTAL 7 7 depends on USB 8 8 depends on PCI 9 9 - select UWB 9 9 + depends on UWB 10 10 select CRYPTO 11 11 select CRYPTO_BLKCIPHER 12 12 select CRYPTO_CBC

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include/linux/usb/langwell_otg.h

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··· 1 1 - /* 2 2 - * Intel Langwell USB OTG transceiver driver 3 3 - * Copyright (C) 2008 - 2010, Intel Corporation. 4 4 - * 5 5 - * This program is free software; you can redistribute it and/or modify it 6 6 - * under the terms and conditions of the GNU General Public License, 7 7 - * version 2, as published by the Free Software Foundation. 8 8 - * 9 9 - * This program is distributed in the hope it will be useful, but WITHOUT 10 10 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 11 - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 12 - * more details. 13 13 - * 14 14 - * You should have received a copy of the GNU General Public License along with 15 15 - * this program; if not, write to the Free Software Foundation, Inc., 16 16 - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 17 17 - * 18 18 - */ 19 19 - 20 20 - #ifndef __LANGWELL_OTG_H 21 21 - #define __LANGWELL_OTG_H 22 22 - 23 23 - #include <linux/usb/intel_mid_otg.h> 24 24 - 25 25 - #define CI_USBCMD 0x30 26 26 - # define USBCMD_RST BIT(1) 27 27 - # define USBCMD_RS BIT(0) 28 28 - #define CI_USBSTS 0x34 29 29 - # define USBSTS_SLI BIT(8) 30 30 - # define USBSTS_URI BIT(6) 31 31 - # define USBSTS_PCI BIT(2) 32 32 - #define CI_PORTSC1 0x74 33 33 - # define PORTSC_PP BIT(12) 34 34 - # define PORTSC_LS (BIT(11) | BIT(10)) 35 35 - # define PORTSC_SUSP BIT(7) 36 36 - # define PORTSC_CCS BIT(0) 37 37 - #define CI_HOSTPC1 0xb4 38 38 - # define HOSTPC1_PHCD BIT(22) 39 39 - #define CI_OTGSC 0xf4 40 40 - # define OTGSC_DPIE BIT(30) 41 41 - # define OTGSC_1MSE BIT(29) 42 42 - # define OTGSC_BSEIE BIT(28) 43 43 - # define OTGSC_BSVIE BIT(27) 44 44 - # define OTGSC_ASVIE BIT(26) 45 45 - # define OTGSC_AVVIE BIT(25) 46 46 - # define OTGSC_IDIE BIT(24) 47 47 - # define OTGSC_DPIS BIT(22) 48 48 - # define OTGSC_1MSS BIT(21) 49 49 - # define OTGSC_BSEIS BIT(20) 50 50 - # define OTGSC_BSVIS BIT(19) 51 51 - # define OTGSC_ASVIS BIT(18) 52 52 - # define OTGSC_AVVIS BIT(17) 53 53 - # define OTGSC_IDIS BIT(16) 54 54 - # define OTGSC_DPS BIT(14) 55 55 - # define OTGSC_1MST BIT(13) 56 56 - # define OTGSC_BSE BIT(12) 57 57 - # define OTGSC_BSV BIT(11) 58 58 - # define OTGSC_ASV BIT(10) 59 59 - # define OTGSC_AVV BIT(9) 60 60 - # define OTGSC_ID BIT(8) 61 61 - # define OTGSC_HABA BIT(7) 62 62 - # define OTGSC_HADP BIT(6) 63 63 - # define OTGSC_IDPU BIT(5) 64 64 - # define OTGSC_DP BIT(4) 65 65 - # define OTGSC_OT BIT(3) 66 66 - # define OTGSC_HAAR BIT(2) 67 67 - # define OTGSC_VC BIT(1) 68 68 - # define OTGSC_VD BIT(0) 69 69 - # define OTGSC_INTEN_MASK (0x7f << 24) 70 70 - # define OTGSC_INT_MASK (0x5f << 24) 71 71 - # define OTGSC_INTSTS_MASK (0x7f << 16) 72 72 - #define CI_USBMODE 0xf8 73 73 - # define USBMODE_CM (BIT(1) | BIT(0)) 74 74 - # define USBMODE_IDLE 0 75 75 - # define USBMODE_DEVICE 0x2 76 76 - # define USBMODE_HOST 0x3 77 77 - #define USBCFG_ADDR 0xff10801c 78 78 - #define USBCFG_LEN 4 79 79 - # define USBCFG_VBUSVAL BIT(14) 80 80 - # define USBCFG_AVALID BIT(13) 81 81 - # define USBCFG_BVALID BIT(12) 82 82 - # define USBCFG_SESEND BIT(11) 83 83 - 84 84 - #define INTR_DUMMY_MASK (USBSTS_SLI | USBSTS_URI | USBSTS_PCI) 85 85 - 86 86 - enum langwell_otg_timer_type { 87 87 - TA_WAIT_VRISE_TMR, 88 88 - TA_WAIT_BCON_TMR, 89 89 - TA_AIDL_BDIS_TMR, 90 90 - TB_ASE0_BRST_TMR, 91 91 - TB_SE0_SRP_TMR, 92 92 - TB_SRP_INIT_TMR, 93 93 - TB_SRP_FAIL_TMR, 94 94 - TB_BUS_SUSPEND_TMR 95 95 - }; 96 96 - 97 97 - #define TA_WAIT_VRISE 100 98 98 - #define TA_WAIT_BCON 30000 99 99 - #define TA_AIDL_BDIS 15000 100 100 - #define TB_ASE0_BRST 5000 101 101 - #define TB_SE0_SRP 2 102 102 - #define TB_SRP_INIT 100 103 103 - #define TB_SRP_FAIL 5500 104 104 - #define TB_BUS_SUSPEND 500 105 105 - 106 106 - struct langwell_otg_timer { 107 107 - unsigned long expires; /* Number of count increase to timeout */ 108 108 - unsigned long count; /* Tick counter */ 109 109 - void (*function)(unsigned long); /* Timeout function */ 110 110 - unsigned long data; /* Data passed to function */ 111 111 - struct list_head list; 112 112 - }; 113 113 - 114 114 - struct langwell_otg { 115 115 - struct intel_mid_otg_xceiv iotg; 116 116 - struct device *dev; 117 117 - 118 118 - void __iomem *usbcfg; /* SCCBUSB config Reg */ 119 119 - 120 120 - unsigned region; 121 121 - unsigned cfg_region; 122 122 - 123 123 - struct work_struct work; 124 124 - struct workqueue_struct *qwork; 125 125 - struct timer_list hsm_timer; 126 126 - 127 127 - spinlock_t lock; 128 128 - spinlock_t wq_lock; 129 129 - 130 130 - struct notifier_block iotg_notifier; 131 131 - }; 132 132 - 133 133 - static inline 134 134 - struct langwell_otg *mid_xceiv_to_lnw(struct intel_mid_otg_xceiv *iotg) 135 135 - { 136 136 - return container_of(iotg, struct langwell_otg, iotg); 137 137 - } 138 138 - 139 139 - #endif /* __LANGWELL_OTG_H__ */