Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull "ARM: a few more SoC fixes for 3.4-rc" from Olof Johansson:
- A handful of warning and build fixes for Qualcomm MSM
- Build/warning and bug fixes for Samsung Exynos
- A fix from Rob Herring that removes misplaced interrupt-parent
properties from a few device trees
- A fix to OMAP dealing with cpufreq build errors, removing some of the
offending code since it was redundant anyway
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: OMAP: clock: cleanup CPUfreq leftovers, fix build errors
ARM: dts: remove blank interrupt-parent properties
ARM: EXYNOS: Fix Kconfig dependencies for device tree enabled machine files
ARM: EXYNOS: Remove broken config values for touchscren for NURI board
ARM: EXYNOS: set fix xusbxti clock for NURI and Universal210 boards
ARM: EXYNOS: fix regulator name for NURI board
ARM: SAMSUNG: make SAMSUNG_PM_DEBUG select DEBUG_LL
ARM: msm: Fix section mismatches in proc_comm.c
video: msm: Fix section mismatches in mddi.c
arm: msm: trout: fix compile failure
arm: msm: halibut: remove unneeded fixup
ARM: EXYNOS: Add PDMA and MDMA physical base address defines
ARM: S5PV210: Fix compiler warning in dma.c file
ARM: EXYNOS: Fix compile error in exynos5250-cpufreq.c
ARM: EXYNOS: Add missing definition for IRQ_I2S0
ARM: S5PV210: fix unused LDO supply field from wm8994_pdata
+31
-193
-1
arch/arm/boot/dts/at91sam9g20.dtsi
-1
arch/arm/boot/dts/at91sam9g20.dtsi
-1
arch/arm/boot/dts/at91sam9g45.dtsi
-1
arch/arm/boot/dts/at91sam9g45.dtsi
-1
arch/arm/boot/dts/at91sam9x5.dtsi
-1
arch/arm/boot/dts/at91sam9x5.dtsi
-1
arch/arm/boot/dts/db8500.dtsi
-1
arch/arm/boot/dts/db8500.dtsi
-1
arch/arm/boot/dts/highbank.dts
-1
arch/arm/boot/dts/highbank.dts
+2
arch/arm/mach-exynos/Kconfig
+2
arch/arm/mach-exynos/Kconfig
···
368
368
369
369
config MACH_EXYNOS4_DT
370
370
bool "Samsung Exynos4 Machine using device tree"
371
+
depends on ARCH_EXYNOS4
371
372
select CPU_EXYNOS4210
372
373
select USE_OF
373
374
select ARM_AMBA
···
381
380
382
381
config MACH_EXYNOS5_DT
383
382
bool "SAMSUNG EXYNOS5 Machine using device tree"
383
+
depends on ARCH_EXYNOS5
384
384
select SOC_EXYNOS5250
385
385
select USE_OF
386
386
select ARM_AMBA
+2
arch/arm/mach-exynos/include/mach/irqs.h
+2
arch/arm/mach-exynos/include/mach/irqs.h
+4
arch/arm/mach-exynos/include/mach/map.h
+4
arch/arm/mach-exynos/include/mach/map.h
···
89
89
#define EXYNOS4_PA_MDMA1 0x12840000
90
90
#define EXYNOS4_PA_PDMA0 0x12680000
91
91
#define EXYNOS4_PA_PDMA1 0x12690000
92
+
#define EXYNOS5_PA_MDMA0 0x10800000
93
+
#define EXYNOS5_PA_MDMA1 0x11C10000
94
+
#define EXYNOS5_PA_PDMA0 0x121A0000
95
+
#define EXYNOS5_PA_PDMA1 0x121B0000
92
96
93
97
#define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000
94
98
#define EXYNOS4_PA_SYSMMU_SSS 0x10A50000
+6
arch/arm/mach-exynos/include/mach/regs-clock.h
+6
arch/arm/mach-exynos/include/mach/regs-clock.h
···
255
255
256
256
/* For EXYNOS5250 */
257
257
258
+
#define EXYNOS5_APLL_LOCK EXYNOS_CLKREG(0x00000)
258
259
#define EXYNOS5_APLL_CON0 EXYNOS_CLKREG(0x00100)
259
260
#define EXYNOS5_CLKSRC_CPU EXYNOS_CLKREG(0x00200)
261
+
#define EXYNOS5_CLKMUX_STATCPU EXYNOS_CLKREG(0x00400)
260
262
#define EXYNOS5_CLKDIV_CPU0 EXYNOS_CLKREG(0x00500)
263
+
#define EXYNOS5_CLKDIV_CPU1 EXYNOS_CLKREG(0x00504)
264
+
#define EXYNOS5_CLKDIV_STATCPU0 EXYNOS_CLKREG(0x00600)
265
+
#define EXYNOS5_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x00604)
266
+
261
267
#define EXYNOS5_MPLL_CON0 EXYNOS_CLKREG(0x04100)
262
268
#define EXYNOS5_CLKSRC_CORE1 EXYNOS_CLKREG(0x04204)
263
269
+1
-1
arch/arm/mach-exynos/mach-exynos5-dt.c
+1
-1
arch/arm/mach-exynos/mach-exynos5-dt.c
···
45
45
"exynos4210-uart.3", NULL),
46
46
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
47
47
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
48
-
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.2", NULL),
48
+
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
49
49
{},
50
50
};
51
51
+2
-44
arch/arm/mach-exynos/mach-nuri.c
+2
-44
arch/arm/mach-exynos/mach-nuri.c
···
307
307
};
308
308
309
309
/* TSP */
310
-
static u8 mxt_init_vals[] = {
311
-
/* MXT_GEN_COMMAND(6) */
312
-
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
313
-
/* MXT_GEN_POWER(7) */
314
-
0x20, 0xff, 0x32,
315
-
/* MXT_GEN_ACQUIRE(8) */
316
-
0x0a, 0x00, 0x05, 0x00, 0x00, 0x00, 0x09, 0x23,
317
-
/* MXT_TOUCH_MULTI(9) */
318
-
0x00, 0x00, 0x00, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x02, 0x00,
319
-
0x00, 0x01, 0x01, 0x0e, 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00,
320
-
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
321
-
0x00,
322
-
/* MXT_TOUCH_KEYARRAY(15) */
323
-
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
324
-
0x00,
325
-
/* MXT_SPT_GPIOPWM(19) */
326
-
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
327
-
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
328
-
/* MXT_PROCI_GRIPFACE(20) */
329
-
0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x28, 0x04,
330
-
0x0f, 0x0a,
331
-
/* MXT_PROCG_NOISE(22) */
332
-
0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x23, 0x00,
333
-
0x00, 0x05, 0x0f, 0x19, 0x23, 0x2d, 0x03,
334
-
/* MXT_TOUCH_PROXIMITY(23) */
335
-
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
336
-
0x00, 0x00, 0x00, 0x00, 0x00,
337
-
/* MXT_PROCI_ONETOUCH(24) */
338
-
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
339
-
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
340
-
/* MXT_SPT_SELFTEST(25) */
341
-
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
342
-
0x00, 0x00, 0x00, 0x00,
343
-
/* MXT_PROCI_TWOTOUCH(27) */
344
-
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
345
-
/* MXT_SPT_CTECONFIG(28) */
346
-
0x00, 0x00, 0x02, 0x08, 0x10, 0x00,
347
-
};
348
-
349
310
static struct mxt_platform_data mxt_platform_data = {
350
-
.config = mxt_init_vals,
351
-
.config_length = ARRAY_SIZE(mxt_init_vals),
352
-
353
311
.x_line = 18,
354
312
.y_line = 11,
355
313
.x_size = 1024,
···
529
571
530
572
static struct regulator_init_data __initdata max8997_ldo8_data = {
531
573
.constraints = {
532
-
.name = "VUSB/VDAC_3.3V_C210",
574
+
.name = "VUSB+VDAC_3.3V_C210",
533
575
.min_uV = 3300000,
534
576
.max_uV = 3300000,
535
577
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
···
1305
1347
1306
1348
static void __init nuri_map_io(void)
1307
1349
{
1350
+
clk_xusbxti.rate = 24000000;
1308
1351
exynos_init_io(NULL, 0);
1309
1352
s3c24xx_init_clocks(24000000);
1310
1353
s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs));
···
1338
1379
nuri_camera_init();
1339
1380
1340
1381
nuri_ehci_init();
1341
-
clk_xusbxti.rate = 24000000;
1342
1382
1343
1383
/* Last */
1344
1384
platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices));
+2
arch/arm/mach-exynos/mach-universal_c210.c
+2
arch/arm/mach-exynos/mach-universal_c210.c
···
29
29
#include <asm/mach-types.h>
30
30
31
31
#include <plat/regs-serial.h>
32
+
#include <plat/clock.h>
32
33
#include <plat/cpu.h>
33
34
#include <plat/devs.h>
34
35
#include <plat/iic.h>
···
1058
1057
1059
1058
static void __init universal_map_io(void)
1060
1059
{
1060
+
clk_xusbxti.rate = 24000000;
1061
1061
exynos_init_io(NULL, 0);
1062
1062
s3c24xx_init_clocks(24000000);
1063
1063
s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
-3
arch/arm/mach-msm/board-halibut.c
-3
arch/arm/mach-msm/board-halibut.c
+1
arch/arm/mach-msm/board-trout-panel.c
+1
arch/arm/mach-msm/board-trout-panel.c
+1
arch/arm/mach-msm/board-trout.c
+1
arch/arm/mach-msm/board-trout.c
+1
-1
arch/arm/mach-msm/proc_comm.c
+1
-1
arch/arm/mach-msm/proc_comm.c
-80
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
-80
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
···
165
165
166
166
return 0;
167
167
}
168
-
169
-
#ifdef CONFIG_CPU_FREQ
170
-
/*
171
-
* Walk PRCM rate table and fillout cpufreq freq_table
172
-
* XXX This should be replaced by an OPP layer in the near future
173
-
*/
174
-
static struct cpufreq_frequency_table *freq_table;
175
-
176
-
void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
177
-
{
178
-
const struct prcm_config *prcm;
179
-
int i = 0;
180
-
int tbl_sz = 0;
181
-
182
-
if (!cpu_is_omap24xx())
183
-
return;
184
-
185
-
for (prcm = rate_table; prcm->mpu_speed; prcm++) {
186
-
if (!(prcm->flags & cpu_mask))
187
-
continue;
188
-
if (prcm->xtal_speed != sclk->rate)
189
-
continue;
190
-
191
-
/* don't put bypass rates in table */
192
-
if (prcm->dpll_speed == prcm->xtal_speed)
193
-
continue;
194
-
195
-
tbl_sz++;
196
-
}
197
-
198
-
/*
199
-
* XXX Ensure that we're doing what CPUFreq expects for this error
200
-
* case and the following one
201
-
*/
202
-
if (tbl_sz == 0) {
203
-
pr_warning("%s: no matching entries in rate_table\n",
204
-
__func__);
205
-
return;
206
-
}
207
-
208
-
/* Include the CPUFREQ_TABLE_END terminator entry */
209
-
tbl_sz++;
210
-
211
-
freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * tbl_sz,
212
-
GFP_ATOMIC);
213
-
if (!freq_table) {
214
-
pr_err("%s: could not kzalloc frequency table\n", __func__);
215
-
return;
216
-
}
217
-
218
-
for (prcm = rate_table; prcm->mpu_speed; prcm++) {
219
-
if (!(prcm->flags & cpu_mask))
220
-
continue;
221
-
if (prcm->xtal_speed != sclk->rate)
222
-
continue;
223
-
224
-
/* don't put bypass rates in table */
225
-
if (prcm->dpll_speed == prcm->xtal_speed)
226
-
continue;
227
-
228
-
freq_table[i].index = i;
229
-
freq_table[i].frequency = prcm->mpu_speed / 1000;
230
-
i++;
231
-
}
232
-
233
-
freq_table[i].index = i;
234
-
freq_table[i].frequency = CPUFREQ_TABLE_END;
235
-
236
-
*table = &freq_table[0];
237
-
}
238
-
239
-
void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
240
-
{
241
-
if (!cpu_is_omap24xx())
242
-
return;
243
-
244
-
kfree(freq_table);
245
-
}
246
-
247
-
#endif
-5
arch/arm/mach-omap2/clock.c
-5
arch/arm/mach-omap2/clock.c
···
536
536
.clk_set_rate = omap2_clk_set_rate,
537
537
.clk_set_parent = omap2_clk_set_parent,
538
538
.clk_disable_unused = omap2_clk_disable_unused,
539
-
#ifdef CONFIG_CPU_FREQ
540
-
/* These will be removed when the OPP code is integrated */
541
-
.clk_init_cpufreq_table = omap2_clk_init_cpufreq_table,
542
-
.clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table,
543
-
#endif
544
539
};
545
540
-8
arch/arm/mach-omap2/clock.h
-8
arch/arm/mach-omap2/clock.h
···
146
146
extern const struct clksel_rate gfx_l3_rates[];
147
147
extern const struct clksel_rate dsp_ick_rates[];
148
148
149
-
#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ)
150
-
extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
151
-
extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
152
-
#else
153
-
#define omap2_clk_init_cpufreq_table 0
154
-
#define omap2_clk_exit_cpufreq_table 0
155
-
#endif
156
-
157
149
extern const struct clkops clkops_omap2_iclk_dflt_wait;
158
150
extern const struct clkops clkops_omap2_iclk_dflt;
159
151
extern const struct clkops clkops_omap2_iclk_idle_only;
-2
arch/arm/mach-s5pv210/dma.c
-2
arch/arm/mach-s5pv210/dma.c
+2
-2
arch/arm/mach-s5pv210/mach-aquila.c
+2
-2
arch/arm/mach-s5pv210/mach-aquila.c
···
484
484
.gpio_defaults[8] = 0x0100,
485
485
.gpio_defaults[9] = 0x0100,
486
486
.gpio_defaults[10] = 0x0100,
487
-
.ldo[0] = { S5PV210_MP03(6), NULL, &wm8994_ldo1_data }, /* XM0FRNB_2 */
488
-
.ldo[1] = { 0, NULL, &wm8994_ldo2_data },
487
+
.ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */
488
+
.ldo[1] = { 0, &wm8994_ldo2_data },
489
489
};
490
490
491
491
/* GPIO I2C PMIC */
+2
-2
arch/arm/mach-s5pv210/mach-goni.c
+2
-2
arch/arm/mach-s5pv210/mach-goni.c
···
674
674
.gpio_defaults[8] = 0x0100,
675
675
.gpio_defaults[9] = 0x0100,
676
676
.gpio_defaults[10] = 0x0100,
677
-
.ldo[0] = { S5PV210_MP03(6), NULL, &wm8994_ldo1_data }, /* XM0FRNB_2 */
678
-
.ldo[1] = { 0, NULL, &wm8994_ldo2_data },
677
+
.ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */
678
+
.ldo[1] = { 0, &wm8994_ldo2_data },
679
679
};
680
680
681
681
/* GPIO I2C PMIC */
-26
arch/arm/plat-omap/clock.c
-26
arch/arm/plat-omap/clock.c
···
398
398
.ops = &clkops_null,
399
399
};
400
400
401
-
#ifdef CONFIG_CPU_FREQ
402
-
void clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
403
-
{
404
-
unsigned long flags;
405
-
406
-
if (!arch_clock || !arch_clock->clk_init_cpufreq_table)
407
-
return;
408
-
409
-
spin_lock_irqsave(&clockfw_lock, flags);
410
-
arch_clock->clk_init_cpufreq_table(table);
411
-
spin_unlock_irqrestore(&clockfw_lock, flags);
412
-
}
413
-
414
-
void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
415
-
{
416
-
unsigned long flags;
417
-
418
-
if (!arch_clock || !arch_clock->clk_exit_cpufreq_table)
419
-
return;
420
-
421
-
spin_lock_irqsave(&clockfw_lock, flags);
422
-
arch_clock->clk_exit_cpufreq_table(table);
423
-
spin_unlock_irqrestore(&clockfw_lock, flags);
424
-
}
425
-
#endif
426
-
427
401
/*
428
402
*
429
403
*/
-10
arch/arm/plat-omap/include/plat/clock.h
-10
arch/arm/plat-omap/include/plat/clock.h
···
272
272
#endif
273
273
};
274
274
275
-
struct cpufreq_frequency_table;
276
-
277
275
struct clk_functions {
278
276
int (*clk_enable)(struct clk *clk);
279
277
void (*clk_disable)(struct clk *clk);
···
281
283
void (*clk_allow_idle)(struct clk *clk);
282
284
void (*clk_deny_idle)(struct clk *clk);
283
285
void (*clk_disable_unused)(struct clk *clk);
284
-
#ifdef CONFIG_CPU_FREQ
285
-
void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **);
286
-
void (*clk_exit_cpufreq_table)(struct cpufreq_frequency_table **);
287
-
#endif
288
286
};
289
287
290
288
extern int mpurate;
···
295
301
extern unsigned long followparent_recalc(struct clk *clk);
296
302
extern void clk_enable_init_clocks(void);
297
303
unsigned long omap_fixed_divisor_recalc(struct clk *clk);
298
-
#ifdef CONFIG_CPU_FREQ
299
-
extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
300
-
extern void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
301
-
#endif
302
304
extern struct clk *omap_clk_get_by_name(const char *name);
303
305
extern int omap_clk_enable_autoidle_all(void);
304
306
extern int omap_clk_disable_autoidle_all(void);
+1
arch/arm/plat-samsung/Kconfig
+1
arch/arm/plat-samsung/Kconfig
+4
-4
drivers/video/msm/mddi.c
+4
-4
drivers/video/msm/mddi.c
···
420
420
mddi_set_auto_hibernate(&mddi->client_data, 1);
421
421
}
422
422
423
-
static int __init mddi_get_client_caps(struct mddi_info *mddi)
423
+
static int __devinit mddi_get_client_caps(struct mddi_info *mddi)
424
424
{
425
425
int i, j;
426
426
···
622
622
623
623
static struct mddi_info mddi_info[2];
624
624
625
-
static int __init mddi_clk_setup(struct platform_device *pdev,
626
-
struct mddi_info *mddi,
627
-
unsigned long clk_rate)
625
+
static int __devinit mddi_clk_setup(struct platform_device *pdev,
626
+
struct mddi_info *mddi,
627
+
unsigned long clk_rate)
628
628
{
629
629
int ret;
630
630