Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amd/amdgpu: Move PWR_MISC_CNTL_STATUS to its own header
The register is part of the PWR block not the GC block. Move to
its own header.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Tom St Denis
and committed by
Alex Deucher
6c33a6f4
2e40d9b9
+57
-7
-2
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
-2
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
···
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#define mmCP_DE_LAST_INVAL_COUNT_BASE_IDX 0
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#define mmCP_DE_DE_COUNT 0x00c4
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#define mmCP_DE_DE_COUNT_BASE_IDX 0
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-
#define mmPWR_MISC_CNTL_STATUS 0x0183
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-
#define mmPWR_MISC_CNTL_STATUS_BASE_IDX 0
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#define mmCP_STALLED_STAT3 0x019c
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#define mmCP_STALLED_STAT3_BASE_IDX 0
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#define mmCP_STALLED_STAT1 0x019d
-5
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h
-5
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h
···
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//CP_DE_DE_COUNT
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#define CP_DE_DE_COUNT__DRAW_ENGINE_COUNT__SHIFT 0x0
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#define CP_DE_DE_COUNT__DRAW_ENGINE_COUNT_MASK 0xFFFFFFFFL
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//PWR_MISC_CNTL_STATUS
805
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#define PWR_MISC_CNTL_STATUS__PWR_GFX_RLC_CGPG_EN__SHIFT 0x0
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#define PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS__SHIFT 0x1
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#define PWR_MISC_CNTL_STATUS__PWR_GFX_RLC_CGPG_EN_MASK 0x00000001L
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#define PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS_MASK 0x00000006L
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//CP_STALLED_STAT3
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#define CP_STALLED_STAT3__CE_TO_CSF_NOT_RDY_TO_RCV__SHIFT 0x0
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#define CP_STALLED_STAT3__CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV__SHIFT 0x1
+27
drivers/gpu/drm/amd/include/asic_reg/pwr/pwr_10_0_offset.h
+27
drivers/gpu/drm/amd/include/asic_reg/pwr/pwr_10_0_offset.h
···
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/*
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* Copyright (C) 2020 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
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* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _pwr_10_0_OFFSET_HEADER
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#define _pwr_10_0_OFFSET_HEADER
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#define mmPWR_MISC_CNTL_STATUS 0x0183
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#define mmPWR_MISC_CNTL_STATUS_BASE_IDX 0
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#endif
+30
drivers/gpu/drm/amd/include/asic_reg/pwr/pwr_10_0_sh_mask.h
+30
drivers/gpu/drm/amd/include/asic_reg/pwr/pwr_10_0_sh_mask.h
···
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/*
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* Copyright (C) 2020 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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+
* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
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* AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _pwr_10_0_SH_MASK_HEADER
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#define _pwr_10_0_SH_MASK_HEADER
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//PWR_MISC_CNTL_STATUS
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#define PWR_MISC_CNTL_STATUS__PWR_GFX_RLC_CGPG_EN__SHIFT 0x0
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#define PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS__SHIFT 0x1
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#define PWR_MISC_CNTL_STATUS__PWR_GFX_RLC_CGPG_EN_MASK 0x00000001L
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#define PWR_MISC_CNTL_STATUS__PWR_GFXOFF_STATUS_MASK 0x00000006L
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#endif