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riscv: dts: microchip: add missing CAN bus clocks

The CAN controller on PolarFire SoC has an AHB peripheral clock _and_ a
CAN bus clock. The bus clock was omitted when the binding was written,
but is required for operation. Make up for lost time and add to the DT.

Fixes: 38a71fc04895 ("riscv: dts: microchip: add mpfs's CAN controllers")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

Conor Dooley 6c735383 2db68ddb

+2 -2
+2 -2
arch/riscv/boot/dts/microchip/mpfs.dtsi
··· 422 422 can0: can@2010c000 { 423 423 compatible = "microchip,mpfs-can"; 424 424 reg = <0x0 0x2010c000 0x0 0x1000>; 425 - clocks = <&clkcfg CLK_CAN0>; 425 + clocks = <&clkcfg CLK_CAN0>, <&clkcfg CLK_MSSPLL3>; 426 426 interrupt-parent = <&plic>; 427 427 interrupts = <56>; 428 428 status = "disabled"; ··· 431 431 can1: can@2010d000 { 432 432 compatible = "microchip,mpfs-can"; 433 433 reg = <0x0 0x2010d000 0x0 0x1000>; 434 - clocks = <&clkcfg CLK_CAN1>; 434 + clocks = <&clkcfg CLK_CAN1>, <&clkcfg CLK_MSSPLL3>; 435 435 interrupt-parent = <&plic>; 436 436 interrupts = <57>; 437 437 status = "disabled";