Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'riscv-for-linus-5.8-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux into master
Pull RISC-V fixes from Palmer Dabbelt:
"Two fixes:
- 16KiB kernel stacks on rv64, which fixes a lot of crashes.
- Rolling an mmiowb() into the scheduler, which when combined with
Will's fix to the mmiowb()-on-spinlock should fix the PREEMPT
issues we've been seeing"
* tag 'riscv-for-linus-5.8-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
RISC-V: Upgrade smp_mb__after_spinlock() to iorw,iorw
riscv: use 16KB kernel stack on 64-bit
+13
-1
+9
-1
arch/riscv/include/asm/barrier.h
+9
-1
arch/riscv/include/asm/barrier.h
···
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* The AQ/RL pair provides a RCpc critical section, but there's not really any
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* way we can take advantage of that here because the ordering is only enforced
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* on that one lock. Thus, we're just doing a full fence.
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+
*
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* Since we allow writeX to be called from preemptive regions we need at least
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* an "o" in the predecessor set to ensure device writes are visible before the
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* task is marked as available for scheduling on a new hart. While I don't see
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* any concrete reason we need a full IO fence, it seems safer to just upgrade
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* this in order to avoid any IO crossing a scheduling boundary. In both
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* instances the scheduler pairs this with an mb(), so nothing is necessary on
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* the new hart.
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*/
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-
#define smp_mb__after_spinlock() RISCV_FENCE(rw,rw)
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+
#define smp_mb__after_spinlock() RISCV_FENCE(iorw,iorw)
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#include <asm-generic/barrier.h>
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+4
arch/riscv/include/asm/thread_info.h
+4
arch/riscv/include/asm/thread_info.h