tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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iio: adc: stx104: Implement and utilize register structures

Reduce magic numbers and improve code readability by implementing and
utilizing named register data structures.

Tested-by: Fred Eckert <Frede@cmslaser.com>
Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
Link: https://lore.kernel.org/r/8cb91d5b53e57b066120e42ea07000d6c7ef5543.1657213745.git.william.gray@linaro.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

authored by

William Breathitt Gray and committed by
Jonathan Cameron 6cfd14c5 98a30ae0

+50 -24
+50 -24
drivers/iio/adc/stx104.c
··· 16 16 #include <linux/module.h> 17 17 #include <linux/moduleparam.h> 18 18 #include <linux/spinlock.h> 19 + #include <linux/types.h> 19 20 20 21 #define STX104_OUT_CHAN(chan) { \ 21 22 .type = IIO_VOLTAGE, \ ··· 46 45 MODULE_PARM_DESC(base, "Apex Embedded Systems STX104 base addresses"); 47 46 48 47 /** 48 + * struct stx104_reg - device register structure 49 + * @ssr_ad: Software Strobe Register and ADC Data 50 + * @achan: ADC Channel 51 + * @dio: Digital I/O 52 + * @dac: DAC Channels 53 + * @cir_asr: Clear Interrupts and ADC Status 54 + * @acr: ADC Control 55 + * @pccr_fsh: Pacer Clock Control and FIFO Status MSB 56 + * @acfg: ADC Configuration 57 + */ 58 + struct stx104_reg { 59 + u16 ssr_ad; 60 + u8 achan; 61 + u8 dio; 62 + u16 dac[2]; 63 + u8 cir_asr; 64 + u8 acr; 65 + u8 pccr_fsh; 66 + u8 acfg; 67 + }; 68 + 69 + /** 49 70 * struct stx104_iio - IIO device private data structure 50 71 * @chan_out_states: channels' output states 51 - * @base: base port address of the IIO device 72 + * @reg: I/O address offset for the device registers 52 73 */ 53 74 struct stx104_iio { 54 75 unsigned int chan_out_states[STX104_NUM_OUT_CHAN]; 55 - void __iomem *base; 76 + struct stx104_reg __iomem *reg; 56 77 }; 57 78 58 79 /** ··· 87 64 struct stx104_gpio { 88 65 struct gpio_chip chip; 89 66 spinlock_t lock; 90 - void __iomem *base; 67 + u8 __iomem *base; 91 68 unsigned int out_state; 92 69 }; 93 70 ··· 95 72 struct iio_chan_spec const *chan, int *val, int *val2, long mask) 96 73 { 97 74 struct stx104_iio *const priv = iio_priv(indio_dev); 75 + struct stx104_reg __iomem *const reg = priv->reg; 98 76 unsigned int adc_config; 99 77 int adbu; 100 78 int gain; ··· 103 79 switch (mask) { 104 80 case IIO_CHAN_INFO_HARDWAREGAIN: 105 81 /* get gain configuration */ 106 - adc_config = ioread8(priv->base + 11); 82 + adc_config = ioread8(&reg->acfg); 107 83 gain = adc_config & 0x3; 108 84 109 85 *val = 1 << gain; ··· 115 91 } 116 92 117 93 /* select ADC channel */ 118 - iowrite8(chan->channel | (chan->channel << 4), priv->base + 2); 94 + iowrite8(chan->channel | (chan->channel << 4), &reg->achan); 119 95 120 - /* trigger ADC sample capture and wait for completion */ 121 - iowrite8(0, priv->base); 122 - while (ioread8(priv->base + 8) & BIT(7)); 96 + /* trigger ADC sample capture by writing to the 8-bit 97 + * Software Strobe Register and wait for completion 98 + */ 99 + iowrite8(0, &reg->ssr_ad); 100 + while (ioread8(&reg->cir_asr) & BIT(7)); 123 101 124 - *val = ioread16(priv->base); 102 + *val = ioread16(&reg->ssr_ad); 125 103 return IIO_VAL_INT; 126 104 case IIO_CHAN_INFO_OFFSET: 127 105 /* get ADC bipolar/unipolar configuration */ 128 - adc_config = ioread8(priv->base + 11); 106 + adc_config = ioread8(&reg->acfg); 129 107 adbu = !(adc_config & BIT(2)); 130 108 131 109 *val = -32768 * adbu; 132 110 return IIO_VAL_INT; 133 111 case IIO_CHAN_INFO_SCALE: 134 112 /* get ADC bipolar/unipolar and gain configuration */ 135 - adc_config = ioread8(priv->base + 11); 113 + adc_config = ioread8(&reg->acfg); 136 114 adbu = !(adc_config & BIT(2)); 137 115 gain = adc_config & 0x3; 138 116 ··· 156 130 /* Only four gain states (x1, x2, x4, x8) */ 157 131 switch (val) { 158 132 case 1: 159 - iowrite8(0, priv->base + 11); 133 + iowrite8(0, &priv->reg->acfg); 160 134 break; 161 135 case 2: 162 - iowrite8(1, priv->base + 11); 136 + iowrite8(1, &priv->reg->acfg); 163 137 break; 164 138 case 4: 165 - iowrite8(2, priv->base + 11); 139 + iowrite8(2, &priv->reg->acfg); 166 140 break; 167 141 case 8: 168 - iowrite8(3, priv->base + 11); 142 + iowrite8(3, &priv->reg->acfg); 169 143 break; 170 144 default: 171 145 return -EINVAL; ··· 179 153 return -EINVAL; 180 154 181 155 priv->chan_out_states[chan->channel] = val; 182 - iowrite16(val, priv->base + 4 + 2 * chan->channel); 156 + iowrite16(val, &priv->reg->dac[chan->channel]); 183 157 184 158 return 0; 185 159 } ··· 333 307 } 334 308 335 309 priv = iio_priv(indio_dev); 336 - priv->base = devm_ioport_map(dev, base[id], STX104_EXTENT); 337 - if (!priv->base) 310 + priv->reg = devm_ioport_map(dev, base[id], STX104_EXTENT); 311 + if (!priv->reg) 338 312 return -ENOMEM; 339 313 340 314 indio_dev->info = &stx104_info; 341 315 indio_dev->modes = INDIO_DIRECT_MODE; 342 316 343 317 /* determine if differential inputs */ 344 - if (ioread8(priv->base + 8) & BIT(5)) { 318 + if (ioread8(&priv->reg->cir_asr) & BIT(5)) { 345 319 indio_dev->num_channels = ARRAY_SIZE(stx104_channels_diff); 346 320 indio_dev->channels = stx104_channels_diff; 347 321 } else { ··· 352 326 indio_dev->name = dev_name(dev); 353 327 354 328 /* configure device for software trigger operation */ 355 - iowrite8(0, priv->base + 9); 329 + iowrite8(0, &priv->reg->acr); 356 330 357 331 /* initialize gain setting to x1 */ 358 - iowrite8(0, priv->base + 11); 332 + iowrite8(0, &priv->reg->acfg); 359 333 360 334 /* initialize DAC output to 0V */ 361 - iowrite16(0, priv->base + 4); 362 - iowrite16(0, priv->base + 6); 335 + iowrite16(0, &priv->reg->dac[0]); 336 + iowrite16(0, &priv->reg->dac[1]); 363 337 364 338 stx104gpio->chip.label = dev_name(dev); 365 339 stx104gpio->chip.parent = dev; ··· 374 348 stx104gpio->chip.get_multiple = stx104_gpio_get_multiple; 375 349 stx104gpio->chip.set = stx104_gpio_set; 376 350 stx104gpio->chip.set_multiple = stx104_gpio_set_multiple; 377 - stx104gpio->base = priv->base + 3; 351 + stx104gpio->base = &priv->reg->dio; 378 352 stx104gpio->out_state = 0x0; 379 353 380 354 spin_lock_init(&stx104gpio->lock);