tjh.dev / kernel
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scsi: ufs: exynos: fsd: Gate ref_clk and put UFS device in reset on suspend

On FSD platform, gating the reference clock (ref_clk) and putting the
UFS device in reset by asserting the reset signal during UFS suspend,
improves the power savings and ensures the PHY is fully turned off.

These operations are added as FSD specific suspend hook to avoid
unintended side effects on other SoCs supported by this driver.

Co-developed-by: Nimesh Sati <nimesh.sati@samsung.com>
Signed-off-by: Nimesh Sati <nimesh.sati@samsung.com>
Signed-off-by: Bharat Uppal <bharat.uppal@samsung.com>
Link: https://lore.kernel.org/r/20250821053923.69411-1-bharat.uppal@samsung.com
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

authored by

Bharat Uppal and committed by
Martin K. Petersen 6d55af0f d6477ee3

+8
+8
drivers/ufs/host/ufs-exynos.c
··· 1896 1896 return 0; 1897 1897 } 1898 1898 1899 + static int fsd_ufs_suspend(struct exynos_ufs *ufs) 1900 + { 1901 + exynos_ufs_gate_clks(ufs); 1902 + hci_writel(ufs, 0, HCI_GPIO_OUT); 1903 + return 0; 1904 + } 1905 + 1899 1906 static inline u32 get_mclk_period_unipro_18(struct exynos_ufs *ufs) 1900 1907 { 1901 1908 return (16 * 1000 * 1000000UL / ufs->mclk_rate); ··· 2169 2162 .pre_link = fsd_ufs_pre_link, 2170 2163 .post_link = fsd_ufs_post_link, 2171 2164 .pre_pwr_change = fsd_ufs_pre_pwr_change, 2165 + .suspend = fsd_ufs_suspend, 2172 2166 }; 2173 2167 2174 2168 static const struct exynos_ufs_drv_data gs101_ufs_drvs = {