Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amdgpu: Use the right struct for VCN v5.0.1
VCN IP versions >= 5.0 uses VCN5 fw shared struct.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Lijo Lazar
and committed by
Alex Deucher
6e094020
049e5bf3
+6
-6
+6
-6
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
+6
-6
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
···
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if (drm_dev_enter(adev_to_drm(adev), &idx)) {
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for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
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-
volatile struct amdgpu_vcn4_fw_shared *fw_shared;
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+
volatile struct amdgpu_vcn5_fw_shared *fw_shared;
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fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr;
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fw_shared->present_flag_0 = 0;
···
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upper_32_bits(adev->vcn.inst[inst].fw_shared.gpu_addr));
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WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_NONCACHE_OFFSET0, 0);
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WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_NONCACHE_SIZE0,
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AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared)));
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AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn5_fw_shared)));
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}
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/**
···
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VCN, 0, regUVD_VCPU_NONCACHE_OFFSET0), 0, 0, indirect);
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WREG32_SOC24_DPG_MODE(inst_idx, SOC24_DPG_MODE_OFFSET(
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VCN, 0, regUVD_VCPU_NONCACHE_SIZE0),
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AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared)), 0, indirect);
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AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn5_fw_shared)), 0, indirect);
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/* VCN global tiling registers */
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WREG32_SOC24_DPG_MODE(inst_idx, SOC24_DPG_MODE_OFFSET(
···
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{
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struct amdgpu_device *adev = vinst->adev;
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int inst_idx = vinst->inst;
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volatile struct amdgpu_vcn4_fw_shared *fw_shared =
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volatile struct amdgpu_vcn5_fw_shared *fw_shared =
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adev->vcn.inst[inst_idx].fw_shared.cpu_addr;
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struct amdgpu_ring *ring;
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int vcn_inst;
···
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{
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struct amdgpu_device *adev = vinst->adev;
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int i = vinst->inst;
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volatile struct amdgpu_vcn4_fw_shared *fw_shared;
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+
volatile struct amdgpu_vcn5_fw_shared *fw_shared;
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struct amdgpu_ring *ring;
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uint32_t tmp;
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int j, k, r, vcn_inst;
···
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{
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struct amdgpu_device *adev = vinst->adev;
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int i = vinst->inst;
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volatile struct amdgpu_vcn4_fw_shared *fw_shared;
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volatile struct amdgpu_vcn5_fw_shared *fw_shared;
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uint32_t tmp;
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int r = 0, vcn_inst;
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