Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'kvmarm-fixes-7.0-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm64 fixes for 7.0, take #3
- Correctly handle deeactivation of out-of-LRs interrupts by
starting the EOIcount deactivation walk *after* the last irq
that made it into an LR. This avoids deactivating irqs that
are in the LRs and that the vcpu hasn't deactivated yet.
- Avoid calling into the stubs to probe for ICH_VTR_EL2.TDS when
pKVM is already enabled -- not only thhis isn't possible (pKVM
will reject the call), but it is also useless: this can only
happen for a CPU that has already booted once, and the capability
will not change.
+26
-8
+3
arch/arm64/include/asm/kvm_host.h
+3
arch/arm64/include/asm/kvm_host.h
···
784
784
/* Number of debug breakpoints/watchpoints for this CPU (minus 1) */
785
785
unsigned int debug_brps;
786
786
unsigned int debug_wrps;
787
+
788
+
/* Last vgic_irq part of the AP list recorded in an LR */
789
+
struct vgic_irq *last_lr_irq;
787
790
};
788
791
789
792
struct kvm_host_psci_config {
+9
arch/arm64/kernel/cpufeature.c
+9
arch/arm64/kernel/cpufeature.c
···
2345
2345
!is_midr_in_range_list(has_vgic_v3))
2346
2346
return false;
2347
2347
2348
+
/*
2349
+
* pKVM prevents late onlining of CPUs. This means that whatever
2350
+
* state the capability is in after deprivilege cannot be affected
2351
+
* by a new CPU booting -- this is garanteed to be a CPU we have
2352
+
* already seen, and the cap is therefore unchanged.
2353
+
*/
2354
+
if (system_capabilities_finalized() && is_protected_kvm_enabled())
2355
+
return cpus_have_final_cap(ARM64_HAS_ICH_HCR_EL2_TDIR);
2356
+
2348
2357
if (is_kernel_in_hyp_mode())
2349
2358
res.a1 = read_sysreg_s(SYS_ICH_VTR_EL2);
2350
2359
else
+2
-2
arch/arm64/kvm/vgic/vgic-v2.c
+2
-2
arch/arm64/kvm/vgic/vgic-v2.c
···
115
115
struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
116
116
struct vgic_v2_cpu_if *cpuif = &vgic_cpu->vgic_v2;
117
117
u32 eoicount = FIELD_GET(GICH_HCR_EOICOUNT, cpuif->vgic_hcr);
118
-
struct vgic_irq *irq;
118
+
struct vgic_irq *irq = *host_data_ptr(last_lr_irq);
119
119
120
120
DEBUG_SPINLOCK_BUG_ON(!irqs_disabled());
121
121
···
123
123
vgic_v2_fold_lr(vcpu, cpuif->vgic_lr[lr]);
124
124
125
125
/* See the GICv3 equivalent for the EOIcount handling rationale */
126
-
list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
126
+
list_for_each_entry_continue(irq, &vgic_cpu->ap_list_head, ap_list) {
127
127
u32 lr;
128
128
129
129
if (!eoicount) {
+6
-6
arch/arm64/kvm/vgic/vgic-v3.c
+6
-6
arch/arm64/kvm/vgic/vgic-v3.c
···
148
148
struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
149
149
struct vgic_v3_cpu_if *cpuif = &vgic_cpu->vgic_v3;
150
150
u32 eoicount = FIELD_GET(ICH_HCR_EL2_EOIcount, cpuif->vgic_hcr);
151
-
struct vgic_irq *irq;
151
+
struct vgic_irq *irq = *host_data_ptr(last_lr_irq);
152
152
153
153
DEBUG_SPINLOCK_BUG_ON(!irqs_disabled());
154
154
···
158
158
/*
159
159
* EOIMode=0: use EOIcount to emulate deactivation. We are
160
160
* guaranteed to deactivate in reverse order of the activation, so
161
-
* just pick one active interrupt after the other in the ap_list,
162
-
* and replay the deactivation as if the CPU was doing it. We also
163
-
* rely on priority drop to have taken place, and the list to be
164
-
* sorted by priority.
161
+
* just pick one active interrupt after the other in the tail part
162
+
* of the ap_list, past the LRs, and replay the deactivation as if
163
+
* the CPU was doing it. We also rely on priority drop to have taken
164
+
* place, and the list to be sorted by priority.
165
165
*/
166
-
list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
166
+
list_for_each_entry_continue(irq, &vgic_cpu->ap_list_head, ap_list) {
167
167
u64 lr;
168
168
169
169
/*
+6
arch/arm64/kvm/vgic/vgic.c
+6
arch/arm64/kvm/vgic/vgic.c
···
814
814
815
815
static inline void vgic_fold_lr_state(struct kvm_vcpu *vcpu)
816
816
{
817
+
if (!*host_data_ptr(last_lr_irq))
818
+
return;
819
+
817
820
if (kvm_vgic_global_state.type == VGIC_V2)
818
821
vgic_v2_fold_lr_state(vcpu);
819
822
else
···
963
960
if (irqs_outside_lrs(&als))
964
961
vgic_sort_ap_list(vcpu);
965
962
963
+
*host_data_ptr(last_lr_irq) = NULL;
964
+
966
965
list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
967
966
scoped_guard(raw_spinlock, &irq->irq_lock) {
968
967
if (likely(vgic_target_oracle(irq) == vcpu)) {
969
968
vgic_populate_lr(vcpu, irq, count++);
969
+
*host_data_ptr(last_lr_irq) = irq;
970
970
}
971
971
}
972
972