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clk: renesas: r8a779h0: Add watchdog clock

Add the module clock used by the RCLK Watchdog Timer on the Renesas
R-Car V4M (R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/f1dbf0f3f484015f2e629d78b746cf377d6f6746.1706790015.git.geert+renesas@glider.be

authored by

Cong Dang and committed by
Geert Uytterhoeven
6e8b1dcb 62527c9d

+1
+1
drivers/clk/renesas/r8a779h0-cpg-mssr.c
··· 177 177 DEF_MOD("hscif1", 515, R8A779H0_CLK_SASYNCPERD1), 178 178 DEF_MOD("hscif2", 516, R8A779H0_CLK_SASYNCPERD1), 179 179 DEF_MOD("hscif3", 517, R8A779H0_CLK_SASYNCPERD1), 180 + DEF_MOD("wdt1:wdt0", 907, R8A779H0_CLK_R), 180 181 DEF_MOD("pfc0", 915, R8A779H0_CLK_CP), 181 182 DEF_MOD("pfc1", 916, R8A779H0_CLK_CP), 182 183 DEF_MOD("pfc2", 917, R8A779H0_CLK_CP),