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Merge tag 'staging-4.10-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging/IIO fixes from Greg KH:
"Here are some staging and IIO driver fixes for 4.10-rc3.

Most of these are minor IIO fixes of reported issues, along with one
network driver fix to resolve an issue. And a MAINTAINERS update with
a new mailing list. All of these, except the MAINTAINERS file update,
have been in linux-next with no reported issues (the MAINTAINERS patch
happened on Friday...)"

* tag 'staging-4.10-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging:
MAINTAINERS: add greybus subsystem mailing list
staging: octeon: Call SET_NETDEV_DEV()
iio: accel: st_accel: fix LIS3LV02 reading and scaling
iio: common: st_sensors: fix channel data parsing
iio: max44000: correct value in illuminance_integration_time_available
iio: adc: TI_AM335X_ADC should depend on HAS_DMA
iio: bmi160: Fix time needed to sleep after command execution
iio: 104-quad-8: Fix active level mismatch for the preset enable option
iio: 104-quad-8: Fix off-by-one errors when addressing IOR
iio: 104-quad-8: Fix index control configuration

+56 -30
+1
MAINTAINERS
··· 5507 5507 M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 5508 5508 S: Maintained 5509 5509 F: drivers/staging/greybus/ 5510 + L: greybus-dev@lists.linaro.org 5510 5511 5511 5512 GREYBUS AUDIO PROTOCOLS DRIVERS 5512 5513 M: Vaibhav Agarwal <vaibhav.sr@gmail.com>
+10 -2
drivers/iio/accel/st_accel_core.c
··· 353 353 [0] = { 354 354 .num = ST_ACCEL_FS_AVL_2G, 355 355 .value = 0x00, 356 - .gain = IIO_G_TO_M_S_2(1024), 356 + .gain = IIO_G_TO_M_S_2(1000), 357 357 }, 358 358 [1] = { 359 359 .num = ST_ACCEL_FS_AVL_6G, 360 360 .value = 0x01, 361 - .gain = IIO_G_TO_M_S_2(340), 361 + .gain = IIO_G_TO_M_S_2(3000), 362 362 }, 363 363 }, 364 364 }, 365 365 .bdu = { 366 366 .addr = 0x21, 367 367 .mask = 0x40, 368 + }, 369 + /* 370 + * Data Alignment Setting - needs to be set to get 371 + * left-justified data like all other sensors. 372 + */ 373 + .das = { 374 + .addr = 0x21, 375 + .mask = 0x01, 368 376 }, 369 377 .drdy_irq = { 370 378 .addr = 0x21,
+1 -1
drivers/iio/adc/Kconfig
··· 561 561 562 562 config TI_AM335X_ADC 563 563 tristate "TI's AM335X ADC driver" 564 - depends on MFD_TI_AM335X_TSCADC 564 + depends on MFD_TI_AM335X_TSCADC && HAS_DMA 565 565 select IIO_BUFFER 566 566 select IIO_KFIFO_BUF 567 567 help
+3 -1
drivers/iio/common/st_sensors/st_sensors_buffer.c
··· 30 30 31 31 for_each_set_bit(i, indio_dev->active_scan_mask, num_data_channels) { 32 32 const struct iio_chan_spec *channel = &indio_dev->channels[i]; 33 - unsigned int bytes_to_read = channel->scan_type.realbits >> 3; 33 + unsigned int bytes_to_read = 34 + DIV_ROUND_UP(channel->scan_type.realbits + 35 + channel->scan_type.shift, 8); 34 36 unsigned int storage_bytes = 35 37 channel->scan_type.storagebits >> 3; 36 38
+12 -1
drivers/iio/common/st_sensors/st_sensors_core.c
··· 401 401 return err; 402 402 } 403 403 404 + /* set DAS */ 405 + if (sdata->sensor_settings->das.addr) { 406 + err = st_sensors_write_data_with_mask(indio_dev, 407 + sdata->sensor_settings->das.addr, 408 + sdata->sensor_settings->das.mask, 1); 409 + if (err < 0) 410 + return err; 411 + } 412 + 404 413 if (sdata->int_pin_open_drain) { 405 414 dev_info(&indio_dev->dev, 406 415 "set interrupt line to open drain mode\n"); ··· 492 483 int err; 493 484 u8 *outdata; 494 485 struct st_sensor_data *sdata = iio_priv(indio_dev); 495 - unsigned int byte_for_channel = ch->scan_type.realbits >> 3; 486 + unsigned int byte_for_channel; 496 487 488 + byte_for_channel = DIV_ROUND_UP(ch->scan_type.realbits + 489 + ch->scan_type.shift, 8); 497 490 outdata = kmalloc(byte_for_channel, GFP_KERNEL); 498 491 if (!outdata) 499 492 return -ENOMEM;
+8 -5
drivers/iio/counter/104-quad-8.c
··· 153 153 ior_cfg = val | priv->preset_enable[chan->channel] << 1; 154 154 155 155 /* Load I/O control configuration */ 156 - outb(0x40 | ior_cfg, base_offset); 156 + outb(0x40 | ior_cfg, base_offset + 1); 157 157 158 158 return 0; 159 159 case IIO_CHAN_INFO_SCALE: ··· 233 233 const struct quad8_iio *const priv = iio_priv(indio_dev); 234 234 235 235 return snprintf(buf, PAGE_SIZE, "%u\n", 236 - priv->preset_enable[chan->channel]); 236 + !priv->preset_enable[chan->channel]); 237 237 } 238 238 239 239 static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev, ··· 241 241 size_t len) 242 242 { 243 243 struct quad8_iio *const priv = iio_priv(indio_dev); 244 - const int base_offset = priv->base + 2 * chan->channel; 244 + const int base_offset = priv->base + 2 * chan->channel + 1; 245 245 bool preset_enable; 246 246 int ret; 247 247 unsigned int ior_cfg; ··· 249 249 ret = kstrtobool(buf, &preset_enable); 250 250 if (ret) 251 251 return ret; 252 + 253 + /* Preset enable is active low in Input/Output Control register */ 254 + preset_enable = !preset_enable; 252 255 253 256 priv->preset_enable[chan->channel] = preset_enable; 254 257 ··· 365 362 priv->synchronous_mode[chan->channel] = synchronous_mode; 366 363 367 364 /* Load Index Control configuration to Index Control Register */ 368 - outb(0x40 | idr_cfg, base_offset); 365 + outb(0x60 | idr_cfg, base_offset); 369 366 370 367 return 0; 371 368 } ··· 447 444 priv->index_polarity[chan->channel] = index_polarity; 448 445 449 446 /* Load Index Control configuration to Index Control Register */ 450 - outb(0x40 | idr_cfg, base_offset); 447 + outb(0x60 | idr_cfg, base_offset); 451 448 452 449 return 0; 453 450 }
+6 -19
drivers/iio/imu/bmi160/bmi160_core.c
··· 66 66 67 67 #define BMI160_REG_DUMMY 0x7F 68 68 69 - #define BMI160_ACCEL_PMU_MIN_USLEEP 3200 70 - #define BMI160_ACCEL_PMU_MAX_USLEEP 3800 71 - #define BMI160_GYRO_PMU_MIN_USLEEP 55000 72 - #define BMI160_GYRO_PMU_MAX_USLEEP 80000 69 + #define BMI160_ACCEL_PMU_MIN_USLEEP 3800 70 + #define BMI160_GYRO_PMU_MIN_USLEEP 80000 73 71 #define BMI160_SOFTRESET_USLEEP 1000 74 72 75 73 #define BMI160_CHANNEL(_type, _axis, _index) { \ ··· 149 151 }, 150 152 }; 151 153 152 - struct bmi160_pmu_time { 153 - unsigned long min; 154 - unsigned long max; 155 - }; 156 - 157 - static struct bmi160_pmu_time bmi160_pmu_time[] = { 158 - [BMI160_ACCEL] = { 159 - .min = BMI160_ACCEL_PMU_MIN_USLEEP, 160 - .max = BMI160_ACCEL_PMU_MAX_USLEEP 161 - }, 162 - [BMI160_GYRO] = { 163 - .min = BMI160_GYRO_PMU_MIN_USLEEP, 164 - .max = BMI160_GYRO_PMU_MIN_USLEEP, 165 - }, 154 + static unsigned long bmi160_pmu_time[] = { 155 + [BMI160_ACCEL] = BMI160_ACCEL_PMU_MIN_USLEEP, 156 + [BMI160_GYRO] = BMI160_GYRO_PMU_MIN_USLEEP, 166 157 }; 167 158 168 159 struct bmi160_scale { ··· 276 289 if (ret < 0) 277 290 return ret; 278 291 279 - usleep_range(bmi160_pmu_time[t].min, bmi160_pmu_time[t].max); 292 + usleep_range(bmi160_pmu_time[t], bmi160_pmu_time[t] + 1000); 280 293 281 294 return 0; 282 295 }
+1 -1
drivers/iio/light/max44000.c
··· 113 113 "0.100 " 114 114 "0.025 " 115 115 "0.00625 " 116 - "0.001625"; 116 + "0.0015625"; 117 117 118 118 /* Available scales (internal to ulux) with pretty manual alignment: */ 119 119 static const int max44000_scale_avail_ulux_array[] = {
+2
drivers/staging/octeon/ethernet.c
··· 770 770 /* Initialize the device private structure. */ 771 771 struct octeon_ethernet *priv = netdev_priv(dev); 772 772 773 + SET_NETDEV_DEV(dev, &pdev->dev); 773 774 dev->netdev_ops = &cvm_oct_pow_netdev_ops; 774 775 priv->imode = CVMX_HELPER_INTERFACE_MODE_DISABLED; 775 776 priv->port = CVMX_PIP_NUM_INPUT_PORTS; ··· 817 816 } 818 817 819 818 /* Initialize the device private structure. */ 819 + SET_NETDEV_DEV(dev, &pdev->dev); 820 820 priv = netdev_priv(dev); 821 821 priv->netdev = dev; 822 822 priv->of_node = cvm_oct_node_for_port(pip, interface,
+12
include/linux/iio/common/st_sensors.h
··· 116 116 }; 117 117 118 118 /** 119 + * struct st_sensor_das - ST sensor device data alignment selection 120 + * @addr: address of the register. 121 + * @mask: mask to write the das flag for left alignment. 122 + */ 123 + struct st_sensor_das { 124 + u8 addr; 125 + u8 mask; 126 + }; 127 + 128 + /** 119 129 * struct st_sensor_data_ready_irq - ST sensor device data-ready interrupt 120 130 * @addr: address of the register. 121 131 * @mask_int1: mask to enable/disable IRQ on INT1 pin. ··· 195 185 * @enable_axis: Enable one or more axis of the sensor. 196 186 * @fs: Full scale register and full scale list available. 197 187 * @bdu: Block data update register. 188 + * @das: Data Alignment Selection register. 198 189 * @drdy_irq: Data ready register of the sensor. 199 190 * @multi_read_bit: Use or not particular bit for [I2C/SPI] multi-read. 200 191 * @bootime: samples to discard when sensor passing from power-down to power-up. ··· 211 200 struct st_sensor_axis enable_axis; 212 201 struct st_sensor_fullscale fs; 213 202 struct st_sensor_bdu bdu; 203 + struct st_sensor_das das; 214 204 struct st_sensor_data_ready_irq drdy_irq; 215 205 bool multi_read_bit; 216 206 unsigned int bootime;