iio: adc: ad7768-1: add support for SPI offload

+185 -3

2 changed files

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drivers

iio

adc

Kconfig

ad7768-1.c

drivers/iio/adc/Kconfig

··· 418 418 select REGMAP_SPI 419 419 select RATIONAL 420 420 select IIO_BUFFER 421 + select IIO_BUFFER_DMAENGINE 421 422 select IIO_TRIGGER 422 423 select IIO_TRIGGERED_BUFFER 424 + select SPI_OFFLOAD 423 425 help 424 426 Say yes here to build support for Analog Devices AD7768-1 SPI 425 427 simultaneously sampling sigma-delta analog to digital converter (ADC).

+183 -3

drivers/iio/adc/ad7768-1.c

··· 25 25 #include <linux/regulator/consumer.h> 26 26 #include <linux/regulator/driver.h> 27 27 #include <linux/sysfs.h> 28 + #include <linux/spi/offload/consumer.h> 29 + #include <linux/spi/offload/provider.h> 28 30 #include <linux/spi/spi.h> 29 31 #include <linux/unaligned.h> 30 32 #include <linux/units.h> 31 33 #include <linux/util_macros.h> 32 34 33 35 #include <linux/iio/buffer.h> 36 + #include <linux/iio/buffer-dmaengine.h> 34 37 #include <linux/iio/iio.h> 35 38 #include <linux/iio/sysfs.h> 36 39 #include <linux/iio/trigger.h> ··· 164 161 enum ad7768_scan_type { 165 162 AD7768_SCAN_TYPE_NORMAL, 166 163 AD7768_SCAN_TYPE_HIGH_SPEED, 164 + AD7768_SCAN_TYPE_OFFLOAD_NORMAL, 165 + AD7768_SCAN_TYPE_OFFLOAD_HIGH_SPEED, 167 166 }; 168 167 169 168 enum { ··· 271 266 .storagebits = 16, 272 267 .endianness = IIO_BE, 273 268 }, 269 + [AD7768_SCAN_TYPE_OFFLOAD_NORMAL] = { 270 + .sign = 's', 271 + .realbits = 24, 272 + .storagebits = 32, 273 + .endianness = IIO_CPU, 274 + }, 275 + [AD7768_SCAN_TYPE_OFFLOAD_HIGH_SPEED] = { 276 + .sign = 's', 277 + .realbits = 16, 278 + .storagebits = 32, 279 + .endianness = IIO_CPU, 280 + }, 274 281 }; 275 282 276 283 struct ad7768_chip_info { ··· 300 283 301 284 struct ad7768_state { 302 285 struct spi_device *spi; 286 + struct spi_offload *offload; 287 + struct spi_offload_trigger *offload_trigger; 303 288 struct regmap *regmap; 304 289 struct regmap *regmap24; 305 290 int vref_uv; ··· 325 306 struct gpio_desc *gpio_reset; 326 307 const char *labels[AD7768_MAX_CHANNELS]; 327 308 struct gpio_chip gpiochip; 309 + struct spi_transfer offload_xfer; 310 + struct spi_message offload_msg; 328 311 const struct ad7768_chip_info *chip; 329 312 bool en_spi_sync; 330 313 struct mutex pga_lock; /* protect device internal state (PGA) */ ··· 1140 1119 { 1141 1120 struct ad7768_state *st = iio_priv(indio_dev); 1142 1121 1122 + if (st->offload) 1123 + return st->oversampling_ratio == 8 ? 1124 + AD7768_SCAN_TYPE_OFFLOAD_HIGH_SPEED : AD7768_SCAN_TYPE_OFFLOAD_NORMAL; 1125 + 1143 1126 return st->oversampling_ratio == 8 ? 1144 1127 AD7768_SCAN_TYPE_HIGH_SPEED : AD7768_SCAN_TYPE_NORMAL; 1145 1128 } ··· 1364 1339 static const struct iio_buffer_setup_ops ad7768_buffer_ops = { 1365 1340 .postenable = &ad7768_buffer_postenable, 1366 1341 .predisable = &ad7768_buffer_predisable, 1342 + }; 1343 + 1344 + static int ad7768_offload_buffer_postenable(struct iio_dev *indio_dev) 1345 + { 1346 + struct ad7768_state *st = iio_priv(indio_dev); 1347 + struct spi_offload_trigger_config config = { 1348 + .type = SPI_OFFLOAD_TRIGGER_DATA_READY, 1349 + }; 1350 + const struct iio_scan_type *scan_type; 1351 + unsigned int unused; 1352 + int ret; 1353 + 1354 + scan_type = iio_get_current_scan_type(indio_dev, &indio_dev->channels[0]); 1355 + if (IS_ERR(scan_type)) 1356 + return PTR_ERR(scan_type); 1357 + 1358 + st->offload_xfer.len = spi_bpw_to_bytes(scan_type->realbits); 1359 + st->offload_xfer.bits_per_word = scan_type->realbits; 1360 + st->offload_xfer.offload_flags = SPI_OFFLOAD_XFER_RX_STREAM; 1361 + 1362 + spi_message_init_with_transfers(&st->offload_msg, &st->offload_xfer, 1); 1363 + st->offload_msg.offload = st->offload; 1364 + 1365 + ret = spi_optimize_message(st->spi, &st->offload_msg); 1366 + if (ret) { 1367 + dev_err(&st->spi->dev, "failed to prepare offload, err: %d\n", ret); 1368 + return ret; 1369 + } 1370 + 1371 + /* 1372 + * Write a 1 to the LSB of the INTERFACE_FORMAT register to enter 1373 + * continuous read mode. Subsequent data reads do not require an 1374 + * initial 8-bit write to query the ADC_DATA register. 1375 + */ 1376 + ret = regmap_write(st->regmap, AD7768_REG_INTERFACE_FORMAT, 0x01); 1377 + if (ret) 1378 + goto err_unoptimize_message; 1379 + 1380 + ret = spi_offload_trigger_enable(st->offload, st->offload_trigger, 1381 + &config); 1382 + if (ret) 1383 + goto err_exit_continuous_read_mode; 1384 + 1385 + return 0; 1386 + 1387 + err_exit_continuous_read_mode: 1388 + regmap_read(st->regmap24, AD7768_REG24_ADC_DATA, &unused); 1389 + 1390 + err_unoptimize_message: 1391 + spi_unoptimize_message(&st->offload_msg); 1392 + 1393 + return ret; 1394 + } 1395 + 1396 + static int ad7768_offload_buffer_predisable(struct iio_dev *indio_dev) 1397 + { 1398 + struct ad7768_state *st = iio_priv(indio_dev); 1399 + unsigned int unused; 1400 + 1401 + spi_offload_trigger_disable(st->offload, st->offload_trigger); 1402 + spi_unoptimize_message(&st->offload_msg); 1403 + 1404 + /* 1405 + * To exit continuous read mode, perform a single read of the ADC_DATA 1406 + * reg (0x2C), which allows further configuration of the device. 1407 + */ 1408 + return regmap_read(st->regmap24, AD7768_REG24_ADC_DATA, &unused); 1409 + } 1410 + 1411 + static const struct iio_buffer_setup_ops ad7768_offload_buffer_ops = { 1412 + .postenable = ad7768_offload_buffer_postenable, 1413 + .predisable = ad7768_offload_buffer_predisable, 1367 1414 }; 1368 1415 1369 1416 static int ad7768_set_trigger_state(struct iio_trigger *trig, bool enable) ··· 1686 1589 return 0; 1687 1590 } 1688 1591 1592 + static bool ad7768_offload_trigger_match(struct spi_offload_trigger *trigger, 1593 + enum spi_offload_trigger_type type, 1594 + u64 *args, u32 nargs) 1595 + { 1596 + if (type != SPI_OFFLOAD_TRIGGER_DATA_READY) 1597 + return false; 1598 + 1599 + /* Up to 2 args are allowed, but only 1 is used */ 1600 + if (nargs == 0 || nargs > 2 || args[0] != AD7768_TRIGGER_SOURCE_DRDY) 1601 + return false; 1602 + 1603 + return true; 1604 + } 1605 + 1606 + static int ad7768_offload_trigger_request(struct spi_offload_trigger *trigger, 1607 + enum spi_offload_trigger_type type, 1608 + u64 *args, u32 nargs) 1609 + { 1610 + /* Should already be validated by match, but just in case */ 1611 + if (nargs == 0 || nargs > 2) 1612 + return -EINVAL; 1613 + 1614 + return 0; 1615 + } 1616 + 1617 + static const struct spi_offload_trigger_ops ad7768_offload_trigger_ops = { 1618 + .match = ad7768_offload_trigger_match, 1619 + .request = ad7768_offload_trigger_request, 1620 + }; 1621 + 1689 1622 static const struct ad7768_chip_info ad7768_chip_info = { 1690 1623 .name = "ad7768-1", 1691 1624 .channel_spec = ad7768_channels, ··· 1753 1626 .has_variable_aaf = true, 1754 1627 }; 1755 1628 1629 + static const struct spi_offload_config ad7768_spi_offload_config = { 1630 + .capability_flags = SPI_OFFLOAD_CAP_TRIGGER | SPI_OFFLOAD_CAP_RX_STREAM_DMA, 1631 + }; 1632 + 1633 + static int ad7768_spi_offload_probe(struct iio_dev *indio_dev, 1634 + struct ad7768_state *st) 1635 + { 1636 + struct device *dev = &st->spi->dev; 1637 + struct spi_offload_trigger_info trigger_info = { 1638 + .fwnode = dev_fwnode(dev), 1639 + .ops = &ad7768_offload_trigger_ops, 1640 + .priv = st, 1641 + }; 1642 + struct dma_chan *rx_dma; 1643 + int ret; 1644 + 1645 + ret = devm_spi_offload_trigger_register(dev, &trigger_info); 1646 + if (ret) 1647 + return dev_err_probe(dev, ret, "failed to register offload trigger\n"); 1648 + 1649 + st->offload_trigger = devm_spi_offload_trigger_get(dev, st->offload, 1650 + SPI_OFFLOAD_TRIGGER_DATA_READY); 1651 + if (IS_ERR(st->offload_trigger)) 1652 + return dev_err_probe(dev, PTR_ERR(st->offload_trigger), 1653 + "failed to get offload trigger\n"); 1654 + 1655 + rx_dma = devm_spi_offload_rx_stream_request_dma_chan(dev, st->offload); 1656 + if (IS_ERR(rx_dma)) 1657 + return dev_err_probe(dev, PTR_ERR(rx_dma), "failed to get offload RX DMA\n"); 1658 + 1659 + ret = devm_iio_dmaengine_buffer_setup_with_handle(dev, indio_dev, rx_dma, 1660 + IIO_BUFFER_DIRECTION_IN); 1661 + if (ret) 1662 + return dev_err_probe(dev, ret, "failed to setup offload RX DMA\n"); 1663 + 1664 + indio_dev->setup_ops = &ad7768_offload_buffer_ops; 1665 + 1666 + return 0; 1667 + } 1668 + 1756 1669 static int ad7768_probe(struct spi_device *spi) 1757 1670 { 1758 1671 struct ad7768_state *st; 1759 1672 struct iio_dev *indio_dev; 1673 + struct device *dev = &spi->dev; 1760 1674 int ret; 1761 1675 1762 1676 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); ··· 1893 1725 if (ret) 1894 1726 return ret; 1895 1727 1896 - ret = ad7768_triggered_buffer_alloc(indio_dev); 1897 - if (ret) 1898 - return ret; 1728 + st->offload = devm_spi_offload_get(dev, spi, &ad7768_spi_offload_config); 1729 + ret = PTR_ERR_OR_ZERO(st->offload); 1730 + if (ret == -ENODEV) { 1731 + /* If not using SPI offload, fall back to low speed usage */ 1732 + ret = ad7768_triggered_buffer_alloc(indio_dev); 1733 + if (ret) 1734 + return ret; 1735 + } else if (ret) { 1736 + return dev_err_probe(dev, ret, "failed to get SPI offload\n"); 1737 + } else { 1738 + ret = ad7768_spi_offload_probe(indio_dev, st); 1739 + if (ret) 1740 + return ret; 1741 + } 1899 1742 1900 1743 return devm_iio_device_register(&spi->dev, indio_dev); 1901 1744 } ··· 1942 1763 MODULE_AUTHOR("Stefan Popa <stefan.popa@analog.com>"); 1943 1764 MODULE_DESCRIPTION("Analog Devices AD7768-1 ADC driver"); 1944 1765 MODULE_LICENSE("GPL v2"); 1766 + MODULE_IMPORT_NS("IIO_DMAENGINE_BUFFER");

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