Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Bluetooth: btintel_pcie: Setup buffers for firmware traces
This patch allocates the host memory which is used by controller to dump
the firmware traces. The memory needs to be shared with controller via
context information.
Co-developed-by: Vijay Satija <vijay.satija@intel.com>
Signed-off-by: Vijay Satija <vijay.satija@intel.com>
Signed-off-by: Kiran K <kiran.k@intel.com>
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
authored by
Kiran K
and committed by
Luiz Augusto von Dentz
6ed83047
d5712c51
+121
+89
drivers/bluetooth/btintel_pcie.c
+89
drivers/bluetooth/btintel_pcie.c
···
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#define BTINTEL_PCIE_HCI_EVT_PKT 0x00000004
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#define BTINTEL_PCIE_HCI_ISO_PKT 0x00000005
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#define BTINTEL_PCIE_MAGIC_NUM 0xA5A5A5A5
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/* Alive interrupt context */
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enum {
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BTINTEL_PCIE_ROM,
···
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BTINTEL_PCIE_D0,
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BTINTEL_PCIE_D3
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};
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/* Structure for dbgc fragment buffer
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* @buf_addr_lsb: LSB of the buffer's physical address
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* @buf_addr_msb: MSB of the buffer's physical address
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* @buf_size: Total size of the buffer
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*/
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struct btintel_pcie_dbgc_ctxt_buf {
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u32 buf_addr_lsb;
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u32 buf_addr_msb;
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u32 buf_size;
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};
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/* Structure for dbgc fragment
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* @magic_num: 0XA5A5A5A5
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* @ver: For Driver-FW compatibility
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* @total_size: Total size of the payload debug info
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* @num_buf: Num of allocated debug bufs
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* @bufs: All buffer's addresses and sizes
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*/
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struct btintel_pcie_dbgc_ctxt {
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u32 magic_num;
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u32 ver;
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u32 total_size;
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u32 num_buf;
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struct btintel_pcie_dbgc_ctxt_buf bufs[BTINTEL_PCIE_DBGC_BUFFER_COUNT];
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};
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/* This function initializes the memory for DBGC buffers and formats the
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* DBGC fragment which consists header info and DBGC buffer's LSB, MSB and
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* size as the payload
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*/
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static int btintel_pcie_setup_dbgc(struct btintel_pcie_data *data)
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{
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struct btintel_pcie_dbgc_ctxt db_frag;
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struct data_buf *buf;
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int i;
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data->dbgc.count = BTINTEL_PCIE_DBGC_BUFFER_COUNT;
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data->dbgc.bufs = devm_kcalloc(&data->pdev->dev, data->dbgc.count,
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sizeof(*buf), GFP_KERNEL);
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if (!data->dbgc.bufs)
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return -ENOMEM;
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data->dbgc.buf_v_addr = dmam_alloc_coherent(&data->pdev->dev,
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data->dbgc.count *
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BTINTEL_PCIE_DBGC_BUFFER_SIZE,
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&data->dbgc.buf_p_addr,
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GFP_KERNEL | __GFP_NOWARN);
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if (!data->dbgc.buf_v_addr)
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return -ENOMEM;
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data->dbgc.frag_v_addr = dmam_alloc_coherent(&data->pdev->dev,
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sizeof(struct btintel_pcie_dbgc_ctxt),
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&data->dbgc.frag_p_addr,
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GFP_KERNEL | __GFP_NOWARN);
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if (!data->dbgc.frag_v_addr)
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return -ENOMEM;
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data->dbgc.frag_size = sizeof(struct btintel_pcie_dbgc_ctxt);
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db_frag.magic_num = BTINTEL_PCIE_MAGIC_NUM;
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db_frag.ver = BTINTEL_PCIE_DBGC_FRAG_VERSION;
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db_frag.total_size = BTINTEL_PCIE_DBGC_FRAG_PAYLOAD_SIZE;
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db_frag.num_buf = BTINTEL_PCIE_DBGC_FRAG_BUFFER_COUNT;
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for (i = 0; i < data->dbgc.count; i++) {
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buf = &data->dbgc.bufs[i];
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buf->data_p_addr = data->dbgc.buf_p_addr + i * BTINTEL_PCIE_DBGC_BUFFER_SIZE;
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buf->data = data->dbgc.buf_v_addr + i * BTINTEL_PCIE_DBGC_BUFFER_SIZE;
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db_frag.bufs[i].buf_addr_lsb = lower_32_bits(buf->data_p_addr);
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db_frag.bufs[i].buf_addr_msb = upper_32_bits(buf->data_p_addr);
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db_frag.bufs[i].buf_size = BTINTEL_PCIE_DBGC_BUFFER_SIZE;
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}
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memcpy(data->dbgc.frag_v_addr, &db_frag, sizeof(db_frag));
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return 0;
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}
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static inline void ipc_print_ia_ring(struct hci_dev *hdev, struct ia *ia,
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u16 queue_num)
···
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ci->addr_urbdq1 = data->rxq.urbd1s_p_addr;
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ci->num_urbdq1 = data->rxq.count;
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ci->urbdq_db_vec = BTINTEL_PCIE_RXQ_NUM;
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ci->dbg_output_mode = 0x01;
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ci->dbgc_addr = data->dbgc.frag_p_addr;
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ci->dbgc_size = data->dbgc.frag_size;
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ci->dbg_preset = 0x00;
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}
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static void btintel_pcie_free_txq_bufs(struct btintel_pcie_data *data,
···
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/* Setup Index Array */
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btintel_pcie_setup_ia(data, p_addr, v_addr, &data->ia);
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/* Setup data buffers for dbgc */
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err = btintel_pcie_setup_dbgc(data);
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if (err)
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goto exit_error_txq;
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/* Setup Context Information */
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p_addr += sizeof(u16) * BTINTEL_PCIE_NUM_QUEUES * 4;
+32
drivers/bluetooth/btintel_pcie.h
+32
drivers/bluetooth/btintel_pcie.h
···
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#define BTINTEL_PCIE_CSR_MSIX_IVAR_BASE (BTINTEL_PCIE_CSR_MSIX_BASE + 0x0880)
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#define BTINTEL_PCIE_CSR_MSIX_IVAR(cause) (BTINTEL_PCIE_CSR_MSIX_IVAR_BASE + (cause))
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/* The DRAM buffer count, each buffer size, and
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* fragment buffer size
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*/
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#define BTINTEL_PCIE_DBGC_BUFFER_COUNT 16
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#define BTINTEL_PCIE_DBGC_BUFFER_SIZE (256 * 1024) /* 256 KB */
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#define BTINTEL_PCIE_DBGC_FRAG_VERSION 1
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#define BTINTEL_PCIE_DBGC_FRAG_BUFFER_COUNT BTINTEL_PCIE_DBGC_BUFFER_COUNT
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/* Magic number(4), version(4), size of payload length(4) */
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#define BTINTEL_PCIE_DBGC_FRAG_HEADER_SIZE 12
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/* Num of alloc Dbg buff (4) + (LSB(4), MSB(4), Size(4)) for each buffer */
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#define BTINTEL_PCIE_DBGC_FRAG_PAYLOAD_SIZE 196
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/* Causes for the FH register interrupts */
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enum msix_fh_int_causes {
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BTINTEL_PCIE_MSIX_FH_INT_CAUSES_0 = BIT(0), /* cause 0 */
···
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struct data_buf *bufs;
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};
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/* Structure for DRAM Buffer
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* @count: Number of descriptors
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* @buf: Array of data_buf structure
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*/
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struct btintel_pcie_dbgc {
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u16 count;
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void *frag_v_addr;
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dma_addr_t frag_p_addr;
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u16 frag_size;
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dma_addr_t buf_p_addr;
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void *buf_v_addr;
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struct data_buf *bufs;
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};
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/* struct btintel_pcie_data
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* @pdev: pci device
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* @hdev: hdev device
···
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struct txq txq;
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struct rxq rxq;
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u32 alive_intr_ctxt;
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struct btintel_pcie_dbgc dbgc;
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};
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static inline u32 btintel_pcie_rd_reg32(struct btintel_pcie_data *data,