Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'regmap-v6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap
Pull regmap updates from Mark Brown:
"There's one big bit of work this time around, the addition of support
for a greater range of MBQ access sizes to SoundWire devices together
with support for deferred read/write.
The MBQ register maps generally have variable register sizes, the
variable regiseter size support allows them to be handled much more
naturally within regmap with less open coding in drivers.
The deferred read/write support avoids spurious errors when devices
make use of a bus feature allowing them to indicate they're busy.
These changes pull in a supporting SoundWire change, and there's an
ASoC change building off the new code.
The remainder of the changes are code cleanups"
* tag 'regmap-v6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap:
regmap: sdw-mbq: Add support for SDCA deferred controls
regmap: sdw-mbq: Add support for further MBQ register sizes
ASoC: SDCA: Update list of entity_0 controls
soundwire: SDCA: Add additional SDCA address macros
regmap: regmap_multi_reg_read(): make register list const
regmap: cache: rbtree: use krealloc_array() to replace krealloc()
regmap: cache: mapple: use kmalloc_array() to replace kmalloc()
regmap: place foo / 8 and foo % 8 closer to each other
regmap: Use BITS_TO_BYTES()
regmap: cache: Use BITS_TO_BYTES()
+319
-59
+3
-4
drivers/base/regmap/regcache-maple.c
+3
-4
drivers/base/regmap/regcache-maple.c
···
73
73
74
74
rcu_read_unlock();
75
75
76
-
entry = kmalloc((last - index + 1) * sizeof(unsigned long),
77
-
map->alloc_flags);
76
+
entry = kmalloc_array(last - index + 1, sizeof(*entry), map->alloc_flags);
78
77
if (!entry)
79
78
return -ENOMEM;
80
79
···
203
204
* overheads.
204
205
*/
205
206
if (max - min > 1 && regmap_can_raw_write(map)) {
206
-
buf = kmalloc(val_bytes * (max - min), map->alloc_flags);
207
+
buf = kmalloc_array(max - min, val_bytes, map->alloc_flags);
207
208
if (!buf) {
208
209
ret = -ENOMEM;
209
210
goto out;
···
319
320
unsigned long *entry;
320
321
int i, ret;
321
322
322
-
entry = kcalloc(last - first + 1, sizeof(unsigned long), map->alloc_flags);
323
+
entry = kmalloc_array(last - first + 1, sizeof(*entry), map->alloc_flags);
323
324
if (!entry)
324
325
return -ENOMEM;
325
326
+4
-6
drivers/base/regmap/regcache-rbtree.c
+4
-6
drivers/base/regmap/regcache-rbtree.c
···
275
275
pos = (reg - base_reg) / map->reg_stride;
276
276
offset = (rbnode->base_reg - base_reg) / map->reg_stride;
277
277
278
-
blk = krealloc(rbnode->block,
279
-
blklen * map->cache_word_size,
280
-
map->alloc_flags);
278
+
blk = krealloc_array(rbnode->block, blklen, map->cache_word_size, map->alloc_flags);
281
279
if (!blk)
282
280
return -ENOMEM;
283
281
284
282
rbnode->block = blk;
285
283
286
284
if (BITS_TO_LONGS(blklen) > BITS_TO_LONGS(rbnode->blklen)) {
287
-
present = krealloc(rbnode->cache_present,
288
-
BITS_TO_LONGS(blklen) * sizeof(*present),
289
-
map->alloc_flags);
285
+
present = krealloc_array(rbnode->cache_present,
286
+
BITS_TO_LONGS(blklen), sizeof(*present),
287
+
map->alloc_flags);
290
288
if (!present)
291
289
return -ENOMEM;
292
290
+1
-1
drivers/base/regmap/regcache.c
+1
-1
drivers/base/regmap/regcache.c
···
154
154
map->num_reg_defaults = config->num_reg_defaults;
155
155
map->num_reg_defaults_raw = config->num_reg_defaults_raw;
156
156
map->reg_defaults_raw = config->reg_defaults_raw;
157
-
map->cache_word_size = DIV_ROUND_UP(config->val_bits, 8);
157
+
map->cache_word_size = BITS_TO_BYTES(config->val_bits);
158
158
map->cache_size_raw = map->cache_word_size * config->num_reg_defaults_raw;
159
159
160
160
map->cache = NULL;
+197
-22
drivers/base/regmap/regmap-sdw-mbq.c
+197
-22
drivers/base/regmap/regmap-sdw-mbq.c
···
1
1
// SPDX-License-Identifier: GPL-2.0
2
2
// Copyright(c) 2020 Intel Corporation.
3
3
4
+
#include <linux/bits.h>
5
+
#include <linux/delay.h>
4
6
#include <linux/device.h>
5
7
#include <linux/errno.h>
8
+
#include <linux/iopoll.h>
6
9
#include <linux/module.h>
7
10
#include <linux/regmap.h>
8
11
#include <linux/soundwire/sdw.h>
9
12
#include <linux/soundwire/sdw_registers.h>
13
+
#include <sound/sdca_function.h>
10
14
#include "internal.h"
15
+
16
+
struct regmap_mbq_context {
17
+
struct device *dev;
18
+
19
+
struct regmap_sdw_mbq_cfg cfg;
20
+
21
+
int val_size;
22
+
bool (*readable_reg)(struct device *dev, unsigned int reg);
23
+
};
24
+
25
+
static int regmap_sdw_mbq_size(struct regmap_mbq_context *ctx, unsigned int reg)
26
+
{
27
+
int size = ctx->val_size;
28
+
29
+
if (ctx->cfg.mbq_size) {
30
+
size = ctx->cfg.mbq_size(ctx->dev, reg);
31
+
if (!size || size > ctx->val_size)
32
+
return -EINVAL;
33
+
}
34
+
35
+
return size;
36
+
}
37
+
38
+
static bool regmap_sdw_mbq_deferrable(struct regmap_mbq_context *ctx, unsigned int reg)
39
+
{
40
+
if (ctx->cfg.deferrable)
41
+
return ctx->cfg.deferrable(ctx->dev, reg);
42
+
43
+
return false;
44
+
}
45
+
46
+
static int regmap_sdw_mbq_poll_busy(struct sdw_slave *slave, unsigned int reg,
47
+
struct regmap_mbq_context *ctx)
48
+
{
49
+
struct device *dev = &slave->dev;
50
+
int val, ret = 0;
51
+
52
+
dev_dbg(dev, "Deferring transaction for 0x%x\n", reg);
53
+
54
+
reg = SDW_SDCA_CTL(SDW_SDCA_CTL_FUNC(reg), 0,
55
+
SDCA_CTL_ENTITY_0_FUNCTION_STATUS, 0);
56
+
57
+
if (ctx->readable_reg(dev, reg)) {
58
+
ret = read_poll_timeout(sdw_read_no_pm, val,
59
+
val < 0 || !(val & SDCA_CTL_ENTITY_0_FUNCTION_BUSY),
60
+
ctx->cfg.timeout_us, ctx->cfg.retry_us,
61
+
false, slave, reg);
62
+
if (val < 0)
63
+
return val;
64
+
if (ret)
65
+
dev_err(dev, "Function busy timed out 0x%x: %d\n", reg, val);
66
+
} else {
67
+
fsleep(ctx->cfg.timeout_us);
68
+
}
69
+
70
+
return ret;
71
+
}
72
+
73
+
static int regmap_sdw_mbq_write_impl(struct sdw_slave *slave,
74
+
unsigned int reg, unsigned int val,
75
+
int mbq_size, bool deferrable)
76
+
{
77
+
int shift = mbq_size * BITS_PER_BYTE;
78
+
int ret;
79
+
80
+
while (--mbq_size > 0) {
81
+
shift -= BITS_PER_BYTE;
82
+
83
+
ret = sdw_write_no_pm(slave, SDW_SDCA_MBQ_CTL(reg),
84
+
(val >> shift) & 0xff);
85
+
if (ret < 0)
86
+
return ret;
87
+
}
88
+
89
+
ret = sdw_write_no_pm(slave, reg, val & 0xff);
90
+
if (deferrable && ret == -ENODATA)
91
+
return -EAGAIN;
92
+
93
+
return ret;
94
+
}
11
95
12
96
static int regmap_sdw_mbq_write(void *context, unsigned int reg, unsigned int val)
13
97
{
14
-
struct device *dev = context;
98
+
struct regmap_mbq_context *ctx = context;
99
+
struct device *dev = ctx->dev;
15
100
struct sdw_slave *slave = dev_to_sdw_dev(dev);
101
+
bool deferrable = regmap_sdw_mbq_deferrable(ctx, reg);
102
+
int mbq_size = regmap_sdw_mbq_size(ctx, reg);
16
103
int ret;
17
104
18
-
ret = sdw_write_no_pm(slave, SDW_SDCA_MBQ_CTL(reg), (val >> 8) & 0xff);
19
-
if (ret < 0)
20
-
return ret;
105
+
if (mbq_size < 0)
106
+
return mbq_size;
21
107
22
-
return sdw_write_no_pm(slave, reg, val & 0xff);
108
+
/*
109
+
* Technically the spec does allow a device to set itself to busy for
110
+
* internal reasons, but since it doesn't provide any information on
111
+
* how to handle timeouts in that case, for now the code will only
112
+
* process a single wait/timeout on function busy and a single retry
113
+
* of the transaction.
114
+
*/
115
+
ret = regmap_sdw_mbq_write_impl(slave, reg, val, mbq_size, deferrable);
116
+
if (ret == -EAGAIN) {
117
+
ret = regmap_sdw_mbq_poll_busy(slave, reg, ctx);
118
+
if (ret)
119
+
return ret;
120
+
121
+
ret = regmap_sdw_mbq_write_impl(slave, reg, val, mbq_size, false);
122
+
}
123
+
124
+
return ret;
125
+
}
126
+
127
+
static int regmap_sdw_mbq_read_impl(struct sdw_slave *slave,
128
+
unsigned int reg, unsigned int *val,
129
+
int mbq_size, bool deferrable)
130
+
{
131
+
int shift = BITS_PER_BYTE;
132
+
int read;
133
+
134
+
read = sdw_read_no_pm(slave, reg);
135
+
if (read < 0) {
136
+
if (deferrable && read == -ENODATA)
137
+
return -EAGAIN;
138
+
139
+
return read;
140
+
}
141
+
142
+
*val = read;
143
+
144
+
while (--mbq_size > 0) {
145
+
read = sdw_read_no_pm(slave, SDW_SDCA_MBQ_CTL(reg));
146
+
if (read < 0)
147
+
return read;
148
+
149
+
*val |= read << shift;
150
+
shift += BITS_PER_BYTE;
151
+
}
152
+
153
+
return 0;
23
154
}
24
155
25
156
static int regmap_sdw_mbq_read(void *context, unsigned int reg, unsigned int *val)
26
157
{
27
-
struct device *dev = context;
158
+
struct regmap_mbq_context *ctx = context;
159
+
struct device *dev = ctx->dev;
28
160
struct sdw_slave *slave = dev_to_sdw_dev(dev);
29
-
int read0;
30
-
int read1;
161
+
bool deferrable = regmap_sdw_mbq_deferrable(ctx, reg);
162
+
int mbq_size = regmap_sdw_mbq_size(ctx, reg);
163
+
int ret;
31
164
32
-
read0 = sdw_read_no_pm(slave, reg);
33
-
if (read0 < 0)
34
-
return read0;
165
+
if (mbq_size < 0)
166
+
return mbq_size;
35
167
36
-
read1 = sdw_read_no_pm(slave, SDW_SDCA_MBQ_CTL(reg));
37
-
if (read1 < 0)
38
-
return read1;
168
+
/*
169
+
* Technically the spec does allow a device to set itself to busy for
170
+
* internal reasons, but since it doesn't provide any information on
171
+
* how to handle timeouts in that case, for now the code will only
172
+
* process a single wait/timeout on function busy and a single retry
173
+
* of the transaction.
174
+
*/
175
+
ret = regmap_sdw_mbq_read_impl(slave, reg, val, mbq_size, deferrable);
176
+
if (ret == -EAGAIN) {
177
+
ret = regmap_sdw_mbq_poll_busy(slave, reg, ctx);
178
+
if (ret)
179
+
return ret;
39
180
40
-
*val = (read1 << 8) | read0;
181
+
ret = regmap_sdw_mbq_read_impl(slave, reg, val, mbq_size, false);
182
+
}
41
183
42
-
return 0;
184
+
return ret;
43
185
}
44
186
45
187
static const struct regmap_bus regmap_sdw_mbq = {
···
193
51
194
52
static int regmap_sdw_mbq_config_check(const struct regmap_config *config)
195
53
{
196
-
/* MBQ-based controls are only 16-bits for now */
197
-
if (config->val_bits != 16)
54
+
if (config->val_bits > (sizeof(unsigned int) * BITS_PER_BYTE))
198
55
return -ENOTSUPP;
199
56
200
57
/* Registers are 32 bits wide */
···
206
65
return 0;
207
66
}
208
67
68
+
static struct regmap_mbq_context *
69
+
regmap_sdw_mbq_gen_context(struct device *dev,
70
+
const struct regmap_config *config,
71
+
const struct regmap_sdw_mbq_cfg *mbq_config)
72
+
{
73
+
struct regmap_mbq_context *ctx;
74
+
75
+
ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
76
+
if (!ctx)
77
+
return ERR_PTR(-ENOMEM);
78
+
79
+
ctx->dev = dev;
80
+
81
+
if (mbq_config)
82
+
ctx->cfg = *mbq_config;
83
+
84
+
ctx->val_size = config->val_bits / BITS_PER_BYTE;
85
+
ctx->readable_reg = config->readable_reg;
86
+
87
+
return ctx;
88
+
}
89
+
209
90
struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw,
210
91
const struct regmap_config *config,
92
+
const struct regmap_sdw_mbq_cfg *mbq_config,
211
93
struct lock_class_key *lock_key,
212
94
const char *lock_name)
213
95
{
96
+
struct regmap_mbq_context *ctx;
214
97
int ret;
215
98
216
99
ret = regmap_sdw_mbq_config_check(config);
217
100
if (ret)
218
101
return ERR_PTR(ret);
219
102
220
-
return __regmap_init(&sdw->dev, ®map_sdw_mbq,
221
-
&sdw->dev, config, lock_key, lock_name);
103
+
ctx = regmap_sdw_mbq_gen_context(&sdw->dev, config, mbq_config);
104
+
if (IS_ERR(ctx))
105
+
return ERR_CAST(ctx);
106
+
107
+
return __regmap_init(&sdw->dev, ®map_sdw_mbq, ctx,
108
+
config, lock_key, lock_name);
222
109
}
223
110
EXPORT_SYMBOL_GPL(__regmap_init_sdw_mbq);
224
111
225
112
struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw,
226
113
const struct regmap_config *config,
114
+
const struct regmap_sdw_mbq_cfg *mbq_config,
227
115
struct lock_class_key *lock_key,
228
116
const char *lock_name)
229
117
{
118
+
struct regmap_mbq_context *ctx;
230
119
int ret;
231
120
232
121
ret = regmap_sdw_mbq_config_check(config);
233
122
if (ret)
234
123
return ERR_PTR(ret);
235
124
236
-
return __devm_regmap_init(&sdw->dev, ®map_sdw_mbq,
237
-
&sdw->dev, config, lock_key, lock_name);
125
+
ctx = regmap_sdw_mbq_gen_context(&sdw->dev, config, mbq_config);
126
+
if (IS_ERR(ctx))
127
+
return ERR_CAST(ctx);
128
+
129
+
return __devm_regmap_init(&sdw->dev, ®map_sdw_mbq, ctx,
130
+
config, lock_key, lock_name);
238
131
}
239
132
EXPORT_SYMBOL_GPL(__devm_regmap_init_sdw_mbq);
240
133
+6
-7
drivers/base/regmap/regmap.c
+6
-7
drivers/base/regmap/regmap.c
···
769
769
map->alloc_flags = GFP_KERNEL;
770
770
771
771
map->reg_base = config->reg_base;
772
+
map->reg_shift = config->pad_bits % 8;
772
773
773
-
map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
774
774
map->format.pad_bytes = config->pad_bits / 8;
775
775
map->format.reg_shift = config->reg_shift;
776
-
map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
777
-
map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
778
-
config->val_bits + config->pad_bits, 8);
779
-
map->reg_shift = config->pad_bits % 8;
776
+
map->format.reg_bytes = BITS_TO_BYTES(config->reg_bits);
777
+
map->format.val_bytes = BITS_TO_BYTES(config->val_bits);
778
+
map->format.buf_size = BITS_TO_BYTES(config->reg_bits + config->val_bits + config->pad_bits);
780
779
if (config->reg_stride)
781
780
map->reg_stride = config->reg_stride;
782
781
else
···
3115
3116
EXPORT_SYMBOL_GPL(regmap_fields_read);
3116
3117
3117
3118
static int _regmap_bulk_read(struct regmap *map, unsigned int reg,
3118
-
unsigned int *regs, void *val, size_t val_count)
3119
+
const unsigned int *regs, void *val, size_t val_count)
3119
3120
{
3120
3121
u32 *u32 = val;
3121
3122
u16 *u16 = val;
···
3209
3210
* A value of zero will be returned on success, a negative errno will
3210
3211
* be returned in error cases.
3211
3212
*/
3212
-
int regmap_multi_reg_read(struct regmap *map, unsigned int *regs, void *val,
3213
+
int regmap_multi_reg_read(struct regmap *map, const unsigned int *regs, void *val,
3213
3214
size_t val_count)
3214
3215
{
3215
3216
if (val_count == 0)
+61
-3
include/linux/regmap.h
+61
-3
include/linux/regmap.h
···
506
506
unsigned int window_len;
507
507
};
508
508
509
+
/**
510
+
* struct regmap_sdw_mbq_cfg - Configuration for Multi-Byte Quantities
511
+
*
512
+
* @mbq_size: Callback returning the actual size of the given register.
513
+
* @deferrable: Callback returning true if the hardware can defer
514
+
* transactions to the given register. Deferral should
515
+
* only be used by SDCA parts and typically which controls
516
+
* are deferrable will be specified in either as a hard
517
+
* coded list or from the DisCo tables in the platform
518
+
* firmware.
519
+
*
520
+
* @timeout_us: The time in microseconds after which waiting for a deferred
521
+
* transaction should time out.
522
+
* @retry_us: The time in microseconds between polls of the function busy
523
+
* status whilst waiting for an opportunity to retry a deferred
524
+
* transaction.
525
+
*
526
+
* Provides additional configuration required for SoundWire MBQ register maps.
527
+
*/
528
+
struct regmap_sdw_mbq_cfg {
529
+
int (*mbq_size)(struct device *dev, unsigned int reg);
530
+
bool (*deferrable)(struct device *dev, unsigned int reg);
531
+
unsigned long timeout_us;
532
+
unsigned long retry_us;
533
+
};
534
+
509
535
struct regmap_async;
510
536
511
537
typedef int (*regmap_hw_write)(void *context, const void *data,
···
678
652
const char *lock_name);
679
653
struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw,
680
654
const struct regmap_config *config,
655
+
const struct regmap_sdw_mbq_cfg *mbq_config,
681
656
struct lock_class_key *lock_key,
682
657
const char *lock_name);
683
658
struct regmap *__regmap_init_spi_avmm(struct spi_device *spi,
···
740
713
const char *lock_name);
741
714
struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw,
742
715
const struct regmap_config *config,
716
+
const struct regmap_sdw_mbq_cfg *mbq_config,
743
717
struct lock_class_key *lock_key,
744
718
const char *lock_name);
745
719
struct regmap *__devm_regmap_init_slimbus(struct slim_device *slimbus,
···
970
942
*/
971
943
#define regmap_init_sdw_mbq(sdw, config) \
972
944
__regmap_lockdep_wrapper(__regmap_init_sdw_mbq, #config, \
973
-
sdw, config)
945
+
sdw, config, NULL)
946
+
947
+
/**
948
+
* regmap_init_sdw_mbq_cfg() - Initialise MBQ SDW register map with config
949
+
*
950
+
* @sdw: Device that will be interacted with
951
+
* @config: Configuration for register map
952
+
* @mbq_config: Properties for the MBQ registers
953
+
*
954
+
* The return value will be an ERR_PTR() on error or a valid pointer
955
+
* to a struct regmap. The regmap will be automatically freed by the
956
+
* device management code.
957
+
*/
958
+
#define regmap_init_sdw_mbq_cfg(sdw, config, mbq_config) \
959
+
__regmap_lockdep_wrapper(__regmap_init_sdw_mbq, #config, \
960
+
sdw, config, mbq_config)
974
961
975
962
/**
976
963
* regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
···
1198
1155
*/
1199
1156
#define devm_regmap_init_sdw_mbq(sdw, config) \
1200
1157
__regmap_lockdep_wrapper(__devm_regmap_init_sdw_mbq, #config, \
1201
-
sdw, config)
1158
+
sdw, config, NULL)
1159
+
1160
+
/**
1161
+
* devm_regmap_init_sdw_mbq_cfg() - Initialise managed MBQ SDW register map with config
1162
+
*
1163
+
* @sdw: Device that will be interacted with
1164
+
* @config: Configuration for register map
1165
+
* @mbq_config: Properties for the MBQ registers
1166
+
*
1167
+
* The return value will be an ERR_PTR() on error or a valid pointer
1168
+
* to a struct regmap. The regmap will be automatically freed by the
1169
+
* device management code.
1170
+
*/
1171
+
#define devm_regmap_init_sdw_mbq_cfg(sdw, config, mbq_config) \
1172
+
__regmap_lockdep_wrapper(__devm_regmap_init_sdw_mbq, \
1173
+
#config, sdw, config, mbq_config)
1202
1174
1203
1175
/**
1204
1176
* devm_regmap_init_slimbus() - Initialise managed register map
···
1302
1244
void *val, size_t val_len);
1303
1245
int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
1304
1246
size_t val_count);
1305
-
int regmap_multi_reg_read(struct regmap *map, unsigned int *reg, void *val,
1247
+
int regmap_multi_reg_read(struct regmap *map, const unsigned int *reg, void *val,
1306
1248
size_t val_count);
1307
1249
int regmap_update_bits_base(struct regmap *map, unsigned int reg,
1308
1250
unsigned int mask, unsigned int val,
+22
-8
include/linux/soundwire/sdw_registers.h
+22
-8
include/linux/soundwire/sdw_registers.h
···
4
4
#ifndef __SDW_REGISTERS_H
5
5
#define __SDW_REGISTERS_H
6
6
7
+
#include <linux/bitfield.h>
8
+
#include <linux/bits.h>
9
+
7
10
/*
8
11
* SDW registers as defined by MIPI 1.2 Spec
9
12
*/
···
332
329
* 2:0 Control Number[2:0]
333
330
*/
334
331
335
-
#define SDW_SDCA_CTL(fun, ent, ctl, ch) (BIT(30) | \
336
-
(((fun) & 0x7) << 22) | \
337
-
(((ent) & 0x40) << 15) | \
338
-
(((ent) & 0x3f) << 7) | \
339
-
(((ctl) & 0x30) << 15) | \
340
-
(((ctl) & 0x0f) << 3) | \
341
-
(((ch) & 0x38) << 12) | \
342
-
((ch) & 0x07))
332
+
#define SDW_SDCA_CTL(fun, ent, ctl, ch) (BIT(30) | \
333
+
(((fun) & GENMASK(2, 0)) << 22) | \
334
+
(((ent) & BIT(6)) << 15) | \
335
+
(((ent) & GENMASK(5, 0)) << 7) | \
336
+
(((ctl) & GENMASK(5, 4)) << 15) | \
337
+
(((ctl) & GENMASK(3, 0)) << 3) | \
338
+
(((ch) & GENMASK(5, 3)) << 12) | \
339
+
((ch) & GENMASK(2, 0)))
340
+
341
+
#define SDW_SDCA_CTL_FUNC(reg) FIELD_GET(GENMASK(24, 22), (reg))
342
+
#define SDW_SDCA_CTL_ENT(reg) ((FIELD_GET(BIT(21), (reg)) << 6) | \
343
+
FIELD_GET(GENMASK(12, 7), (reg)))
344
+
#define SDW_SDCA_CTL_CSEL(reg) ((FIELD_GET(GENMASK(20, 19), (reg)) << 4) | \
345
+
FIELD_GET(GENMASK(6, 3), (reg)))
346
+
#define SDW_SDCA_CTL_CNUM(reg) ((FIELD_GET(GENMASK(17, 15), (reg)) << 3) | \
347
+
FIELD_GET(GENMASK(2, 0), (reg)))
343
348
344
349
#define SDW_SDCA_MBQ_CTL(reg) ((reg) | BIT(13))
345
350
#define SDW_SDCA_NEXT_CTL(reg) ((reg) | BIT(14))
351
+
352
+
/* Check the reserved and fixed bits in address */
353
+
#define SDW_SDCA_VALID_CTL(reg) (((reg) & (GENMASK(31, 25) | BIT(18) | BIT(13))) == BIT(30))
346
354
347
355
#endif /* __SDW_REGISTERS_H */
+25
-8
include/sound/sdca_function.h
+25
-8
include/sound/sdca_function.h
···
42
42
#define SDCA_FUNCTION_TYPE_HID_NAME "HID"
43
43
44
44
enum sdca_entity0_controls {
45
-
SDCA_CONTROL_ENTITY_0_COMMIT_GROUP_MASK = 0x01,
46
-
SDCA_CONTROL_ENTITY_0_INTSTAT_CLEAR = 0x02,
47
-
SDCA_CONTROL_ENTITY_0_INT_ENABLE = 0x03,
48
-
SDCA_CONTROL_ENTITY_0_FUNCTION_SDCA_VERSION = 0x04,
49
-
SDCA_CONTROL_ENTITY_0_FUNCTION_TOPOLOGY = 0x05,
50
-
SDCA_CONTROL_ENTITY_0_FUNCTION_MANUFACTURER_ID = 0x06,
51
-
SDCA_CONTROL_ENTITY_0_FUNCTION_ID = 0x07,
52
-
SDCA_CONTROL_ENTITY_0_FUNCTION_VERSION = 0x08
45
+
SDCA_CTL_ENTITY_0_COMMIT_GROUP_MASK = 0x01,
46
+
SDCA_CTL_ENTITY_0_FUNCTION_SDCA_VERSION = 0x04,
47
+
SDCA_CTL_ENTITY_0_FUNCTION_TYPE = 0x05,
48
+
SDCA_CTL_ENTITY_0_FUNCTION_MANUFACTURER_ID = 0x06,
49
+
SDCA_CTL_ENTITY_0_FUNCTION_ID = 0x07,
50
+
SDCA_CTL_ENTITY_0_FUNCTION_VERSION = 0x08,
51
+
SDCA_CTL_ENTITY_0_FUNCTION_EXTENSION_ID = 0x09,
52
+
SDCA_CTL_ENTITY_0_FUNCTION_EXTENSION_VERSION = 0x0A,
53
+
SDCA_CTL_ENTITY_0_FUNCTION_STATUS = 0x10,
54
+
SDCA_CTL_ENTITY_0_FUNCTION_ACTION = 0x11,
55
+
SDCA_CTL_ENTITY_0_MATCHING_GUID = 0x12,
56
+
SDCA_CTL_ENTITY_0_DEVICE_MANUFACTURER_ID = 0x2C,
57
+
SDCA_CTL_ENTITY_0_DEVICE_PART_ID = 0x2D,
58
+
SDCA_CTL_ENTITY_0_DEVICE_VERSION = 0x2E,
59
+
SDCA_CTL_ENTITY_0_DEVICE_SDCA_VERSION = 0x2F,
60
+
61
+
/* Function Status Bits */
62
+
SDCA_CTL_ENTITY_0_DEVICE_NEWLY_ATTACHED = BIT(0),
63
+
SDCA_CTL_ENTITY_0_INTS_DISABLED_ABNORMALLY = BIT(1),
64
+
SDCA_CTL_ENTITY_0_STREAMING_STOPPED_ABNORMALLY = BIT(2),
65
+
SDCA_CTL_ENTITY_0_FUNCTION_FAULT = BIT(3),
66
+
SDCA_CTL_ENTITY_0_UMP_SEQUENCE_FAULT = BIT(4),
67
+
SDCA_CTL_ENTITY_0_FUNCTION_NEEDS_INITIALIZATION = BIT(5),
68
+
SDCA_CTL_ENTITY_0_FUNCTION_HAS_BEEN_RESET = BIT(6),
69
+
SDCA_CTL_ENTITY_0_FUNCTION_BUSY = BIT(7),
53
70
};
54
71
55
72
#endif