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Merge tag 'phy-fixes-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy

Pull phy fixes from Vinod Koul:
"A few core API fixes for devm calls and bunch of driver fixes as
usual:

- devm_phy_xxx fixes for few APIs in the phy core

- qmp driver register name config

- init sequence fix for usb driver

- rockchip driver setting drvdata correctly in samsung hdptx and
reset fix for naneng combophy

- regulator dependency fix for mediatek hdmi driver

- overflow assertion fix for stm32 driver"

* tag 'phy-fixes-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy:
phy: mediatek: phy-mtk-hdmi: add regulator dependency
phy: freescale: fsl-samsung-hdmi: Fix 64-by-32 division cocci warnings
phy: core: Fix an OF node refcount leakage in of_phy_provider_lookup()
phy: core: Fix an OF node refcount leakage in _of_phy_get()
phy: core: Fix that API devm_phy_destroy() fails to destroy the phy
phy: core: Fix that API devm_of_phy_provider_unregister() fails to unregister the phy provider
phy: core: Fix that API devm_phy_put() fails to release the phy
phy: rockchip: samsung-hdptx: Set drvdata before enabling runtime PM
phy: stm32: work around constant-value overflow assertion
phy: qcom-qmp: Fix register name in RX Lane config of SC8280XP
phy: rockchip: naneng-combphy: fix phy reset
phy: usb: Toggle the PHY power during init

+40 -19
+6
drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c
··· 325 325 void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; 326 326 327 327 USB_CTRL_UNSET(ctrl, USB_PM, XHC_S2_CLK_SWITCH_EN); 328 + 329 + /* 330 + * The PHY might be in a bad state if it is already powered 331 + * up. Toggle the power just in case. 332 + */ 333 + USB_CTRL_SET(ctrl, USB_PM, USB_PWRDN); 328 334 USB_CTRL_UNSET(ctrl, USB_PM, USB_PWRDN); 329 335 330 336 /* 1 millisecond - for USB clocks to settle down */
+1 -2
drivers/phy/freescale/phy-fsl-samsung-hdmi.c
··· 424 424 * Fvco = (M * f_ref) / P, 425 425 * where f_ref is 24MHz. 426 426 */ 427 - tmp = (u64)_m * 24 * MHZ; 428 - do_div(tmp, _p); 427 + tmp = div64_ul((u64)_m * 24 * MHZ, _p); 429 428 if (tmp < 750 * MHZ || 430 429 tmp > 3000 * MHZ) 431 430 continue;
+1
drivers/phy/mediatek/Kconfig
··· 65 65 depends on ARCH_MEDIATEK || COMPILE_TEST 66 66 depends on COMMON_CLK 67 67 depends on OF 68 + depends on REGULATOR 68 69 select GENERIC_PHY 69 70 help 70 71 Support HDMI PHY for Mediatek SoCs.
+13 -8
drivers/phy/phy-core.c
··· 145 145 return phy_provider; 146 146 147 147 for_each_child_of_node(phy_provider->children, child) 148 - if (child == node) 148 + if (child == node) { 149 + of_node_put(child); 149 150 return phy_provider; 151 + } 150 152 } 151 153 152 154 return ERR_PTR(-EPROBE_DEFER); ··· 631 629 return ERR_PTR(-ENODEV); 632 630 633 631 /* This phy type handled by the usb-phy subsystem for now */ 634 - if (of_device_is_compatible(args.np, "usb-nop-xceiv")) 635 - return ERR_PTR(-ENODEV); 632 + if (of_device_is_compatible(args.np, "usb-nop-xceiv")) { 633 + phy = ERR_PTR(-ENODEV); 634 + goto out_put_node; 635 + } 636 636 637 637 mutex_lock(&phy_provider_mutex); 638 638 phy_provider = of_phy_provider_lookup(args.np); ··· 656 652 657 653 out_unlock: 658 654 mutex_unlock(&phy_provider_mutex); 655 + out_put_node: 659 656 of_node_put(args.np); 660 657 661 658 return phy; ··· 742 737 if (!phy) 743 738 return; 744 739 745 - r = devres_destroy(dev, devm_phy_release, devm_phy_match, phy); 740 + r = devres_release(dev, devm_phy_release, devm_phy_match, phy); 746 741 dev_WARN_ONCE(dev, r, "couldn't find PHY resource\n"); 747 742 } 748 743 EXPORT_SYMBOL_GPL(devm_phy_put); ··· 1126 1121 { 1127 1122 int r; 1128 1123 1129 - r = devres_destroy(dev, devm_phy_consume, devm_phy_match, phy); 1124 + r = devres_release(dev, devm_phy_consume, devm_phy_match, phy); 1130 1125 dev_WARN_ONCE(dev, r, "couldn't find PHY resource\n"); 1131 1126 } 1132 1127 EXPORT_SYMBOL_GPL(devm_phy_destroy); ··· 1264 1259 * of_phy_provider_unregister to unregister the phy provider. 1265 1260 */ 1266 1261 void devm_of_phy_provider_unregister(struct device *dev, 1267 - struct phy_provider *phy_provider) 1262 + struct phy_provider *phy_provider) 1268 1263 { 1269 1264 int r; 1270 1265 1271 - r = devres_destroy(dev, devm_phy_provider_release, devm_phy_match, 1272 - phy_provider); 1266 + r = devres_release(dev, devm_phy_provider_release, devm_phy_match, 1267 + phy_provider); 1273 1268 dev_WARN_ONCE(dev, r, "couldn't find PHY provider device resource\n"); 1274 1269 } 1275 1270 EXPORT_SYMBOL_GPL(devm_of_phy_provider_unregister);
+1 -1
drivers/phy/qualcomm/phy-qcom-qmp-usb.c
··· 1052 1052 QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_FASTLOCK_FO_GAIN, 0x2f), 1053 1053 QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_FASTLOCK_COUNT_LOW, 0xff), 1054 1054 QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_FASTLOCK_COUNT_HIGH, 0x0f), 1055 - QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_SO_GAIN, 0x0a), 1055 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_FO_GAIN, 0x0a), 1056 1056 QMP_PHY_INIT_CFG(QSERDES_V5_RX_VGA_CAL_CNTRL1, 0x54), 1057 1057 QMP_PHY_INIT_CFG(QSERDES_V5_RX_VGA_CAL_CNTRL2, 0x0f), 1058 1058 QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_EQU_ADAPTOR_CNTRL2, 0x0f),
+1 -1
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
··· 309 309 310 310 priv->ext_refclk = device_property_present(dev, "rockchip,ext-refclk"); 311 311 312 - priv->phy_rst = devm_reset_control_array_get_exclusive(dev); 312 + priv->phy_rst = devm_reset_control_get(dev, "phy"); 313 313 if (IS_ERR(priv->phy_rst)) 314 314 return dev_err_probe(dev, PTR_ERR(priv->phy_rst), "failed to get phy reset\n"); 315 315
+2 -1
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
··· 1101 1101 return dev_err_probe(dev, PTR_ERR(hdptx->grf), 1102 1102 "Could not get GRF syscon\n"); 1103 1103 1104 + platform_set_drvdata(pdev, hdptx); 1105 + 1104 1106 ret = devm_pm_runtime_enable(dev); 1105 1107 if (ret) 1106 1108 return dev_err_probe(dev, ret, "Failed to enable runtime PM\n"); ··· 1112 1110 return dev_err_probe(dev, PTR_ERR(hdptx->phy), 1113 1111 "Failed to create HDMI PHY\n"); 1114 1112 1115 - platform_set_drvdata(pdev, hdptx); 1116 1113 phy_set_drvdata(hdptx->phy, hdptx); 1117 1114 phy_set_bus_width(hdptx->phy, 8); 1118 1115
+15 -6
drivers/phy/st/phy-stm32-combophy.c
··· 122 122 u32 max_vswing = imp_lookup[imp_size - 1].vswing[vswing_size - 1]; 123 123 u32 min_vswing = imp_lookup[0].vswing[0]; 124 124 u32 val; 125 + u32 regval; 125 126 126 127 if (!of_property_read_u32(combophy->dev->of_node, "st,output-micro-ohms", &val)) { 127 128 if (val < min_imp || val > max_imp) { ··· 130 129 return -EINVAL; 131 130 } 132 131 133 - for (imp_of = 0; imp_of < ARRAY_SIZE(imp_lookup); imp_of++) 134 - if (imp_lookup[imp_of].microohm <= val) 132 + regval = 0; 133 + for (imp_of = 0; imp_of < ARRAY_SIZE(imp_lookup); imp_of++) { 134 + if (imp_lookup[imp_of].microohm <= val) { 135 + regval = FIELD_PREP(STM32MP25_PCIEPRG_IMPCTRL_OHM, imp_of); 135 136 break; 137 + } 138 + } 136 139 137 140 dev_dbg(combophy->dev, "Set %u micro-ohms output impedance\n", 138 141 imp_lookup[imp_of].microohm); 139 142 140 143 regmap_update_bits(combophy->regmap, SYSCFG_PCIEPRGCR, 141 144 STM32MP25_PCIEPRG_IMPCTRL_OHM, 142 - FIELD_PREP(STM32MP25_PCIEPRG_IMPCTRL_OHM, imp_of)); 145 + regval); 143 146 } else { 144 147 regmap_read(combophy->regmap, SYSCFG_PCIEPRGCR, &val); 145 148 imp_of = FIELD_GET(STM32MP25_PCIEPRG_IMPCTRL_OHM, val); ··· 155 150 return -EINVAL; 156 151 } 157 152 158 - for (vswing_of = 0; vswing_of < ARRAY_SIZE(imp_lookup[imp_of].vswing); vswing_of++) 159 - if (imp_lookup[imp_of].vswing[vswing_of] >= val) 153 + regval = 0; 154 + for (vswing_of = 0; vswing_of < ARRAY_SIZE(imp_lookup[imp_of].vswing); vswing_of++) { 155 + if (imp_lookup[imp_of].vswing[vswing_of] >= val) { 156 + regval = FIELD_PREP(STM32MP25_PCIEPRG_IMPCTRL_VSWING, vswing_of); 160 157 break; 158 + } 159 + } 161 160 162 161 dev_dbg(combophy->dev, "Set %u microvolt swing\n", 163 162 imp_lookup[imp_of].vswing[vswing_of]); 164 163 165 164 regmap_update_bits(combophy->regmap, SYSCFG_PCIEPRGCR, 166 165 STM32MP25_PCIEPRG_IMPCTRL_VSWING, 167 - FIELD_PREP(STM32MP25_PCIEPRG_IMPCTRL_VSWING, vswing_of)); 166 + regval); 168 167 } 169 168 170 169 return 0;