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Merge tag 'soc-fixes-5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
"There are a number of SoC bugfixes that came in since the merge
window, and more of them are already pending.

This batch includes:

- A boot time regression fix for davinci that triggered on
multi_v5_defconfig when booting any platform

- Defconfig updates to address removed features, changed symbol names
or dependencies, for gemini, ux500, and pxa

- Email address changes for Krzysztof Kozlowski

- Build warning fixes for ep93xx and iop32x

- Devicetree warning fixes across many platforms

- Minor bugfixes for the reset controller, memory controller and SCMI
firmware subsystems plus the versatile-express board"

* tag 'soc-fixes-5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (34 commits)
ARM: config: Update Gemini defconfig
arm64: dts: qcom/sdm845-shift-axolotl: Fix boolean properties with values
ARM: dts: align SPI NOR node name with dtschema
ARM: dts: Fix more boolean properties with values
arm/arm64: dts: qcom: Fix boolean properties with values
arm64: dts: imx: Fix imx8*-var-som touchscreen property sizes
arm: dts: imx: Fix boolean properties with values
arm64: dts: tegra: Fix boolean properties with values
arm: dts: at91: Fix boolean properties with values
arm: configs: imote2: Drop defconfig as board support dropped.
ep93xx: clock: Don't use plain integer as NULL pointer
ep93xx: clock: Fix UAF in ep93xx_clk_register_gate()
ARM: vexpress/spc: Fix all the kernel-doc build warnings
ARM: vexpress/spc: Fix kernel-doc build warning for ve_spc_cpu_in_wfi
ARM: config: u8500: Re-enable AB8500 battery charging
ARM: config: u8500: Add some common hardware
memory: fsl_ifc: populate child nodes of buses and mfd devices
ARM: config: Refresh U8500 defconfig
firmware: arm_scmi: Fix sparse warnings in OPTEE transport driver
firmware: arm_scmi: Replace zero-length array with flexible-array member
...

+299 -605
+1 -1
Documentation/devicetree/bindings/clock/samsung,exynos-audss-clock.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 13 - Tomasz Figa <tomasz.figa@gmail.com> 14 14
+1 -1
Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 13 - Tomasz Figa <tomasz.figa@gmail.com> 14 14
+1 -1
Documentation/devicetree/bindings/clock/samsung,exynos-ext-clock.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 13 - Tomasz Figa <tomasz.figa@gmail.com> 14 14
+1 -1
Documentation/devicetree/bindings/clock/samsung,exynos4412-isp-clock.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 13 - Tomasz Figa <tomasz.figa@gmail.com> 14 14
+1 -1
Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 13 - Tomasz Figa <tomasz.figa@gmail.com> 14 14
+1 -1
Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 13 - Tomasz Figa <tomasz.figa@gmail.com> 14 14
+1 -1
Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 13 - Tomasz Figa <tomasz.figa@gmail.com> 14 14
+1 -1
Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 13 - Tomasz Figa <tomasz.figa@gmail.com> 14 14
+1 -1
Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml
··· 9 9 maintainers: 10 10 - Dávid Virág <virag.david003@gmail.com> 11 11 - Chanwoo Choi <cw00.choi@samsung.com> 12 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 12 + - Krzysztof Kozlowski <krzk@kernel.org> 13 13 - Sylwester Nawrocki <s.nawrocki@samsung.com> 14 14 - Tomasz Figa <tomasz.figa@gmail.com> 15 15
+1 -1
Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
··· 9 9 maintainers: 10 10 - Sam Protsenko <semen.protsenko@linaro.org> 11 11 - Chanwoo Choi <cw00.choi@samsung.com> 12 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 12 + - Krzysztof Kozlowski <krzk@kernel.org> 13 13 - Sylwester Nawrocki <s.nawrocki@samsung.com> 14 14 - Tomasz Figa <tomasz.figa@gmail.com> 15 15
+1 -1
Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml
··· 7 7 title: Samsung S2M and S5M family clock generator block 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for S2M and S5M family of Power
+1 -1
Documentation/devicetree/bindings/clock/samsung,s5pv210-audss-clock.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 13 - Tomasz Figa <tomasz.figa@gmail.com> 14 14
+1 -1
Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 13 - Tomasz Figa <tomasz.figa@gmail.com> 14 14
+1 -1
Documentation/devicetree/bindings/devfreq/event/samsung,exynos-nocp.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 13 13 description: | 14 14 The Samsung Exynos542x SoC has a NoC (Network on Chip) Probe for NoC bus.
+1 -1
Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 13 13 description: | 14 14 The Samsung Exynos SoC has PPMU (Platform Performance Monitoring Unit) for
+1 -1
Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi-ddc.yaml
··· 11 11 - Joonyoung Shim <jy0922.shim@samsung.com> 12 12 - Seung-Woo Kim <sw0312.kim@samsung.com> 13 13 - Kyungmin Park <kyungmin.park@samsung.com> 14 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 14 + - Krzysztof Kozlowski <krzk@kernel.org> 15 15 16 16 properties: 17 17 compatible:
+1 -1
Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi.yaml
··· 11 11 - Joonyoung Shim <jy0922.shim@samsung.com> 12 12 - Seung-Woo Kim <sw0312.kim@samsung.com> 13 13 - Kyungmin Park <kyungmin.park@samsung.com> 14 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 14 + - Krzysztof Kozlowski <krzk@kernel.org> 15 15 16 16 properties: 17 17 compatible:
+1 -1
Documentation/devicetree/bindings/display/samsung/samsung,exynos-mixer.yaml
··· 11 11 - Joonyoung Shim <jy0922.shim@samsung.com> 12 12 - Seung-Woo Kim <sw0312.kim@samsung.com> 13 13 - Kyungmin Park <kyungmin.park@samsung.com> 14 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 14 + - Krzysztof Kozlowski <krzk@kernel.org> 15 15 16 16 description: 17 17 Samsung Exynos SoC Mixer is responsible for mixing and blending multiple data
+1 -1
Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-decon.yaml
··· 11 11 - Joonyoung Shim <jy0922.shim@samsung.com> 12 12 - Seung-Woo Kim <sw0312.kim@samsung.com> 13 13 - Kyungmin Park <kyungmin.park@samsung.com> 14 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 14 + - Krzysztof Kozlowski <krzk@kernel.org> 15 15 16 16 description: | 17 17 DECON (Display and Enhancement Controller) is the Display Controller for the
+1 -1
Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-mic.yaml
··· 11 11 - Joonyoung Shim <jy0922.shim@samsung.com> 12 12 - Seung-Woo Kim <sw0312.kim@samsung.com> 13 13 - Kyungmin Park <kyungmin.park@samsung.com> 14 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 14 + - Krzysztof Kozlowski <krzk@kernel.org> 15 15 16 16 description: | 17 17 MIC (Mobile Image Compressor) resides between DECON and MIPI DSI. MIPI DSI is
+1 -1
Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml
··· 11 11 - Joonyoung Shim <jy0922.shim@samsung.com> 12 12 - Seung-Woo Kim <sw0312.kim@samsung.com> 13 13 - Kyungmin Park <kyungmin.park@samsung.com> 14 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 14 + - Krzysztof Kozlowski <krzk@kernel.org> 15 15 16 16 description: | 17 17 DECON (Display and Enhancement Controller) is the Display Controller for the
+1 -1
Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml
··· 11 11 - Joonyoung Shim <jy0922.shim@samsung.com> 12 12 - Seung-Woo Kim <sw0312.kim@samsung.com> 13 13 - Kyungmin Park <kyungmin.park@samsung.com> 14 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 14 + - Krzysztof Kozlowski <krzk@kernel.org> 15 15 16 16 properties: 17 17 compatible:
+1 -1
Documentation/devicetree/bindings/extcon/maxim,max77843.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 13 13 description: | 14 14 This is a part of device tree bindings for Maxim MAX77843 MicroUSB
+1 -1
Documentation/devicetree/bindings/hwmon/lltc,ltc4151.yaml
··· 7 7 title: LTC4151 High Voltage I2C Current and Voltage Monitor 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/hwmon/microchip,mcp3021.yaml
··· 7 7 title: Microchip MCP3021 A/D converter 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/hwmon/sensirion,sht15.yaml
··· 7 7 title: Sensirion SHT15 humidity and temperature sensor 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml
··· 7 7 title: TMP102 temperature sensor 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml
··· 7 7 title: TMP108 temperature sensor 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
··· 7 7 title: Samsung's High Speed I2C controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 The Samsung's High Speed I2C controller is used to interface with I2C devices
+1 -1
Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml
··· 7 7 title: Samsung S3C/S5P/Exynos SoC I2C Controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/interrupt-controller/samsung,exynos4210-combiner.yaml
··· 7 7 title: Samsung Exynos SoC Interrupt Combiner Controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 Samsung's Exynos4 architecture includes a interrupt combiner controller which
+1 -1
Documentation/devicetree/bindings/leds/maxim,max77693.yaml
··· 7 7 title: Maxim MAX77693 MicroUSB and Companion Power Management IC LEDs 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for Maxim MAX77693 MicroUSB Integrated
+1 -1
Documentation/devicetree/bindings/memory-controllers/brcm,dpfe-cpu.yaml
··· 7 7 title: DDR PHY Front End (DPFE) for Broadcom STB 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Markus Mayer <mmayer@broadcom.com> 12 12 13 13 properties:
+1 -1
Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2-timings.yaml
··· 7 7 title: LPDDR2 SDRAM AC timing parameters for a given speed-bin 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml
··· 7 7 title: LPDDR2 SDRAM compliant to JEDEC JESD209-2 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3-timings.yaml
··· 7 7 title: LPDDR3 SDRAM AC timing parameters for a given speed-bin 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml
··· 7 7 title: LPDDR3 SDRAM compliant to JEDEC JESD209-3 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/memory-controllers/marvell,mvebu-sdram-controller.yaml
··· 8 8 9 9 maintainers: 10 10 - Jan Luebbe <jlu@pengutronix.de> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 13 13 properties: 14 14 compatible:
+1 -1
Documentation/devicetree/bindings/memory-controllers/qca,ath79-ddr-controller.yaml
··· 7 7 title: Qualcomm Atheros AR7xxx/AR9xxx DDR controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 The DDR controller of the AR7xxx and AR9xxx families provides an interface to
+1 -1
Documentation/devicetree/bindings/memory-controllers/renesas,h8300-bsc.yaml
··· 7 7 title: H8/300 bus controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Yoshinori Sato <ysato@users.sourceforge.jp> 12 12 13 13 properties:
+1 -1
Documentation/devicetree/bindings/memory-controllers/samsung,exynos5422-dmc.yaml
··· 9 9 Controller device 10 10 11 11 maintainers: 12 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 12 + - Krzysztof Kozlowski <krzk@kernel.org> 13 13 - Lukasz Luba <lukasz.luba@arm.com> 14 14 15 15 description: |
+5 -3
Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml
··· 7 7 title: Synopsys IntelliDDR Multi Protocol memory controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Manish Narani <manish.narani@xilinx.com> 12 12 - Michal Simek <michal.simek@xilinx.com> 13 13 ··· 24 24 properties: 25 25 compatible: 26 26 enum: 27 + - snps,ddrc-3.80a 27 28 - xlnx,zynq-ddrc-a05 28 29 - xlnx,zynqmp-ddrc-2.40a 29 - - snps,ddrc-3.80a 30 30 31 31 interrupts: 32 32 maxItems: 1 ··· 43 43 properties: 44 44 compatible: 45 45 contains: 46 - const: xlnx,zynqmp-ddrc-2.40a 46 + enum: 47 + - snps,ddrc-3.80a 48 + - xlnx,zynqmp-ddrc-2.40a 47 49 then: 48 50 required: 49 51 - interrupts
+1 -1
Documentation/devicetree/bindings/memory-controllers/ti,da8xx-ddrctl.yaml
··· 8 8 9 9 maintainers: 10 10 - Bartosz Golaszewski <bgolaszewski@baylibre.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 13 13 description: | 14 14 Documentation:
+1 -1
Documentation/devicetree/bindings/mfd/maxim,max14577.yaml
··· 7 7 title: Maxim MAX14577/MAX77836 MicroUSB and Companion Power Management IC 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for Maxim MAX14577/MAX77836 MicroUSB
+1 -1
Documentation/devicetree/bindings/mfd/maxim,max77686.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 13 13 description: | 14 14 This is a part of device tree bindings for Maxim MAX77686 Power Management
+1 -1
Documentation/devicetree/bindings/mfd/maxim,max77693.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 13 13 description: | 14 14 This is a part of device tree bindings for Maxim MAX77693 MicroUSB
+1 -1
Documentation/devicetree/bindings/mfd/maxim,max77802.yaml
··· 8 8 9 9 maintainers: 10 10 - Javier Martinez Canillas <javier@dowhile0.org> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 13 13 description: | 14 14 This is a part of device tree bindings for Maxim MAX77802 Power Management
+1 -1
Documentation/devicetree/bindings/mfd/maxim,max77843.yaml
··· 7 7 title: Maxim MAX77843 MicroUSB and Companion Power Management IC 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for Maxim MAX77843 MicroUSB
+1 -1
Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml
··· 7 7 title: Samsung Exynos SoC Low Power Audio Subsystem (LPASS) 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 12 13 13 properties:
+1 -1
Documentation/devicetree/bindings/mfd/samsung,s2mpa01.yaml
··· 7 7 title: Samsung S2MPA01 Power Management IC 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for S2M and S5M family of Power
+1 -1
Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml
··· 7 7 title: Samsung S2MPS11/13/14/15 and S2MPU02 Power Management IC 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for S2M and S5M family of Power
+1 -1
Documentation/devicetree/bindings/mfd/samsung,s5m8767.yaml
··· 7 7 title: Samsung S5M8767 Power Management IC 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for S2M and S5M family of Power
+1 -1
Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml
··· 7 7 title: Marvell International Ltd. NCI NFC controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/net/nfc/nxp,nci.yaml
··· 8 8 9 9 maintainers: 10 10 - Charles Gorand <charles.gorand@effinnov.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 13 13 properties: 14 14 compatible:
+1 -1
Documentation/devicetree/bindings/net/nfc/nxp,pn532.yaml
··· 7 7 title: NXP Semiconductors PN532 NFC controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/net/nfc/nxp,pn544.yaml
··· 7 7 title: NXP Semiconductors PN544 NFC Controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/net/nfc/st,st-nci.yaml
··· 7 7 title: STMicroelectronics ST NCI NFC controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/net/nfc/st,st21nfca.yaml
··· 7 7 title: STMicroelectronics SAS ST21NFCA NFC controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/net/nfc/st,st95hf.yaml
··· 7 7 title: STMicroelectronics ST95HF NFC controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml
··· 7 7 title: Texas Instruments TRF7970A RFID/NFC/15693 Transceiver 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Mark Greer <mgreer@animalcreek.com> 12 12 13 13 properties:
+1 -1
Documentation/devicetree/bindings/phy/samsung,dp-video-phy.yaml
··· 7 7 title: Samsung Exynos SoC DisplayPort PHY 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Marek Szyprowski <m.szyprowski@samsung.com> 12 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 13
+1 -1
Documentation/devicetree/bindings/phy/samsung,exynos-hdmi-phy.yaml
··· 11 11 - Joonyoung Shim <jy0922.shim@samsung.com> 12 12 - Seung-Woo Kim <sw0312.kim@samsung.com> 13 13 - Kyungmin Park <kyungmin.park@samsung.com> 14 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 14 + - Krzysztof Kozlowski <krzk@kernel.org> 15 15 16 16 properties: 17 17 compatible:
+1 -1
Documentation/devicetree/bindings/phy/samsung,exynos5250-sata-phy.yaml
··· 7 7 title: Samsung Exynos5250 SoC SATA PHY 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Marek Szyprowski <m.szyprowski@samsung.com> 12 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 13
+1 -1
Documentation/devicetree/bindings/phy/samsung,mipi-video-phy.yaml
··· 7 7 title: Samsung S5P/Exynos SoC MIPI CSIS/DSIM DPHY 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Marek Szyprowski <m.szyprowski@samsung.com> 12 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 13
+1 -1
Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml
··· 7 7 title: Samsung S5P/Exynos SoC USB 2.0 PHY 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Marek Szyprowski <m.szyprowski@samsung.com> 12 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 13
+1 -1
Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
··· 7 7 title: Samsung Exynos SoC USB 3.0 DRD PHY USB 2.0 PHY 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Marek Szyprowski <m.szyprowski@samsung.com> 12 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 13
+1 -1
Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-gpio-bank.yaml
··· 7 7 title: Samsung S3C/S5P/Exynos SoC pin controller - gpio bank 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 12 - Tomasz Figa <tomasz.figa@gmail.com> 13 13
+1 -1
Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-pins-cfg.yaml
··· 7 7 title: Samsung S3C/S5P/Exynos SoC pin controller - pins configuration 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 12 - Tomasz Figa <tomasz.figa@gmail.com> 13 13
+1 -1
Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml
··· 7 7 title: Samsung S3C/S5P/Exynos SoC pin controller - wake-up interrupt controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 12 - Tomasz Figa <tomasz.figa@gmail.com> 13 13
+1 -1
Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml
··· 7 7 title: Samsung S3C/S5P/Exynos SoC pin controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 12 - Tomasz Figa <tomasz.figa@gmail.com> 13 13
+1 -1
Documentation/devicetree/bindings/power/supply/maxim,max14577.yaml
··· 7 7 title: Maxim MAX14577/MAX77836 MicroUSB and Companion Power Management IC Charger 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for Maxim MAX14577/MAX77836 MicroUSB
+1 -1
Documentation/devicetree/bindings/power/supply/maxim,max77693.yaml
··· 7 7 title: Maxim MAX77693 MicroUSB and Companion Power Management IC Charger 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for Maxim MAX77693 MicroUSB Integrated
+1 -1
Documentation/devicetree/bindings/regulator/maxim,max14577.yaml
··· 7 7 title: Maxim MAX14577/MAX77836 MicroUSB and Companion Power Management IC regulators 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for Maxim MAX14577/MAX77836 MicroUSB
+1 -1
Documentation/devicetree/bindings/regulator/maxim,max77686.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 13 13 description: | 14 14 This is a part of device tree bindings for Maxim MAX77686 Power Management
+1 -1
Documentation/devicetree/bindings/regulator/maxim,max77693.yaml
··· 8 8 9 9 maintainers: 10 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 13 13 description: | 14 14 This is a part of device tree bindings for Maxim MAX77693 MicroUSB Integrated
+1 -1
Documentation/devicetree/bindings/regulator/maxim,max77802.yaml
··· 8 8 9 9 maintainers: 10 10 - Javier Martinez Canillas <javier@dowhile0.org> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 13 13 description: | 14 14 This is a part of device tree bindings for Maxim MAX77802 Power Management
+1 -1
Documentation/devicetree/bindings/regulator/maxim,max77843.yaml
··· 7 7 title: Maxim MAX77843 MicroUSB and Companion Power Management IC regulators 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for Maxim MAX77843 MicroUSB Integrated
+1 -1
Documentation/devicetree/bindings/regulator/maxim,max8952.yaml
··· 7 7 title: Maxim MAX8952 voltage regulator 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 allOf: 13 13 - $ref: regulator.yaml#
+1 -1
Documentation/devicetree/bindings/regulator/maxim,max8973.yaml
··· 7 7 title: Maxim MAX8973/MAX77621 voltage regulator 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 allOf: 13 13 - $ref: regulator.yaml#
+1 -1
Documentation/devicetree/bindings/regulator/maxim,max8997.yaml
··· 7 7 title: Maxim MAX8997 Power Management IC 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 The Maxim MAX8997 is a Power Management IC which includes voltage and current
+1 -1
Documentation/devicetree/bindings/regulator/samsung,s2mpa01.yaml
··· 7 7 title: Samsung S2MPA01 Power Management IC regulators 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for S2M and S5M family of Power
+1 -1
Documentation/devicetree/bindings/regulator/samsung,s2mps11.yaml
··· 7 7 title: Samsung S2MPS11 Power Management IC regulators 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for S2M and S5M family of Power
+1 -1
Documentation/devicetree/bindings/regulator/samsung,s2mps13.yaml
··· 7 7 title: Samsung S2MPS13 Power Management IC regulators 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for S2M and S5M family of Power
+1 -1
Documentation/devicetree/bindings/regulator/samsung,s2mps14.yaml
··· 7 7 title: Samsung S2MPS14 Power Management IC regulators 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for S2M and S5M family of Power
+1 -1
Documentation/devicetree/bindings/regulator/samsung,s2mps15.yaml
··· 7 7 title: Samsung S2MPS15 Power Management IC regulators 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for S2M and S5M family of Power
+1 -1
Documentation/devicetree/bindings/regulator/samsung,s2mpu02.yaml
··· 7 7 title: Samsung S2MPU02 Power Management IC regulators 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for S2M and S5M family of Power
+1 -1
Documentation/devicetree/bindings/regulator/samsung,s5m8767.yaml
··· 7 7 title: Samsung S5M8767 Power Management IC regulators 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 This is a part of device tree bindings for S2M and S5M family of Power
+5
Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml
··· 24 24 - const: hisilicon,hi3670-reset 25 25 - const: hisilicon,hi3660-reset 26 26 27 + hisi,rst-syscon: 28 + deprecated: true 29 + description: phandle of the reset's syscon, use hisilicon,rst-syscon instead 30 + $ref: /schemas/types.yaml#/definitions/phandle 31 + 27 32 hisilicon,rst-syscon: 28 33 description: phandle of the reset's syscon. 29 34 $ref: /schemas/types.yaml#/definitions/phandle
+3
Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml
··· 55 55 "#reset-cells": 56 56 const: 1 57 57 58 + resets: 59 + maxItems: 1 60 + 58 61 additionalProperties: false 59 62 60 63 required:
+1 -1
Documentation/devicetree/bindings/rng/samsung,exynos5250-trng.yaml
··· 7 7 title: Samsung Exynos SoC True Random Number Generator 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Łukasz Stelmach <l.stelmach@samsung.com> 12 12 13 13 properties:
+1 -1
Documentation/devicetree/bindings/rng/timeriomem_rng.yaml
··· 7 7 title: TimerIO Random Number Generator 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
··· 8 8 9 9 maintainers: 10 10 - Sam Protsenko <semen.protsenko@linaro.org> 11 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11 + - Krzysztof Kozlowski <krzk@kernel.org> 12 12 13 13 description: | 14 14 USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
+1 -1
Documentation/devicetree/bindings/sound/samsung,arndale.yaml
··· 7 7 title: Insignal Arndale boards audio complex 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 12 13 13 properties:
+1 -1
Documentation/devicetree/bindings/sound/samsung,smdk5250.yaml
··· 7 7 title: Samsung SMDK5250 audio complex with WM8994 codec 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 12 13 13 properties:
+1 -1
Documentation/devicetree/bindings/sound/samsung,snow.yaml
··· 7 7 title: Google Snow audio complex with MAX9809x codec 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 12 13 13 properties:
+1 -1
Documentation/devicetree/bindings/sound/samsung,tm2.yaml
··· 7 7 title: Samsung Exynos5433 TM2(E) audio complex with WM5110 codec 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 12 13 13 properties:
+1 -1
Documentation/devicetree/bindings/spi/samsung,spi-peripheral-props.yaml
··· 7 7 title: Peripheral-specific properties for Samsung S3C/S5P/Exynos SoC SPI controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: 13 13 See spi-peripheral-props.yaml for more info.
+1 -1
Documentation/devicetree/bindings/spi/samsung,spi.yaml
··· 7 7 title: Samsung S3C/S5P/Exynos SoC SPI controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: 13 13 All the SPI controller nodes should be represented in the aliases node using
+1 -1
Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml
··· 7 7 title: Samsung Exynos SoC Thermal Management Unit (TMU) 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 description: | 13 13 For multi-instance tmu each instance should have an alias correctly numbered
+1 -1
Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml
··· 7 7 title: Samsung Exynos SoC USB 3.0 DWC3 Controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+1 -1
Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml
··· 7 7 title: Samsung Exynos SoC USB 2.0 EHCI/OHCI Controller 8 8 9 9 maintainers: 10 - - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 10 + - Krzysztof Kozlowski <krzk@kernel.org> 11 11 12 12 properties: 13 13 compatible:
+18 -18
MAINTAINERS
··· 2637 2637 N: rockchip 2638 2638 2639 2639 ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES 2640 - M: Krzysztof Kozlowski <krzk@kernel.org> 2640 + M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 2641 2641 R: Alim Akhtar <alim.akhtar@samsung.com> 2642 2642 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 2643 2643 L: linux-samsung-soc@vger.kernel.org ··· 11908 11908 11909 11909 MAXIM MAX17040 FAMILY FUEL GAUGE DRIVERS 11910 11910 R: Iskren Chernev <iskren.chernev@gmail.com> 11911 - R: Krzysztof Kozlowski <krzk@kernel.org> 11911 + R: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 11912 11912 R: Marek Szyprowski <m.szyprowski@samsung.com> 11913 11913 R: Matheus Castello <matheus@castello.eng.br> 11914 11914 L: linux-pm@vger.kernel.org ··· 11918 11918 11919 11919 MAXIM MAX17042 FAMILY FUEL GAUGE DRIVERS 11920 11920 R: Hans de Goede <hdegoede@redhat.com> 11921 - R: Krzysztof Kozlowski <krzk@kernel.org> 11921 + R: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 11922 11922 R: Marek Szyprowski <m.szyprowski@samsung.com> 11923 11923 R: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> 11924 11924 R: Purism Kernel Team <kernel@puri.sm> ··· 11970 11970 F: drivers/power/supply/max77976_charger.c 11971 11971 11972 11972 MAXIM MUIC CHARGER DRIVERS FOR EXYNOS BASED BOARDS 11973 - M: Krzysztof Kozlowski <krzk@kernel.org> 11973 + M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 11974 11974 M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> 11975 11975 L: linux-pm@vger.kernel.org 11976 11976 S: Supported ··· 11981 11981 11982 11982 MAXIM PMIC AND MUIC DRIVERS FOR EXYNOS BASED BOARDS 11983 11983 M: Chanwoo Choi <cw00.choi@samsung.com> 11984 - M: Krzysztof Kozlowski <krzk@kernel.org> 11984 + M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 11985 11985 M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> 11986 11986 L: linux-kernel@vger.kernel.org 11987 11987 S: Supported ··· 12675 12675 F: tools/testing/memblock/ 12676 12676 12677 12677 MEMORY CONTROLLER DRIVERS 12678 - M: Krzysztof Kozlowski <krzk@kernel.org> 12678 + M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 12679 12679 L: linux-kernel@vger.kernel.org 12680 12680 S: Maintained 12681 12681 T: git git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl.git ··· 13819 13819 F: net/ipv4/nexthop.c 13820 13820 13821 13821 NFC SUBSYSTEM 13822 - M: Krzysztof Kozlowski <krzk@kernel.org> 13822 + M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 13823 13823 L: linux-nfc@lists.01.org (subscribers-only) 13824 13824 L: netdev@vger.kernel.org 13825 13825 S: Maintained ··· 14136 14136 F: drivers/regulator/pf8x00-regulator.c 14137 14137 14138 14138 NXP PTN5150A CC LOGIC AND EXTCON DRIVER 14139 - M: Krzysztof Kozlowski <krzk@kernel.org> 14139 + M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 14140 14140 L: linux-kernel@vger.kernel.org 14141 14141 S: Maintained 14142 14142 F: Documentation/devicetree/bindings/extcon/extcon-ptn5150.yaml ··· 14689 14689 14690 14690 OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS 14691 14691 M: Rob Herring <robh+dt@kernel.org> 14692 - M: Krzysztof Kozlowski <krzk+dt@kernel.org> 14692 + M: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> 14693 14693 L: devicetree@vger.kernel.org 14694 14694 S: Maintained 14695 14695 C: irc://irc.libera.chat/devicetree ··· 15601 15601 15602 15602 PIN CONTROLLER - SAMSUNG 15603 15603 M: Tomasz Figa <tomasz.figa@gmail.com> 15604 - M: Krzysztof Kozlowski <krzk@kernel.org> 15604 + M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 15605 15605 M: Sylwester Nawrocki <s.nawrocki@samsung.com> 15606 15606 R: Alim Akhtar <alim.akhtar@samsung.com> 15607 15607 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) ··· 17276 17276 F: drivers/s390/scsi/zfcp_* 17277 17277 17278 17278 S3C ADC BATTERY DRIVER 17279 - M: Krzysztof Kozlowski <krzk@kernel.org> 17279 + M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 17280 17280 L: linux-samsung-soc@vger.kernel.org 17281 17281 S: Odd Fixes 17282 17282 F: drivers/power/supply/s3c_adc_battery.c ··· 17321 17321 F: security/safesetid/ 17322 17322 17323 17323 SAMSUNG AUDIO (ASoC) DRIVERS 17324 - M: Krzysztof Kozlowski <krzk@kernel.org> 17324 + M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 17325 17325 M: Sylwester Nawrocki <s.nawrocki@samsung.com> 17326 17326 L: alsa-devel@alsa-project.org (moderated for non-subscribers) 17327 17327 S: Supported ··· 17329 17329 F: sound/soc/samsung/ 17330 17330 17331 17331 SAMSUNG EXYNOS PSEUDO RANDOM NUMBER GENERATOR (RNG) DRIVER 17332 - M: Krzysztof Kozlowski <krzk@kernel.org> 17332 + M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 17333 17333 L: linux-crypto@vger.kernel.org 17334 17334 L: linux-samsung-soc@vger.kernel.org 17335 17335 S: Maintained ··· 17364 17364 F: drivers/platform/x86/samsung-laptop.c 17365 17365 17366 17366 SAMSUNG MULTIFUNCTION PMIC DEVICE DRIVERS 17367 - M: Krzysztof Kozlowski <krzk@kernel.org> 17367 + M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 17368 17368 M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> 17369 17369 L: linux-kernel@vger.kernel.org 17370 17370 L: linux-samsung-soc@vger.kernel.org ··· 17390 17390 F: include/media/drv-intf/s3c_camif.h 17391 17391 17392 17392 SAMSUNG S3FWRN5 NFC DRIVER 17393 - M: Krzysztof Kozlowski <krzk@kernel.org> 17393 + M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 17394 17394 M: Krzysztof Opasiak <k.opasiak@samsung.com> 17395 17395 L: linux-nfc@lists.01.org (subscribers-only) 17396 17396 S: Maintained ··· 17412 17412 F: drivers/media/i2c/s5k5baf.c 17413 17413 17414 17414 SAMSUNG S5P Security SubSystem (SSS) DRIVER 17415 - M: Krzysztof Kozlowski <krzk@kernel.org> 17415 + M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 17416 17416 M: Vladimir Zapolskiy <vz@mleia.com> 17417 17417 L: linux-crypto@vger.kernel.org 17418 17418 L: linux-samsung-soc@vger.kernel.org ··· 17447 17447 F: include/linux/platform_data/clk-s3c2410.h 17448 17448 17449 17449 SAMSUNG SPI DRIVERS 17450 - M: Krzysztof Kozlowski <krzk@kernel.org> 17450 + M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 17451 17451 M: Andi Shyti <andi@etezian.org> 17452 17452 L: linux-spi@vger.kernel.org 17453 17453 L: linux-samsung-soc@vger.kernel.org ··· 17465 17465 17466 17466 SAMSUNG THERMAL DRIVER 17467 17467 M: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> 17468 - M: Krzysztof Kozlowski <krzk@kernel.org> 17468 + M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 17469 17469 L: linux-pm@vger.kernel.org 17470 17470 L: linux-samsung-soc@vger.kernel.org 17471 17471 S: Maintained
+1 -1
arch/arm/boot/dts/at91-kizbox3-hs.dts
··· 225 225 pinctrl_pio_io_reset: gpio_io_reset { 226 226 pinmux = <PIN_PB30__GPIO>; 227 227 bias-disable; 228 - drive-open-drain = <1>; 228 + drive-open-drain; 229 229 output-low; 230 230 }; 231 231 pinctrl_pio_input: gpio_input {
+1 -1
arch/arm/boot/dts/at91-kizbox3_common.dtsi
··· 211 211 pinmux = <PIN_PD12__FLEXCOM4_IO0>, //DATA 212 212 <PIN_PD13__FLEXCOM4_IO1>; //CLK 213 213 bias-disable; 214 - drive-open-drain = <1>; 214 + drive-open-drain; 215 215 }; 216 216 217 217 pinctrl_pwm0 {
+1 -1
arch/arm/boot/dts/at91-sam9_l9260.dts
··· 101 101 nand0: nand@40000000 { 102 102 nand-bus-width = <8>; 103 103 nand-ecc-mode = "soft"; 104 - nand-on-flash-bbt = <1>; 104 + nand-on-flash-bbt; 105 105 status = "okay"; 106 106 }; 107 107
+1 -1
arch/arm/boot/dts/da850-evm.dts
··· 278 278 status = "okay"; 279 279 pinctrl-names = "default"; 280 280 pinctrl-0 = <&spi1_pins &spi1_cs0_pin>; 281 - flash: m25p80@0 { 281 + flash: flash@0 { 282 282 #address-cells = <1>; 283 283 #size-cells = <1>; 284 284 compatible = "jedec,spi-nor";
+1 -1
arch/arm/boot/dts/dm8168-evm.dts
··· 177 177 pinctrl-names = "default"; 178 178 pinctrl-0 = <&mcspi1_pins>; 179 179 180 - m25p80@0 { 180 + flash@0 { 181 181 compatible = "w25x32"; 182 182 spi-max-frequency = <48000000>; 183 183 reg = <0>;
+1 -1
arch/arm/boot/dts/imx28-ts4600.dts
··· 26 26 pinctrl-0 = <&mmc0_4bit_pins_a 27 27 &mmc0_sck_cfg 28 28 &en_sd_pwr>; 29 - broken-cd = <1>; 29 + broken-cd; 30 30 bus-width = <4>; 31 31 vmmc-supply = <&reg_vddio_sd0>; 32 32 status = "okay";
+16 -16
arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
··· 154 154 regulators { 155 155 bcore1 { 156 156 regulator-name = "bcore1"; 157 - regulator-always-on = <1>; 157 + regulator-always-on; 158 158 regulator-min-microvolt = <300000>; 159 159 regulator-max-microvolt = <3300000>; 160 160 }; 161 161 162 162 bcore2 { 163 163 regulator-name = "bcore2"; 164 - regulator-always-on = <1>; 164 + regulator-always-on; 165 165 regulator-min-microvolt = <300000>; 166 166 regulator-max-microvolt = <3300000>; 167 167 }; 168 168 169 169 bpro { 170 170 regulator-name = "bpro"; 171 - regulator-always-on = <1>; 171 + regulator-always-on; 172 172 regulator-min-microvolt = <300000>; 173 173 regulator-max-microvolt = <3300000>; 174 174 }; 175 175 176 176 bperi { 177 177 regulator-name = "bperi"; 178 - regulator-always-on = <1>; 178 + regulator-always-on; 179 179 regulator-min-microvolt = <300000>; 180 180 regulator-max-microvolt = <3300000>; 181 181 }; 182 182 183 183 bmem { 184 184 regulator-name = "bmem"; 185 - regulator-always-on = <1>; 185 + regulator-always-on; 186 186 regulator-min-microvolt = <300000>; 187 187 regulator-max-microvolt = <3300000>; 188 188 }; 189 189 190 190 ldo2 { 191 191 regulator-name = "ldo2"; 192 - regulator-always-on = <1>; 192 + regulator-always-on; 193 193 regulator-min-microvolt = <300000>; 194 194 regulator-max-microvolt = <1800000>; 195 195 }; 196 196 197 197 ldo3 { 198 198 regulator-name = "ldo3"; 199 - regulator-always-on = <1>; 199 + regulator-always-on; 200 200 regulator-min-microvolt = <300000>; 201 201 regulator-max-microvolt = <3300000>; 202 202 }; 203 203 204 204 ldo4 { 205 205 regulator-name = "ldo4"; 206 - regulator-always-on = <1>; 206 + regulator-always-on; 207 207 regulator-min-microvolt = <300000>; 208 208 regulator-max-microvolt = <3300000>; 209 209 }; 210 210 211 211 ldo5 { 212 212 regulator-name = "ldo5"; 213 - regulator-always-on = <1>; 213 + regulator-always-on; 214 214 regulator-min-microvolt = <300000>; 215 215 regulator-max-microvolt = <3300000>; 216 216 }; 217 217 218 218 ldo6 { 219 219 regulator-name = "ldo6"; 220 - regulator-always-on = <1>; 220 + regulator-always-on; 221 221 regulator-min-microvolt = <300000>; 222 222 regulator-max-microvolt = <3300000>; 223 223 }; 224 224 225 225 ldo7 { 226 226 regulator-name = "ldo7"; 227 - regulator-always-on = <1>; 227 + regulator-always-on; 228 228 regulator-min-microvolt = <300000>; 229 229 regulator-max-microvolt = <3300000>; 230 230 }; 231 231 232 232 ldo8 { 233 233 regulator-name = "ldo8"; 234 - regulator-always-on = <1>; 234 + regulator-always-on; 235 235 regulator-min-microvolt = <300000>; 236 236 regulator-max-microvolt = <3300000>; 237 237 }; 238 238 239 239 ldo9 { 240 240 regulator-name = "ldo9"; 241 - regulator-always-on = <1>; 241 + regulator-always-on; 242 242 regulator-min-microvolt = <300000>; 243 243 regulator-max-microvolt = <3300000>; 244 244 }; 245 245 246 246 ldo10 { 247 247 regulator-name = "ldo10"; 248 - regulator-always-on = <1>; 248 + regulator-always-on; 249 249 regulator-min-microvolt = <300000>; 250 250 regulator-max-microvolt = <3300000>; 251 251 }; 252 252 253 253 ldo11 { 254 254 regulator-name = "ldo11"; 255 - regulator-always-on = <1>; 255 + regulator-always-on; 256 256 regulator-min-microvolt = <300000>; 257 257 regulator-max-microvolt = <3300000>; 258 258 }; 259 259 260 260 bio { 261 261 regulator-name = "bio"; 262 - regulator-always-on = <1>; 262 + regulator-always-on; 263 263 regulator-min-microvolt = <1800000>; 264 264 regulator-max-microvolt = <1800000>; 265 265 };
+2 -2
arch/arm/boot/dts/imx6ul-phytec-segin-peb-av-02.dtsi
··· 72 72 st,settling = <2>; 73 73 st,fraction-z = <7>; 74 74 st,i-drive = <1>; 75 - touchscreen-inverted-x = <1>; 76 - touchscreen-inverted-y = <1>; 75 + touchscreen-inverted-x; 76 + touchscreen-inverted-y; 77 77 }; 78 78 }; 79 79 };
+2 -2
arch/arm/boot/dts/logicpd-torpedo-baseboard.dtsi
··· 118 118 gpmc,device-width = <2>; 119 119 gpmc,wait-pin = <0>; 120 120 gpmc,burst-length = <4>; 121 - gpmc,cycle2cycle-samecsen = <1>; 122 - gpmc,cycle2cycle-diffcsen = <1>; 121 + gpmc,cycle2cycle-samecsen; 122 + gpmc,cycle2cycle-diffcsen; 123 123 gpmc,cs-on-ns = <0>; 124 124 gpmc,cs-rd-off-ns = <45>; 125 125 gpmc,cs-wr-off-ns = <45>;
+6 -6
arch/arm/boot/dts/qcom-apq8064-pins.dtsi
··· 76 76 pinconf { 77 77 pins = "gpio20", "gpio21"; 78 78 drive-strength = <2>; 79 - bias-disable = <0>; 79 + bias-disable; 80 80 }; 81 81 }; 82 82 ··· 116 116 pinconf { 117 117 pins = "gpio24", "gpio25"; 118 118 drive-strength = <2>; 119 - bias-disable = <0>; 119 + bias-disable; 120 120 }; 121 121 }; 122 122 ··· 141 141 pinconf { 142 142 pins = "gpio8", "gpio9"; 143 143 drive-strength = <2>; 144 - bias-disable = <0>; 144 + bias-disable; 145 145 }; 146 146 }; 147 147 ··· 166 166 pinconf { 167 167 pins = "gpio12", "gpio13"; 168 168 drive-strength = <2>; 169 - bias-disable = <0>; 169 + bias-disable; 170 170 }; 171 171 }; 172 172 ··· 229 229 pinconf { 230 230 pins = "gpio16", "gpio17"; 231 231 drive-strength = <2>; 232 - bias-disable = <0>; 232 + bias-disable; 233 233 }; 234 234 }; 235 235 ··· 282 282 pinconf { 283 283 pins = "gpio84", "gpio85"; 284 284 drive-strength = <2>; 285 - bias-disable = <0>; 285 + bias-disable; 286 286 }; 287 287 }; 288 288
+4 -4
arch/arm/boot/dts/qcom-ipq8064.dtsi
··· 972 972 973 973 snps,axi-config = <&stmmac_axi_setup>; 974 974 snps,pbl = <32>; 975 - snps,aal = <1>; 975 + snps,aal; 976 976 977 977 qcom,nss-common = <&nss_common>; 978 978 qcom,qsgmii-csr = <&qsgmii_csr>; ··· 996 996 997 997 snps,axi-config = <&stmmac_axi_setup>; 998 998 snps,pbl = <32>; 999 - snps,aal = <1>; 999 + snps,aal; 1000 1000 1001 1001 qcom,nss-common = <&nss_common>; 1002 1002 qcom,qsgmii-csr = <&qsgmii_csr>; ··· 1020 1020 1021 1021 snps,axi-config = <&stmmac_axi_setup>; 1022 1022 snps,pbl = <32>; 1023 - snps,aal = <1>; 1023 + snps,aal; 1024 1024 1025 1025 qcom,nss-common = <&nss_common>; 1026 1026 qcom,qsgmii-csr = <&qsgmii_csr>; ··· 1044 1044 1045 1045 snps,axi-config = <&stmmac_axi_setup>; 1046 1046 snps,pbl = <32>; 1047 - snps,aal = <1>; 1047 + snps,aal; 1048 1048 1049 1049 qcom,nss-common = <&nss_common>; 1050 1050 qcom,qsgmii-csr = <&qsgmii_csr>;
+1 -1
arch/arm/boot/dts/spear1310-evb.dts
··· 379 379 }; 380 380 }; 381 381 382 - m25p80@1 { 382 + flash@1 { 383 383 compatible = "st,m25p80"; 384 384 reg = <1>; 385 385 spi-max-frequency = <12000000>;
+1 -1
arch/arm/boot/dts/spear1340-evb.dts
··· 439 439 cs-gpios = <&gpiopinctrl 80 0>, <&gpiopinctrl 24 0>, 440 440 <&gpiopinctrl 85 0>; 441 441 442 - m25p80@0 { 442 + flash@0 { 443 443 compatible = "m25p80"; 444 444 reg = <0>; 445 445 spi-max-frequency = <12000000>;
+1 -1
arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi
··· 398 398 #size-cells = <0>; 399 399 status = "okay"; 400 400 401 - flash0: is25lp016d@0 { 401 + flash0: flash@0 { 402 402 compatible = "jedec,spi-nor"; 403 403 reg = <0>; 404 404 spi-max-frequency = <133000000>;
+2 -2
arch/arm/boot/dts/stm32mp157c-ev1.dts
··· 262 262 #size-cells = <0>; 263 263 status = "okay"; 264 264 265 - flash0: mx66l51235l@0 { 265 + flash0: flash@0 { 266 266 compatible = "jedec,spi-nor"; 267 267 reg = <0>; 268 268 spi-rx-bus-width = <4>; ··· 271 271 #size-cells = <1>; 272 272 }; 273 273 274 - flash1: mx66l51235l@1 { 274 + flash1: flash@1 { 275 275 compatible = "jedec,spi-nor"; 276 276 reg = <1>; 277 277 spi-rx-bus-width = <4>;
+4 -1
arch/arm/configs/gemini_defconfig
··· 49 49 CONFIG_PATA_FTIDE010=y 50 50 CONFIG_NETDEVICES=y 51 51 CONFIG_TUN=y 52 + CONFIG_NET_DSA_REALTEK=y 52 53 CONFIG_NET_DSA_REALTEK_SMI=y 54 + CONFIG_NET_DSA_REALTEK_RTL8366RB=y 53 55 CONFIG_GEMINI_ETHERNET=y 56 + CONFIG_MARVELL_PHY=y 54 57 CONFIG_MDIO_BITBANG=y 55 58 CONFIG_MDIO_GPIO=y 56 - CONFIG_MARVELL_PHY=y 57 59 CONFIG_INPUT_EVDEV=y 58 60 CONFIG_KEYBOARD_GPIO=y 59 61 # CONFIG_INPUT_MOUSE is not set ··· 68 66 CONFIG_I2C_GPIO=y 69 67 CONFIG_SPI=y 70 68 CONFIG_SPI_GPIO=y 69 + CONFIG_SENSORS_DRIVETEMP=y 71 70 CONFIG_SENSORS_GPIO_FAN=y 72 71 CONFIG_SENSORS_LM75=y 73 72 CONFIG_THERMAL=y
-365
arch/arm/configs/imote2_defconfig
··· 1 - # CONFIG_LOCALVERSION_AUTO is not set 2 - CONFIG_SYSVIPC=y 3 - CONFIG_LOG_BUF_SHIFT=14 4 - CONFIG_SYSFS_DEPRECATED_V2=y 5 - CONFIG_BLK_DEV_INITRD=y 6 - CONFIG_RD_BZIP2=y 7 - CONFIG_RD_LZMA=y 8 - CONFIG_EXPERT=y 9 - # CONFIG_COMPAT_BRK is not set 10 - CONFIG_SLAB=y 11 - CONFIG_MODULES=y 12 - CONFIG_MODULE_UNLOAD=y 13 - CONFIG_MODULE_FORCE_UNLOAD=y 14 - CONFIG_MODVERSIONS=y 15 - # CONFIG_BLK_DEV_BSG is not set 16 - CONFIG_ARCH_PXA=y 17 - CONFIG_MACH_INTELMOTE2=y 18 - CONFIG_NO_HZ=y 19 - CONFIG_HIGH_RES_TIMERS=y 20 - CONFIG_PREEMPT=y 21 - CONFIG_AEABI=y 22 - CONFIG_ZBOOT_ROM_TEXT=0x0 23 - CONFIG_ZBOOT_ROM_BSS=0x0 24 - CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=jffs2 console=ttyS2,115200 mem=32M" 25 - CONFIG_KEXEC=y 26 - CONFIG_FPE_NWFPE=y 27 - CONFIG_BINFMT_AOUT=m 28 - CONFIG_BINFMT_MISC=m 29 - CONFIG_PM=y 30 - CONFIG_APM_EMULATION=y 31 - CONFIG_NET=y 32 - CONFIG_PACKET=y 33 - CONFIG_UNIX=y 34 - CONFIG_INET=y 35 - CONFIG_IP_PNP=y 36 - CONFIG_IP_PNP_DHCP=y 37 - CONFIG_IP_PNP_BOOTP=y 38 - CONFIG_IP_PNP_RARP=y 39 - CONFIG_SYN_COOKIES=y 40 - # CONFIG_INET_XFRM_MODE_TRANSPORT is not set 41 - # CONFIG_INET_XFRM_MODE_TUNNEL is not set 42 - # CONFIG_INET_XFRM_MODE_BEET is not set 43 - # CONFIG_INET_DIAG is not set 44 - CONFIG_INET6_AH=m 45 - CONFIG_INET6_ESP=m 46 - CONFIG_INET6_IPCOMP=m 47 - CONFIG_IPV6_MIP6=m 48 - CONFIG_IPV6_TUNNEL=m 49 - CONFIG_IPV6_MULTIPLE_TABLES=y 50 - CONFIG_IPV6_SUBTREES=y 51 - CONFIG_NETFILTER=y 52 - CONFIG_NETFILTER_NETLINK_QUEUE=m 53 - CONFIG_NF_CONNTRACK=m 54 - CONFIG_NF_CONNTRACK_EVENTS=y 55 - CONFIG_NF_CT_PROTO_SCTP=y 56 - CONFIG_NF_CT_PROTO_UDPLITE=y 57 - CONFIG_NF_CONNTRACK_AMANDA=m 58 - CONFIG_NF_CONNTRACK_FTP=m 59 - CONFIG_NF_CONNTRACK_H323=m 60 - CONFIG_NF_CONNTRACK_IRC=m 61 - CONFIG_NF_CONNTRACK_NETBIOS_NS=m 62 - CONFIG_NF_CONNTRACK_PPTP=m 63 - CONFIG_NF_CONNTRACK_SANE=m 64 - CONFIG_NF_CONNTRACK_SIP=m 65 - CONFIG_NF_CONNTRACK_TFTP=m 66 - CONFIG_NF_CT_NETLINK=m 67 - CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m 68 - CONFIG_NETFILTER_XT_TARGET_LED=m 69 - CONFIG_NETFILTER_XT_TARGET_MARK=m 70 - CONFIG_NETFILTER_XT_TARGET_NFLOG=m 71 - CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m 72 - CONFIG_NETFILTER_XT_TARGET_TCPMSS=m 73 - CONFIG_NETFILTER_XT_MATCH_COMMENT=m 74 - CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m 75 - CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m 76 - CONFIG_NETFILTER_XT_MATCH_CONNMARK=m 77 - CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m 78 - CONFIG_NETFILTER_XT_MATCH_DCCP=m 79 - CONFIG_NETFILTER_XT_MATCH_DSCP=m 80 - CONFIG_NETFILTER_XT_MATCH_ESP=m 81 - CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m 82 - CONFIG_NETFILTER_XT_MATCH_HELPER=m 83 - CONFIG_NETFILTER_XT_MATCH_LENGTH=m 84 - CONFIG_NETFILTER_XT_MATCH_LIMIT=m 85 - CONFIG_NETFILTER_XT_MATCH_MAC=m 86 - CONFIG_NETFILTER_XT_MATCH_MARK=m 87 - CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m 88 - CONFIG_NETFILTER_XT_MATCH_POLICY=m 89 - CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m 90 - CONFIG_NETFILTER_XT_MATCH_QUOTA=m 91 - CONFIG_NETFILTER_XT_MATCH_REALM=m 92 - CONFIG_NETFILTER_XT_MATCH_SCTP=m 93 - CONFIG_NETFILTER_XT_MATCH_STATE=m 94 - CONFIG_NETFILTER_XT_MATCH_STATISTIC=m 95 - CONFIG_NETFILTER_XT_MATCH_STRING=m 96 - CONFIG_NETFILTER_XT_MATCH_TCPMSS=m 97 - CONFIG_NETFILTER_XT_MATCH_TIME=m 98 - CONFIG_NETFILTER_XT_MATCH_U32=m 99 - CONFIG_NF_CONNTRACK_IPV4=m 100 - CONFIG_IP_NF_IPTABLES=m 101 - CONFIG_IP_NF_MATCH_ADDRTYPE=m 102 - CONFIG_IP_NF_MATCH_AH=m 103 - CONFIG_IP_NF_MATCH_ECN=m 104 - CONFIG_IP_NF_MATCH_TTL=m 105 - CONFIG_IP_NF_FILTER=m 106 - CONFIG_IP_NF_TARGET_REJECT=m 107 - CONFIG_IP_NF_TARGET_LOG=m 108 - CONFIG_NF_NAT=m 109 - CONFIG_IP_NF_TARGET_MASQUERADE=m 110 - CONFIG_IP_NF_TARGET_NETMAP=m 111 - CONFIG_IP_NF_TARGET_REDIRECT=m 112 - CONFIG_NF_NAT_SNMP_BASIC=m 113 - CONFIG_IP_NF_MANGLE=m 114 - CONFIG_IP_NF_TARGET_CLUSTERIP=m 115 - CONFIG_IP_NF_TARGET_ECN=m 116 - CONFIG_IP_NF_TARGET_TTL=m 117 - CONFIG_IP_NF_RAW=m 118 - CONFIG_IP_NF_ARPTABLES=m 119 - CONFIG_IP_NF_ARPFILTER=m 120 - CONFIG_IP_NF_ARP_MANGLE=m 121 - CONFIG_NF_CONNTRACK_IPV6=m 122 - CONFIG_IP6_NF_IPTABLES=m 123 - CONFIG_IP6_NF_MATCH_AH=m 124 - CONFIG_IP6_NF_MATCH_EUI64=m 125 - CONFIG_IP6_NF_MATCH_FRAG=m 126 - CONFIG_IP6_NF_MATCH_OPTS=m 127 - CONFIG_IP6_NF_MATCH_HL=m 128 - CONFIG_IP6_NF_MATCH_IPV6HEADER=m 129 - CONFIG_IP6_NF_MATCH_MH=m 130 - CONFIG_IP6_NF_MATCH_RT=m 131 - CONFIG_IP6_NF_TARGET_HL=m 132 - CONFIG_IP6_NF_FILTER=m 133 - CONFIG_IP6_NF_TARGET_REJECT=m 134 - CONFIG_IP6_NF_MANGLE=m 135 - CONFIG_IP6_NF_RAW=m 136 - CONFIG_BRIDGE=m 137 - # CONFIG_BRIDGE_IGMP_SNOOPING is not set 138 - CONFIG_IEEE802154=y 139 - # CONFIG_WIRELESS is not set 140 - CONFIG_DEVTMPFS=y 141 - CONFIG_DEVTMPFS_MOUNT=y 142 - CONFIG_FW_LOADER=m 143 - CONFIG_CONNECTOR=m 144 - CONFIG_MTD=y 145 - CONFIG_MTD_CMDLINE_PARTS=y 146 - CONFIG_MTD_AFS_PARTS=y 147 - CONFIG_MTD_AR7_PARTS=y 148 - CONFIG_MTD_BLOCK=y 149 - CONFIG_MTD_CFI=y 150 - CONFIG_MTD_CFI_ADV_OPTIONS=y 151 - CONFIG_MTD_CFI_GEOMETRY=y 152 - # CONFIG_MTD_MAP_BANK_WIDTH_1 is not set 153 - # CONFIG_MTD_MAP_BANK_WIDTH_4 is not set 154 - # CONFIG_MTD_CFI_I2 is not set 155 - CONFIG_MTD_OTP=y 156 - CONFIG_MTD_CFI_INTELEXT=y 157 - CONFIG_MTD_PXA2XX=y 158 - CONFIG_BLK_DEV_LOOP=m 159 - CONFIG_BLK_DEV_CRYPTOLOOP=m 160 - CONFIG_BLK_DEV_NBD=m 161 - CONFIG_BLK_DEV_RAM=y 162 - CONFIG_NETDEVICES=y 163 - CONFIG_DUMMY=y 164 - # CONFIG_WLAN is not set 165 - CONFIG_PPP=m 166 - CONFIG_PPP_MULTILINK=y 167 - CONFIG_PPP_FILTER=y 168 - CONFIG_PPP_ASYNC=m 169 - CONFIG_PPP_SYNC_TTY=m 170 - CONFIG_PPP_DEFLATE=m 171 - CONFIG_PPP_BSDCOMP=m 172 - # CONFIG_INPUT_MOUSEDEV is not set 173 - CONFIG_INPUT_EVDEV=y 174 - # CONFIG_KEYBOARD_ATKBD is not set 175 - CONFIG_KEYBOARD_GPIO=y 176 - CONFIG_KEYBOARD_PXA27x=y 177 - # CONFIG_INPUT_MOUSE is not set 178 - CONFIG_INPUT_TOUCHSCREEN=y 179 - CONFIG_INPUT_MISC=y 180 - CONFIG_INPUT_UINPUT=y 181 - # CONFIG_SERIO is not set 182 - CONFIG_SERIAL_PXA=y 183 - CONFIG_SERIAL_PXA_CONSOLE=y 184 - CONFIG_LEGACY_PTY_COUNT=8 185 - # CONFIG_HW_RANDOM is not set 186 - CONFIG_I2C=y 187 - CONFIG_I2C_CHARDEV=y 188 - CONFIG_I2C_PXA=y 189 - CONFIG_SPI=y 190 - CONFIG_SPI_PXA2XX=y 191 - CONFIG_GPIO_SYSFS=y 192 - CONFIG_POWER_SUPPLY=y 193 - # CONFIG_HWMON is not set 194 - CONFIG_PMIC_DA903X=y 195 - CONFIG_REGULATOR=y 196 - CONFIG_REGULATOR_DEBUG=y 197 - CONFIG_REGULATOR_DA903X=y 198 - CONFIG_MEDIA_SUPPORT=y 199 - CONFIG_VIDEO_DEV=y 200 - CONFIG_MEDIA_TUNER_CUSTOMISE=y 201 - # CONFIG_MEDIA_TUNER_SIMPLE is not set 202 - # CONFIG_MEDIA_TUNER_TDA8290 is not set 203 - # CONFIG_MEDIA_TUNER_TDA827X is not set 204 - # CONFIG_MEDIA_TUNER_TDA18271 is not set 205 - # CONFIG_MEDIA_TUNER_TDA9887 is not set 206 - # CONFIG_MEDIA_TUNER_TEA5761 is not set 207 - # CONFIG_MEDIA_TUNER_TEA5767 is not set 208 - # CONFIG_MEDIA_TUNER_MT20XX is not set 209 - # CONFIG_MEDIA_TUNER_MT2060 is not set 210 - # CONFIG_MEDIA_TUNER_MT2266 is not set 211 - # CONFIG_MEDIA_TUNER_MT2131 is not set 212 - # CONFIG_MEDIA_TUNER_QT1010 is not set 213 - # CONFIG_MEDIA_TUNER_XC2028 is not set 214 - # CONFIG_MEDIA_TUNER_XC5000 is not set 215 - # CONFIG_MEDIA_TUNER_MXL5005S is not set 216 - # CONFIG_MEDIA_TUNER_MXL5007T is not set 217 - # CONFIG_MEDIA_TUNER_MC44S803 is not set 218 - # CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set 219 - CONFIG_VIDEO_PXA27x=y 220 - # CONFIG_V4L_USB_DRIVERS is not set 221 - # CONFIG_RADIO_ADAPTERS is not set 222 - CONFIG_FB=y 223 - CONFIG_FB_PXA=y 224 - CONFIG_FB_PXA_OVERLAY=y 225 - CONFIG_FB_PXA_PARAMETERS=y 226 - # CONFIG_LCD_CLASS_DEVICE is not set 227 - CONFIG_BACKLIGHT_CLASS_DEVICE=y 228 - # CONFIG_VGA_CONSOLE is not set 229 - CONFIG_FRAMEBUFFER_CONSOLE=y 230 - CONFIG_FONTS=y 231 - CONFIG_FONT_MINI_4x6=y 232 - CONFIG_SOUND=y 233 - CONFIG_SND=y 234 - CONFIG_SND_MIXER_OSS=y 235 - CONFIG_SND_PCM_OSS=y 236 - # CONFIG_SND_DRIVERS is not set 237 - # CONFIG_SND_ARM is not set 238 - # CONFIG_SND_SPI is not set 239 - # CONFIG_SND_USB is not set 240 - CONFIG_SND_SOC=y 241 - CONFIG_SND_PXA2XX_SOC=y 242 - # CONFIG_USB_HID is not set 243 - CONFIG_USB=y 244 - CONFIG_USB_OHCI_HCD=y 245 - CONFIG_USB_GADGET=y 246 - CONFIG_USB_PXA27X=y 247 - CONFIG_USB_ETH=m 248 - # CONFIG_USB_ETH_RNDIS is not set 249 - CONFIG_MMC=y 250 - CONFIG_SDIO_UART=m 251 - CONFIG_MMC_PXA=y 252 - CONFIG_MMC_SPI=y 253 - CONFIG_NEW_LEDS=y 254 - CONFIG_LEDS_CLASS=y 255 - CONFIG_LEDS_LP3944=y 256 - CONFIG_LEDS_TRIGGERS=y 257 - CONFIG_LEDS_TRIGGER_TIMER=y 258 - CONFIG_LEDS_TRIGGER_HEARTBEAT=y 259 - CONFIG_LEDS_TRIGGER_BACKLIGHT=y 260 - CONFIG_LEDS_TRIGGER_GPIO=y 261 - CONFIG_LEDS_TRIGGER_DEFAULT_ON=y 262 - CONFIG_RTC_CLASS=y 263 - CONFIG_RTC_DRV_PXA=y 264 - CONFIG_EXT2_FS=y 265 - CONFIG_EXT3_FS=m 266 - CONFIG_AUTOFS4_FS=y 267 - CONFIG_FUSE_FS=m 268 - CONFIG_CUSE=m 269 - CONFIG_MSDOS_FS=m 270 - CONFIG_VFAT_FS=m 271 - CONFIG_TMPFS=y 272 - CONFIG_JFFS2_FS=y 273 - CONFIG_JFFS2_FS_WBUF_VERIFY=y 274 - CONFIG_JFFS2_SUMMARY=y 275 - CONFIG_JFFS2_FS_XATTR=y 276 - CONFIG_JFFS2_COMPRESSION_OPTIONS=y 277 - CONFIG_JFFS2_LZO=y 278 - CONFIG_JFFS2_RUBIN=y 279 - CONFIG_CRAMFS=m 280 - CONFIG_SQUASHFS=m 281 - CONFIG_ROMFS_FS=m 282 - CONFIG_NFS_FS=y 283 - CONFIG_NFS_V3=y 284 - CONFIG_NFS_V3_ACL=y 285 - CONFIG_NFSD=m 286 - CONFIG_NFSD_V3_ACL=y 287 - CONFIG_SMB_FS=m 288 - CONFIG_CIFS=m 289 - CONFIG_CIFS_STATS=y 290 - CONFIG_CIFS_XATTR=y 291 - CONFIG_CIFS_POSIX=y 292 - CONFIG_NLS_CODEPAGE_437=m 293 - CONFIG_NLS_CODEPAGE_737=m 294 - CONFIG_NLS_CODEPAGE_775=m 295 - CONFIG_NLS_CODEPAGE_850=m 296 - CONFIG_NLS_CODEPAGE_852=m 297 - CONFIG_NLS_CODEPAGE_855=m 298 - CONFIG_NLS_CODEPAGE_857=m 299 - CONFIG_NLS_CODEPAGE_860=m 300 - CONFIG_NLS_CODEPAGE_861=m 301 - CONFIG_NLS_CODEPAGE_862=m 302 - CONFIG_NLS_CODEPAGE_863=m 303 - CONFIG_NLS_CODEPAGE_864=m 304 - CONFIG_NLS_CODEPAGE_865=m 305 - CONFIG_NLS_CODEPAGE_866=m 306 - CONFIG_NLS_CODEPAGE_869=m 307 - CONFIG_NLS_CODEPAGE_936=m 308 - CONFIG_NLS_CODEPAGE_950=m 309 - CONFIG_NLS_CODEPAGE_932=m 310 - CONFIG_NLS_CODEPAGE_949=m 311 - CONFIG_NLS_CODEPAGE_874=m 312 - CONFIG_NLS_ISO8859_8=m 313 - CONFIG_NLS_CODEPAGE_1250=m 314 - CONFIG_NLS_CODEPAGE_1251=m 315 - CONFIG_NLS_ASCII=m 316 - CONFIG_NLS_ISO8859_1=m 317 - CONFIG_NLS_ISO8859_2=m 318 - CONFIG_NLS_ISO8859_3=m 319 - CONFIG_NLS_ISO8859_4=m 320 - CONFIG_NLS_ISO8859_5=m 321 - CONFIG_NLS_ISO8859_6=m 322 - CONFIG_NLS_ISO8859_7=m 323 - CONFIG_NLS_ISO8859_9=m 324 - CONFIG_NLS_ISO8859_13=m 325 - CONFIG_NLS_ISO8859_14=m 326 - CONFIG_NLS_ISO8859_15=m 327 - CONFIG_NLS_KOI8_R=m 328 - CONFIG_NLS_KOI8_U=m 329 - CONFIG_NLS_UTF8=m 330 - CONFIG_PRINTK_TIME=y 331 - CONFIG_DEBUG_FS=y 332 - CONFIG_DEBUG_KERNEL=y 333 - # CONFIG_SCHED_DEBUG is not set 334 - CONFIG_DEBUG_RT_MUTEXES=y 335 - CONFIG_PROVE_LOCKING=y 336 - # CONFIG_FTRACE is not set 337 - CONFIG_DEBUG_USER=y 338 - CONFIG_CRYPTO_NULL=m 339 - CONFIG_CRYPTO_CRYPTD=m 340 - CONFIG_CRYPTO_TEST=m 341 - CONFIG_CRYPTO_ECB=m 342 - CONFIG_CRYPTO_LRW=m 343 - CONFIG_CRYPTO_PCBC=m 344 - CONFIG_CRYPTO_XTS=m 345 - CONFIG_CRYPTO_XCBC=m 346 - CONFIG_CRYPTO_VMAC=m 347 - CONFIG_CRYPTO_GHASH=m 348 - CONFIG_CRYPTO_MD4=m 349 - CONFIG_CRYPTO_MICHAEL_MIC=m 350 - CONFIG_CRYPTO_SHA256=m 351 - CONFIG_CRYPTO_SHA512=m 352 - CONFIG_CRYPTO_TGR192=m 353 - CONFIG_CRYPTO_AES=m 354 - CONFIG_CRYPTO_ARC4=m 355 - CONFIG_CRYPTO_BLOWFISH=m 356 - CONFIG_CRYPTO_CAST5=m 357 - CONFIG_CRYPTO_CAST6=m 358 - CONFIG_CRYPTO_FCRYPT=m 359 - CONFIG_CRYPTO_KHAZAD=m 360 - CONFIG_CRYPTO_SEED=m 361 - CONFIG_CRYPTO_SERPENT=m 362 - CONFIG_CRYPTO_TEA=m 363 - CONFIG_CRYPTO_TWOFISH=m 364 - # CONFIG_CRYPTO_ANSI_CPRNG is not set 365 - CONFIG_CRC16=y
+15 -4
arch/arm/configs/u8500_defconfig
··· 20 20 CONFIG_NEON=y 21 21 CONFIG_MODULES=y 22 22 CONFIG_MODULE_UNLOAD=y 23 - # CONFIG_BLK_DEV_BSG is not set 24 23 CONFIG_PARTITION_ADVANCED=y 25 24 CONFIG_CMA=y 26 25 CONFIG_NET=y ··· 40 41 CONFIG_CAIF=y 41 42 CONFIG_DEVTMPFS=y 42 43 CONFIG_DEVTMPFS_MOUNT=y 44 + CONFIG_GNSS=y 45 + CONFIG_GNSS_SIRF_SERIAL=y 43 46 CONFIG_BLK_DEV_RAM=y 44 47 CONFIG_BLK_DEV_RAM_SIZE=65536 45 48 CONFIG_NETDEVICES=y ··· 84 83 CONFIG_SPI_PL022=y 85 84 CONFIG_GPIO_STMPE=y 86 85 CONFIG_GPIO_TC3589X=y 86 + CONFIG_BATTERY_SAMSUNG_SDI=y 87 + CONFIG_AB8500_BM=y 87 88 CONFIG_SENSORS_IIO_HWMON=y 88 89 CONFIG_SENSORS_NTC_THERMISTOR=y 89 90 CONFIG_THERMAL=y ··· 101 98 CONFIG_V4L2_FLASH_LED_CLASS=y 102 99 CONFIG_DRM=y 103 100 CONFIG_DRM_PANEL_NOVATEK_NT35510=y 101 + CONFIG_DRM_PANEL_NOVATEK_NT35560=y 102 + CONFIG_DRM_PANEL_SAMSUNG_DB7430=y 104 103 CONFIG_DRM_PANEL_SAMSUNG_S6D16D0=y 104 + CONFIG_DRM_PANEL_SAMSUNG_S6D27A1=y 105 105 CONFIG_DRM_PANEL_SAMSUNG_S6E63M0=y 106 106 CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_DSI=y 107 - CONFIG_DRM_PANEL_SONY_ACX424AKP=y 107 + CONFIG_DRM_PANEL_WIDECHIPS_WS2401=y 108 108 CONFIG_DRM_LIMA=y 109 109 CONFIG_DRM_MCDE=y 110 110 CONFIG_FB=y ··· 135 129 CONFIG_LEDS_GPIO=y 136 130 CONFIG_LEDS_LP55XX_COMMON=y 137 131 CONFIG_LEDS_LP5521=y 132 + CONFIG_LEDS_REGULATOR=y 138 133 CONFIG_LEDS_RT8515=y 139 134 CONFIG_LEDS_TRIGGER_HEARTBEAT=y 140 135 CONFIG_RTC_CLASS=y ··· 151 144 CONFIG_BMA180=y 152 145 CONFIG_BMC150_ACCEL=y 153 146 CONFIG_IIO_ST_ACCEL_3AXIS=y 147 + # CONFIG_IIO_ST_ACCEL_SPI_3AXIS is not set 154 148 CONFIG_IIO_RESCALE=y 155 149 CONFIG_MPU3050_I2C=y 156 150 CONFIG_IIO_ST_GYRO_3AXIS=y 151 + # CONFIG_IIO_ST_GYRO_SPI_3AXIS is not set 157 152 CONFIG_INV_MPU6050_I2C=y 158 153 CONFIG_BH1780=y 159 154 CONFIG_GP2AP002=y 155 + CONFIG_TSL2772=y 160 156 CONFIG_AK8974=y 161 157 CONFIG_IIO_ST_MAGN_3AXIS=y 158 + # CONFIG_IIO_ST_MAGN_SPI_3AXIS is not set 162 159 CONFIG_YAMAHA_YAS530=y 163 160 CONFIG_IIO_HRTIMER_TRIGGER=y 164 161 CONFIG_IIO_ST_PRESS=y 162 + # CONFIG_IIO_ST_PRESS_SPI is not set 165 163 CONFIG_EXT2_FS=y 166 164 CONFIG_EXT2_FS_XATTR=y 167 165 CONFIG_EXT2_FS_POSIX_ACL=y ··· 185 173 CONFIG_CRYPTO_DEV_UX500_HASH=y 186 174 CONFIG_CRYPTO_DEV_UX500_DEBUG=y 187 175 CONFIG_PRINTK_TIME=y 188 - CONFIG_DEBUG_INFO=y 176 + CONFIG_DEBUG_KERNEL=y 189 177 CONFIG_MAGIC_SYSRQ=y 190 178 CONFIG_DEBUG_FS=y 191 - CONFIG_DEBUG_KERNEL=y 192 179 # CONFIG_SCHED_DEBUG is not set 193 180 # CONFIG_FTRACE is not set 194 181 CONFIG_DEBUG_USER=y
+3 -1
arch/arm/mach-davinci/board-da850-evm.c
··· 1101 1101 int ret; 1102 1102 u32 val; 1103 1103 struct davinci_soc_info *soc_info = &davinci_soc_info; 1104 - u8 rmii_en = soc_info->emac_pdata->rmii_en; 1104 + u8 rmii_en; 1105 1105 1106 1106 if (!machine_is_davinci_da850_evm()) 1107 1107 return 0; 1108 + 1109 + rmii_en = soc_info->emac_pdata->rmii_en; 1108 1110 1109 1111 cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); 1110 1112
+4 -2
arch/arm/mach-ep93xx/clock.c
··· 148 148 psc->lock = &clk_lock; 149 149 150 150 clk = clk_register(NULL, &psc->hw); 151 - if (IS_ERR(clk)) 151 + if (IS_ERR(clk)) { 152 152 kfree(psc); 153 + return ERR_CAST(clk); 154 + } 153 155 154 156 return &psc->hw; 155 157 } ··· 209 207 struct clk_rate_request *req) 210 208 { 211 209 unsigned long rate = req->rate; 212 - struct clk *best_parent = 0; 210 + struct clk *best_parent = NULL; 213 211 unsigned long __parent_rate; 214 212 unsigned long best_rate = 0, actual_rate, mclk_rate; 215 213 unsigned long best_parent_rate;
+2
arch/arm/mach-iop32x/cp6.c
··· 7 7 #include <asm/traps.h> 8 8 #include <asm/ptrace.h> 9 9 10 + #include "iop3xx.h" 11 + 10 12 void iop_enable_cp6(void) 11 13 { 12 14 u32 temp;
+14 -14
arch/arm/mach-vexpress/spc.c
··· 122 122 } 123 123 124 124 /** 125 - * ve_spc_global_wakeup_irq() 125 + * ve_spc_global_wakeup_irq() - sets/clears global wakeup IRQs 126 + * 127 + * @set: if true, global wake-up IRQs are set, if false they are cleared 126 128 * 127 129 * Function to set/clear global wakeup IRQs. Not protected by locking since 128 130 * it might be used in code paths where normal cacheable locks are not 129 131 * working. Locking must be provided by the caller to ensure atomicity. 130 - * 131 - * @set: if true, global wake-up IRQs are set, if false they are cleared 132 132 */ 133 133 void ve_spc_global_wakeup_irq(bool set) 134 134 { ··· 145 145 } 146 146 147 147 /** 148 - * ve_spc_cpu_wakeup_irq() 149 - * 150 - * Function to set/clear per-CPU wake-up IRQs. Not protected by locking since 151 - * it might be used in code paths where normal cacheable locks are not 152 - * working. Locking must be provided by the caller to ensure atomicity. 148 + * ve_spc_cpu_wakeup_irq() - sets/clears per-CPU wake-up IRQs 153 149 * 154 150 * @cluster: mpidr[15:8] bitfield describing cluster affinity level 155 151 * @cpu: mpidr[7:0] bitfield describing cpu affinity level 156 152 * @set: if true, wake-up IRQs are set, if false they are cleared 153 + * 154 + * Function to set/clear per-CPU wake-up IRQs. Not protected by locking since 155 + * it might be used in code paths where normal cacheable locks are not 156 + * working. Locking must be provided by the caller to ensure atomicity. 157 157 */ 158 158 void ve_spc_cpu_wakeup_irq(u32 cluster, u32 cpu, bool set) 159 159 { ··· 200 200 } 201 201 202 202 /** 203 - * ve_spc_powerdown() 203 + * ve_spc_powerdown() - enables/disables cluster powerdown 204 + * 205 + * @cluster: mpidr[15:8] bitfield describing cluster affinity level 206 + * @enable: if true enables powerdown, if false disables it 204 207 * 205 208 * Function to enable/disable cluster powerdown. Not protected by locking 206 209 * since it might be used in code paths where normal cacheable locks are not 207 210 * working. Locking must be provided by the caller to ensure atomicity. 208 - * 209 - * @cluster: mpidr[15:8] bitfield describing cluster affinity level 210 - * @enable: if true enables powerdown, if false disables it 211 211 */ 212 212 void ve_spc_powerdown(u32 cluster, bool enable) 213 213 { ··· 228 228 } 229 229 230 230 /** 231 - * ve_spc_cpu_in_wfi(u32 cpu, u32 cluster) 231 + * ve_spc_cpu_in_wfi() - Checks if the specified CPU is in WFI or not 232 232 * 233 233 * @cpu: mpidr[7:0] bitfield describing CPU affinity level within cluster 234 234 * @cluster: mpidr[15:8] bitfield describing cluster affinity level ··· 580 580 } 581 581 582 582 cluster = topology_physical_package_id(cpu_dev->id); 583 - if (init_opp_table[cluster]) 583 + if (cluster < 0 || init_opp_table[cluster]) 584 584 continue; 585 585 586 586 if (ve_init_opp_table(cpu_dev))
+4 -4
arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi
··· 89 89 pendown-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; 90 90 91 91 ti,x-min = /bits/ 16 <125>; 92 - touchscreen-size-x = /bits/ 16 <4008>; 92 + touchscreen-size-x = <4008>; 93 93 ti,y-min = /bits/ 16 <282>; 94 - touchscreen-size-y = /bits/ 16 <3864>; 94 + touchscreen-size-y = <3864>; 95 95 ti,x-plate-ohms = /bits/ 16 <180>; 96 - touchscreen-max-pressure = /bits/ 16 <255>; 97 - touchscreen-average-samples = /bits/ 16 <10>; 96 + touchscreen-max-pressure = <255>; 97 + touchscreen-average-samples = <10>; 98 98 ti,debounce-tol = /bits/ 16 <3>; 99 99 ti,debounce-rep = /bits/ 16 <1>; 100 100 ti,settle-delay-usec = /bits/ 16 <150>;
+4 -4
arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi
··· 70 70 pendown-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; 71 71 72 72 ti,x-min = /bits/ 16 <125>; 73 - touchscreen-size-x = /bits/ 16 <4008>; 73 + touchscreen-size-x = <4008>; 74 74 ti,y-min = /bits/ 16 <282>; 75 - touchscreen-size-y = /bits/ 16 <3864>; 75 + touchscreen-size-y = <3864>; 76 76 ti,x-plate-ohms = /bits/ 16 <180>; 77 - touchscreen-max-pressure = /bits/ 16 <255>; 78 - touchscreen-average-samples = /bits/ 16 <10>; 77 + touchscreen-max-pressure = <255>; 78 + touchscreen-average-samples = <10>; 79 79 ti,debounce-tol = /bits/ 16 <3>; 80 80 ti,debounce-rep = /bits/ 16 <1>; 81 81 ti,settle-delay-usec = /bits/ 16 <150>;
+4 -4
arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
··· 262 262 gpio4 { 263 263 pins = "gpio4"; 264 264 function = "32k-out1"; 265 - drive-push-pull = <1>; 265 + drive-push-pull; 266 266 }; 267 267 268 268 gpio5 { 269 269 pins = "gpio5"; 270 270 function = "gpio"; 271 - drive-push-pull = <0>; 271 + drive-push-pull; 272 272 }; 273 273 274 274 gpio6 { 275 275 pins = "gpio6"; 276 276 function = "gpio"; 277 - drive-push-pull = <1>; 277 + drive-push-pull; 278 278 }; 279 279 280 280 gpio7 { 281 281 pins = "gpio7"; 282 282 function = "gpio"; 283 - drive-push-pull = <0>; 283 + drive-push-pull; 284 284 }; 285 285 }; 286 286
+4 -4
arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts
··· 462 462 gpio4 { 463 463 pins = "gpio4"; 464 464 function = "32k-out1"; 465 - drive-push-pull = <1>; 465 + drive-push-pull; 466 466 }; 467 467 468 468 gpio5 { 469 469 pins = "gpio5"; 470 470 function = "gpio"; 471 - drive-push-pull = <0>; 471 + drive-push-pull; 472 472 }; 473 473 474 474 gpio6 { 475 475 pins = "gpio6"; 476 476 function = "gpio"; 477 - drive-push-pull = <1>; 477 + drive-push-pull; 478 478 }; 479 479 480 480 gpio7 { 481 481 pins = "gpio7"; 482 482 function = "gpio"; 483 - drive-push-pull = <1>; 483 + drive-push-pull; 484 484 }; 485 485 }; 486 486
+3 -3
arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
··· 174 174 gpio4 { 175 175 pins = "gpio4"; 176 176 function = "32k-out1"; 177 - drive-push-pull = <1>; 177 + drive-push-pull; 178 178 }; 179 179 180 180 gpio6 { 181 181 pins = "gpio6"; 182 182 function = "gpio"; 183 - drive-push-pull = <1>; 183 + drive-push-pull; 184 184 }; 185 185 186 186 gpio7 { 187 187 pins = "gpio7"; 188 188 function = "gpio"; 189 - drive-push-pull = <0>; 189 + drive-push-pull; 190 190 }; 191 191 }; 192 192
+3 -3
arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi
··· 148 148 gpio4 { 149 149 pins = "gpio4"; 150 150 function = "32k-out1"; 151 - drive-push-pull = <1>; 151 + drive-push-pull; 152 152 }; 153 153 154 154 gpio6 { 155 155 pins = "gpio6"; 156 156 function = "gpio"; 157 - drive-push-pull = <1>; 157 + drive-push-pull; 158 158 }; 159 159 160 160 gpio7 { 161 161 pins = "gpio7"; 162 162 function = "gpio"; 163 - drive-push-pull = <0>; 163 + drive-push-pull; 164 164 }; 165 165 }; 166 166
+3 -3
arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
··· 59 59 gpio1 { 60 60 pins = "gpio1"; 61 61 function = "fps-out"; 62 - drive-push-pull = <1>; 62 + drive-push-pull; 63 63 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 64 64 maxim,active-fps-power-up-slot = <7>; 65 65 maxim,active-fps-power-down-slot = <0>; ··· 68 68 gpio2_3 { 69 69 pins = "gpio2", "gpio3"; 70 70 function = "fps-out"; 71 - drive-open-drain = <1>; 71 + drive-open-drain; 72 72 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 73 73 }; 74 74 ··· 80 80 gpio5_6_7 { 81 81 pins = "gpio5", "gpio6", "gpio7"; 82 82 function = "gpio"; 83 - drive-push-pull = <1>; 83 + drive-push-pull; 84 84 }; 85 85 }; 86 86
+4 -4
arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
··· 1351 1351 gpio1 { 1352 1352 pins = "gpio1"; 1353 1353 function = "fps-out"; 1354 - drive-push-pull = <1>; 1354 + drive-push-pull; 1355 1355 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1356 1356 maxim,active-fps-power-up-slot = <7>; 1357 1357 maxim,active-fps-power-down-slot = <0>; ··· 1360 1360 gpio2 { 1361 1361 pins = "gpio2"; 1362 1362 function = "fps-out"; 1363 - drive-open-drain = <1>; 1363 + drive-open-drain; 1364 1364 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1365 1365 }; 1366 1366 1367 1367 gpio3 { 1368 1368 pins = "gpio3"; 1369 1369 function = "fps-out"; 1370 - drive-open-drain = <1>; 1370 + drive-open-drain; 1371 1371 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1372 1372 }; 1373 1373 ··· 1379 1379 gpio5_6_7 { 1380 1380 pins = "gpio5", "gpio6", "gpio7"; 1381 1381 function = "gpio"; 1382 - drive-push-pull = <1>; 1382 + drive-push-pull; 1383 1383 }; 1384 1384 }; 1385 1385
+4 -4
arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
··· 195 195 gpio1 { 196 196 pins = "gpio1"; 197 197 function = "fps-out"; 198 - drive-push-pull = <1>; 198 + drive-push-pull; 199 199 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 200 200 maxim,active-fps-power-up-slot = <0>; 201 201 maxim,active-fps-power-down-slot = <7>; ··· 204 204 gpio2 { 205 205 pins = "gpio2"; 206 206 function = "fps-out"; 207 - drive-open-drain = <1>; 207 + drive-open-drain; 208 208 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 209 209 maxim,active-fps-power-up-slot = <0>; 210 210 maxim,active-fps-power-down-slot = <7>; ··· 213 213 gpio3 { 214 214 pins = "gpio3"; 215 215 function = "fps-out"; 216 - drive-open-drain = <1>; 216 + drive-open-drain; 217 217 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 218 218 maxim,active-fps-power-up-slot = <4>; 219 219 maxim,active-fps-power-down-slot = <3>; ··· 227 227 gpio5_6_7 { 228 228 pins = "gpio5", "gpio6", "gpio7"; 229 229 function = "gpio"; 230 - drive-push-pull = <1>; 230 + drive-push-pull; 231 231 }; 232 232 }; 233 233
+2 -2
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
··· 1386 1386 gpio3 { 1387 1387 pins = "gpio3"; 1388 1388 function = "fps-out"; 1389 - drive-open-drain = <1>; 1389 + drive-open-drain; 1390 1390 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1391 1391 maxim,active-fps-power-up-slot = <4>; 1392 1392 maxim,active-fps-power-down-slot = <2>; ··· 1395 1395 gpio5_6 { 1396 1396 pins = "gpio5", "gpio6"; 1397 1397 function = "gpio"; 1398 - drive-push-pull = <1>; 1398 + drive-push-pull; 1399 1399 }; 1400 1400 1401 1401 gpio4 {
+2 -2
arch/arm64/boot/dts/qcom/msm8996.dtsi
··· 1249 1249 pins = "gpio47", "gpio48"; 1250 1250 function = "blsp_i2c3"; 1251 1251 drive-strength = <16>; 1252 - bias-disable = <0>; 1252 + bias-disable; 1253 1253 }; 1254 1254 1255 1255 blsp1_i2c3_sleep: blsp1-i2c2-sleep { 1256 1256 pins = "gpio47", "gpio48"; 1257 1257 function = "gpio"; 1258 1258 drive-strength = <2>; 1259 - bias-disable = <0>; 1259 + bias-disable; 1260 1260 }; 1261 1261 1262 1262 blsp2_uart3_4pins_default: blsp2-uart2-4pins {
+1 -1
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi
··· 33 33 }; 34 34 35 35 &alc5682 { 36 - realtek,dmic-clk-driving-high = "true"; 36 + realtek,dmic-clk-driving-high; 37 37 }; 38 38 39 39 &cpu6_alert0 {
+1 -1
arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi
··· 630 630 pins = "gpio6", "gpio25", "gpio26"; 631 631 function = "gpio"; 632 632 drive-strength = <8>; 633 - bias-disable = <0>; 633 + bias-disable; 634 634 }; 635 635 }; 636 636
+1 -1
arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts
··· 563 563 config { 564 564 pins = "gpio6", "gpio11"; 565 565 drive-strength = <8>; 566 - bias-disable = <0>; 566 + bias-disable; 567 567 }; 568 568 }; 569 569
+3 -2
drivers/firmware/arm_scmi/clock.c
··· 49 49 struct { 50 50 __le32 value_low; 51 51 __le32 value_high; 52 - } rate[0]; 52 + } rate[]; 53 53 #define RATE_TO_U64(X) \ 54 54 ({ \ 55 55 typeof(X) x = (X); \ ··· 210 210 211 211 if (rate_discrete && rate) { 212 212 clk->list.num_rates = tot_rate_cnt; 213 - sort(rate, tot_rate_cnt, sizeof(*rate), rate_cmp_func, NULL); 213 + sort(clk->list.rates, tot_rate_cnt, sizeof(*rate), 214 + rate_cmp_func, NULL); 214 215 } 215 216 216 217 clk->rate_discrete = rate_discrete;
+2 -1
drivers/firmware/arm_scmi/driver.c
··· 679 679 680 680 xfer = scmi_xfer_command_acquire(cinfo, msg_hdr); 681 681 if (IS_ERR(xfer)) { 682 - scmi_clear_channel(info, cinfo); 682 + if (MSG_XTRACT_TYPE(msg_hdr) == MSG_TYPE_DELAYED_RESP) 683 + scmi_clear_channel(info, cinfo); 683 684 return; 684 685 } 685 686
+4 -4
drivers/firmware/arm_scmi/optee.c
··· 405 405 return 0; 406 406 } 407 407 408 - static struct scmi_shared_mem *get_channel_shm(struct scmi_optee_channel *chan, 409 - struct scmi_xfer *xfer) 408 + static struct scmi_shared_mem __iomem * 409 + get_channel_shm(struct scmi_optee_channel *chan, struct scmi_xfer *xfer) 410 410 { 411 411 if (!chan) 412 412 return NULL; ··· 419 419 struct scmi_xfer *xfer) 420 420 { 421 421 struct scmi_optee_channel *channel = cinfo->transport_info; 422 - struct scmi_shared_mem *shmem = get_channel_shm(channel, xfer); 422 + struct scmi_shared_mem __iomem *shmem = get_channel_shm(channel, xfer); 423 423 int ret; 424 424 425 425 mutex_lock(&channel->mu); ··· 436 436 struct scmi_xfer *xfer) 437 437 { 438 438 struct scmi_optee_channel *channel = cinfo->transport_info; 439 - struct scmi_shared_mem *shmem = get_channel_shm(channel, xfer); 439 + struct scmi_shared_mem __iomem *shmem = get_channel_shm(channel, xfer); 440 440 441 441 shmem_fetch_response(shmem, xfer); 442 442 }
+17 -6
drivers/memory/atmel-ebi.c
··· 544 544 smc_np = of_parse_phandle(dev->of_node, "atmel,smc", 0); 545 545 546 546 ebi->smc.regmap = syscon_node_to_regmap(smc_np); 547 - if (IS_ERR(ebi->smc.regmap)) 548 - return PTR_ERR(ebi->smc.regmap); 547 + if (IS_ERR(ebi->smc.regmap)) { 548 + ret = PTR_ERR(ebi->smc.regmap); 549 + goto put_node; 550 + } 549 551 550 552 ebi->smc.layout = atmel_hsmc_get_reg_layout(smc_np); 551 - if (IS_ERR(ebi->smc.layout)) 552 - return PTR_ERR(ebi->smc.layout); 553 + if (IS_ERR(ebi->smc.layout)) { 554 + ret = PTR_ERR(ebi->smc.layout); 555 + goto put_node; 556 + } 553 557 554 558 ebi->smc.clk = of_clk_get(smc_np, 0); 555 559 if (IS_ERR(ebi->smc.clk)) { 556 - if (PTR_ERR(ebi->smc.clk) != -ENOENT) 557 - return PTR_ERR(ebi->smc.clk); 560 + if (PTR_ERR(ebi->smc.clk) != -ENOENT) { 561 + ret = PTR_ERR(ebi->smc.clk); 562 + goto put_node; 563 + } 558 564 559 565 ebi->smc.clk = NULL; 560 566 } 567 + of_node_put(smc_np); 561 568 ret = clk_prepare_enable(ebi->smc.clk); 562 569 if (ret) 563 570 return ret; ··· 615 608 } 616 609 617 610 return of_platform_populate(np, NULL, NULL, dev); 611 + 612 + put_node: 613 + of_node_put(smc_np); 614 + return ret; 618 615 } 619 616 620 617 static __maybe_unused int atmel_ebi_resume(struct device *dev)
+1 -2
drivers/memory/fsl_ifc.c
··· 287 287 } 288 288 289 289 /* legacy dts may still use "simple-bus" compatible */ 290 - ret = of_platform_populate(dev->dev.of_node, NULL, NULL, 291 - &dev->dev); 290 + ret = of_platform_default_populate(dev->dev.of_node, NULL, &dev->dev); 292 291 if (ret) 293 292 goto err_free_nandirq; 294 293
+9 -1
drivers/memory/renesas-rpc-if.c
··· 651 651 struct platform_device *vdev; 652 652 struct device_node *flash; 653 653 const char *name; 654 + int ret; 654 655 655 656 flash = of_get_next_child(pdev->dev.of_node, NULL); 656 657 if (!flash) { ··· 675 674 return -ENOMEM; 676 675 vdev->dev.parent = &pdev->dev; 677 676 platform_set_drvdata(pdev, vdev); 678 - return platform_device_add(vdev); 677 + 678 + ret = platform_device_add(vdev); 679 + if (ret) { 680 + platform_device_put(vdev); 681 + return ret; 682 + } 683 + 684 + return 0; 679 685 } 680 686 681 687 static int rpcif_remove(struct platform_device *pdev)
+3 -1
drivers/reset/reset-rzg2l-usbphy-ctrl.c
··· 121 121 return dev_err_probe(dev, PTR_ERR(priv->rstc), 122 122 "failed to get reset\n"); 123 123 124 - reset_control_deassert(priv->rstc); 124 + error = reset_control_deassert(priv->rstc); 125 + if (error) 126 + return error; 125 127 126 128 priv->rcdev.ops = &rzg2l_usbphy_ctrl_reset_ops; 127 129 priv->rcdev.of_reset_n_cells = 1;
+8 -1
drivers/reset/tegra/reset-bpmp.c
··· 20 20 struct tegra_bpmp *bpmp = to_tegra_bpmp(rstc); 21 21 struct mrq_reset_request request; 22 22 struct tegra_bpmp_message msg; 23 + int err; 23 24 24 25 memset(&request, 0, sizeof(request)); 25 26 request.cmd = command; ··· 31 30 msg.tx.data = &request; 32 31 msg.tx.size = sizeof(request); 33 32 34 - return tegra_bpmp_transfer(bpmp, &msg); 33 + err = tegra_bpmp_transfer(bpmp, &msg); 34 + if (err) 35 + return err; 36 + if (msg.rx.ret) 37 + return -EINVAL; 38 + 39 + return 0; 35 40 } 36 41 37 42 static int tegra_bpmp_reset_module(struct reset_controller_dev *rstc,