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KVM: arm64: GICv3: Set ICH_HCR_EL2.TDIR when interrupts overflow LR capacity

Now that we are ready to handle deactivation through ICV_DIR_EL1,
set the trap bit if we have active interrupts outside of the LRs.

Tested-by: Fuad Tabba <tabba@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Mark Brown <broonie@kernel.org>
Link: https://msgid.link/20251120172540.2267180-31-maz@kernel.org
Signed-off-by: Oliver Upton <oupton@kernel.org>

authored by

Marc Zyngier and committed by
Oliver Upton 70fd60bd 295b6921

+7
+7
arch/arm64/kvm/vgic/vgic-v3.c
··· 45 45 ICH_HCR_EL2_VGrp0DIE : ICH_HCR_EL2_VGrp0EIE; 46 46 cpuif->vgic_hcr |= (cpuif->vgic_vmcr & ICH_VMCR_ENG1_MASK) ? 47 47 ICH_HCR_EL2_VGrp1DIE : ICH_HCR_EL2_VGrp1EIE; 48 + 49 + /* 50 + * Note that we set the trap irrespective of EOIMode, as that 51 + * can change behind our back without any warning... 52 + */ 53 + if (irqs_active_outside_lrs(als)) 54 + cpuif->vgic_hcr |= ICH_HCR_EL2_TDIR; 48 55 } 49 56 50 57 static bool lr_signals_eoi_mi(u64 lr_val)