Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
regulator: rt5133: Add RT5133 PMIC regulator Support
RT5133 is a highly-integrated chip. It includes 8 LDOs and 3 GPOs that can
be used to drive output high/low purpose. The dependency of the GPO block is
internally LDO1 Voltage.
Signed-off-by: Jeff Chang <jeff_chang@richtek.com>
Link: https://patch.msgid.link/20250813020910.2977555-2-jeff_chang@richtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
authored by
Jeff Chang
and committed by
Mark Brown
714165e1
d0de6895
+655
+12
drivers/regulator/Kconfig
+12
drivers/regulator/Kconfig
···
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600mV to 1395mV, per step 6.250mV. The others are all fixed voltage
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by external hardware circuit.
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config REGULATOR_RT5133
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tristate "Richtek RT5133 PMIC Regulators"
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depends on I2C && GPIOLIB && OF
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select REGMAP
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select CRC8
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select OF_GPIO
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help
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This driver adds support for RT5133 PMIC regulators.
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RT5133 is an integrated chip. It includes 8 LDOs and 3 GPOs that
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can be used to drive output high/low purpose. The dependency of the
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GPO block is internally LDO1 Voltage.
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+
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config REGULATOR_RT5190A
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tristate "Richtek RT5190A PMIC"
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depends on I2C
+1
drivers/regulator/Makefile
+1
drivers/regulator/Makefile
···
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obj-$(CONFIG_REGULATOR_RT4831) += rt4831-regulator.o
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obj-$(CONFIG_REGULATOR_RT5033) += rt5033-regulator.o
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obj-$(CONFIG_REGULATOR_RT5120) += rt5120-regulator.o
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obj-$(CONFIG_REGULATOR_RT5133) += rt5133-regulator.o
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obj-$(CONFIG_REGULATOR_RT5190A) += rt5190a-regulator.o
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obj-$(CONFIG_REGULATOR_RT5739) += rt5739.o
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obj-$(CONFIG_REGULATOR_RT5759) += rt5759-regulator.o
+642
drivers/regulator/rt5133-regulator.c
+642
drivers/regulator/rt5133-regulator.c
···
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+
// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2025 Richtek Technology Corp.
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// Author: ChiYuan Huang <cy_huang@richtek.com>
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// Author: ShihChia Chang <jeff_chang@richtek.com>
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#include <linux/crc8.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/gpio/driver.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/regmap.h>
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#include <linux/regulator/driver.h>
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+
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#define RT5133_REG_CHIP_INFO 0x00
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#define RT5133_REG_RST_CTRL 0x06
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#define RT5133_REG_BASE_CTRL 0x09
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#define RT5133_REG_GPIO_CTRL 0x0B
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#define RT5133_REG_BASE_EVT 0x10
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#define RT5133_REG_LDO_PGB_STAT 0x15
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#define RT5133_REG_BASE_MASK 0x16
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#define RT5133_REG_LDO_SHDN 0x19
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#define RT5133_REG_LDO_ON 0x1A
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#define RT5133_REG_LDO_OFF 0x1B
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#define RT5133_REG_LDO1_CTRL1 0x20
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#define RT5133_REG_LDO1_CTRL2 0x21
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#define RT5133_REG_LDO1_CTRL3 0x22
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#define RT5133_REG_LDO2_CTRL1 0x24
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#define RT5133_REG_LDO2_CTRL2 0x25
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#define RT5133_REG_LDO2_CTRL3 0x26
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#define RT5133_REG_LDO3_CTRL1 0x28
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#define RT5133_REG_LDO3_CTRL2 0x29
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#define RT5133_REG_LDO3_CTRL3 0x2A
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#define RT5133_REG_LDO4_CTRL1 0x2C
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#define RT5133_REG_LDO4_CTRL2 0x2D
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#define RT5133_REG_LDO4_CTRL3 0x2E
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#define RT5133_REG_LDO5_CTRL1 0x30
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#define RT5133_REG_LDO5_CTRL2 0x31
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#define RT5133_REG_LDO5_CTRL3 0x32
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#define RT5133_REG_LDO6_CTRL1 0x34
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#define RT5133_REG_LDO6_CTRL2 0x35
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#define RT5133_REG_LDO6_CTRL3 0x36
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#define RT5133_REG_LDO7_CTRL1 0x38
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#define RT5133_REG_LDO7_CTRL2 0x39
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#define RT5133_REG_LDO7_CTRL3 0x3A
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#define RT5133_REG_LDO8_CTRL1 0x3C
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#define RT5133_REG_LDO8_CTRL2 0x3D
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#define RT5133_REG_LDO8_CTRL3 0x3E
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#define RT5133_REG_LDO8_CTRL4 0x3F
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+
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#define RT5133_LDO_REG_BASE(_id) (0x20 + ((_id) - 1) * 4)
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+
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#define RT5133_VENDOR_ID_MASK GENMASK(7, 4)
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#define RT5133_RESET_CODE 0xB1
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+
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#define RT5133_FOFF_BASE_MASK BIT(1)
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#define RT5133_OCSHDN_ALL_MASK BIT(7)
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#define RT5133_OCSHDN_ALL_SHIFT (7)
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#define RT5133_PGBSHDN_ALL_MASK BIT(6)
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#define RT5133_PGBSHDN_ALL_SHIFT (6)
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+
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#define RT5133_OCPTSEL_MASK BIT(5)
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#define RT5133_PGBPTSEL_MASK BIT(4)
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#define RT5133_STBTDSEL_MASK GENMASK(1, 0)
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+
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#define RT5133_LDO_ENABLE_MASK BIT(7)
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#define RT5133_LDO_VSEL_MASK GENMASK(7, 5)
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#define RT5133_LDO_AD_MASK BIT(2)
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#define RT5133_LDO_SOFT_START_MASK GENMASK(1, 0)
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+
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#define RT5133_GPIO_NR 3
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+
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#define RT5133_LDO_PGB_EVT_MASK GENMASK(23, 16)
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#define RT5133_LDO_PGB_EVT_SHIFT 16
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#define RT5133_LDO_OC_EVT_MASK GENMASK(15, 8)
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#define RT5133_LDO_OC_EVT_SHIFT 8
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#define RT5133_VREF_EVT_MASK BIT(6)
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#define RT5133_BASE_EVT_MASK GENMASK(7, 0)
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#define RT5133_INTR_CLR_MASK GENMASK(23, 0)
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#define RT5133_INTR_BYTE_NR 3
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+
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#define RT5133_MAX_I2C_BLOCK_SIZE 1
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+
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#define RT5133_CRC8_POLYNOMIAL 0x7
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+
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#define RT5133_I2C_ADDR_LEN 1
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#define RT5133_PREDATA_LEN 2
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#define RT5133_I2C_CRC_LEN 1
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#define RT5133_REG_ADDR_LEN 1
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#define RT5133_I2C_DUMMY_LEN 1
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+
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#define I2C_ADDR_XLATE_8BIT(_addr, _rw) ((((_addr) & 0x7F) << 1) | (_rw))
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+
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enum {
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RT5133_REGULATOR_BASE = 0,
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RT5133_REGULATOR_LDO1,
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RT5133_REGULATOR_LDO2,
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RT5133_REGULATOR_LDO3,
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RT5133_REGULATOR_LDO4,
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RT5133_REGULATOR_LDO5,
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RT5133_REGULATOR_LDO6,
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RT5133_REGULATOR_LDO7,
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RT5133_REGULATOR_LDO8,
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RT5133_REGULATOR_MAX
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};
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+
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struct chip_data {
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const struct regulator_desc *regulators;
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const u8 vendor_id;
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};
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+
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struct rt5133_priv {
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struct device *dev;
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struct regmap *regmap;
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struct gpio_desc *enable_gpio;
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struct regulator_dev *rdev[RT5133_REGULATOR_MAX];
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struct gpio_chip gc;
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const struct chip_data *cdata;
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unsigned int gpio_output_flag;
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u8 crc8_tbls[CRC8_TABLE_SIZE];
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};
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+
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static const unsigned int vout_type1_tables[] = {
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1800000, 2500000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000
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};
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+
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static const unsigned int vout_type2_tables[] = {
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1700000, 1800000, 1900000, 2500000, 2700000, 2800000, 2900000, 3000000
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};
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+
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static const unsigned int vout_type3_tables[] = {
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900000, 950000, 1000000, 1050000, 1100000, 1150000, 1200000, 1800000
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};
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+
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static const unsigned int vout_type4_tables[] = {
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855000, 900000, 950000, 1000000, 1040000, 1090000, 1140000, 1710000
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};
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+
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static const struct regulator_ops rt5133_regulator_ops = {
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.list_voltage = regulator_list_voltage_table,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.set_active_discharge = regulator_set_active_discharge_regmap,
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};
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+
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static const struct regulator_ops rt5133_base_regulator_ops = {
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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};
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+
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#define RT5133_REGULATOR_DESC(_name, _node_name, vtables, _supply) \
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{\
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.name = #_name,\
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.id = RT5133_REGULATOR_##_name,\
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.of_match = of_match_ptr(#_node_name),\
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.regulators_node = of_match_ptr("regulators"),\
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.supply_name = _supply,\
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.type = REGULATOR_VOLTAGE,\
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.owner = THIS_MODULE,\
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.ops = &rt5133_regulator_ops,\
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.n_voltages = ARRAY_SIZE(vtables),\
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.volt_table = vtables,\
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.enable_reg = RT5133_REG_##_name##_CTRL1,\
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.enable_mask = RT5133_LDO_ENABLE_MASK,\
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.vsel_reg = RT5133_REG_##_name##_CTRL2,\
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.vsel_mask = RT5133_LDO_VSEL_MASK,\
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.active_discharge_reg = RT5133_REG_##_name##_CTRL3,\
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.active_discharge_mask = RT5133_LDO_AD_MASK,\
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}
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+
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static const struct regulator_desc rt5133_regulators[] = {
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/* For digital part, base current control */
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{
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.name = "base",
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.id = RT5133_REGULATOR_BASE,
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.of_match = of_match_ptr("base"),
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.regulators_node = of_match_ptr("regulators"),
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.type = REGULATOR_VOLTAGE,
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.owner = THIS_MODULE,
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.ops = &rt5133_base_regulator_ops,
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.enable_reg = RT5133_REG_BASE_CTRL,
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.enable_mask = RT5133_FOFF_BASE_MASK,
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.enable_is_inverted = true,
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},
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RT5133_REGULATOR_DESC(LDO1, ldo1, vout_type1_tables, "base"),
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RT5133_REGULATOR_DESC(LDO2, ldo2, vout_type1_tables, "base"),
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RT5133_REGULATOR_DESC(LDO3, ldo3, vout_type2_tables, "base"),
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RT5133_REGULATOR_DESC(LDO4, ldo4, vout_type2_tables, "base"),
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RT5133_REGULATOR_DESC(LDO5, ldo5, vout_type2_tables, "base"),
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RT5133_REGULATOR_DESC(LDO6, ldo6, vout_type2_tables, "base"),
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RT5133_REGULATOR_DESC(LDO7, ldo7, vout_type3_tables, "vin"),
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RT5133_REGULATOR_DESC(LDO8, ldo8, vout_type3_tables, "vin"),
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};
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+
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static const struct regulator_desc rt5133a_regulators[] = {
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/* For digital part, base current control */
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{
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.name = "base",
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.id = RT5133_REGULATOR_BASE,
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.of_match = of_match_ptr("base"),
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.regulators_node = of_match_ptr("regulators"),
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.type = REGULATOR_VOLTAGE,
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.owner = THIS_MODULE,
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.ops = &rt5133_base_regulator_ops,
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.enable_reg = RT5133_REG_BASE_CTRL,
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.enable_mask = RT5133_FOFF_BASE_MASK,
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.enable_is_inverted = true,
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},
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RT5133_REGULATOR_DESC(LDO1, ldo1, vout_type1_tables, "base"),
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RT5133_REGULATOR_DESC(LDO2, ldo2, vout_type1_tables, "base"),
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RT5133_REGULATOR_DESC(LDO3, ldo3, vout_type2_tables, "base"),
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RT5133_REGULATOR_DESC(LDO4, ldo4, vout_type2_tables, "base"),
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RT5133_REGULATOR_DESC(LDO5, ldo5, vout_type2_tables, "base"),
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RT5133_REGULATOR_DESC(LDO6, ldo6, vout_type2_tables, "base"),
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RT5133_REGULATOR_DESC(LDO7, ldo7, vout_type3_tables, "vin"),
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RT5133_REGULATOR_DESC(LDO8, ldo8, vout_type4_tables, "vin"),
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};
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+
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static const struct chip_data regulator_data[] = {
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{ rt5133_regulators, 0x70},
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{ rt5133a_regulators, 0x80},
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};
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+
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static int rt5133_gpio_direction_output(struct gpio_chip *gpio,
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unsigned int offset, int value)
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{
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struct rt5133_priv *priv = gpiochip_get_data(gpio);
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+
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if (offset >= RT5133_GPIO_NR)
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return -EINVAL;
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+
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return regmap_update_bits(priv->regmap, RT5133_REG_GPIO_CTRL,
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BIT(7 - offset) | BIT(3 - offset),
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value ? BIT(7 - offset) | BIT(3 - offset) : 0);
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}
243
+
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static int rt5133_gpio_get(struct gpio_chip *chip, unsigned int offset)
245
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{
246
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struct rt5133_priv *priv = gpiochip_get_data(chip);
247
+
248
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return !!(priv->gpio_output_flag & BIT(offset));
249
+
}
250
+
251
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static int rt5133_get_gpioen_mask(unsigned int offset, unsigned int *mask)
252
+
{
253
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if (offset >= RT5133_GPIO_NR)
254
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return -EINVAL;
255
+
256
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*mask = (BIT(7 - offset) | BIT(3 - offset));
257
+
258
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return 0;
259
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}
260
+
261
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static int rt5133_gpio_set(struct gpio_chip *chip, unsigned int offset, int set_val)
262
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{
263
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struct rt5133_priv *priv = gpiochip_get_data(chip);
264
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unsigned int mask = 0, val = 0, next_flag = priv->gpio_output_flag;
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int ret = 0;
266
+
267
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ret = rt5133_get_gpioen_mask(offset, &mask);
268
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if (ret) {
269
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dev_err(priv->dev, "%s get gpion en mask failed, offset(%d)\n", __func__, offset);
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return ret;
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+
}
272
+
273
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val = set_val ? mask : 0;
274
+
275
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if (set_val)
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next_flag |= BIT(offset);
277
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else
278
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next_flag &= ~BIT(offset);
279
+
280
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ret = regmap_update_bits(priv->regmap, RT5133_REG_GPIO_CTRL, mask, val);
281
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if (ret) {
282
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dev_err(priv->dev, "Failed to set gpio [%d] val %d\n", offset,
283
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set_val);
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return ret;
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}
286
+
287
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priv->gpio_output_flag = next_flag;
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return 0;
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}
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+
291
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static irqreturn_t rt5133_intr_handler(int irq_number, void *data)
292
+
{
293
+
struct rt5133_priv *priv = data;
294
+
u32 intr_evts = 0, handle_evts;
295
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int i, ret;
296
+
297
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ret = regmap_bulk_read(priv->regmap, RT5133_REG_BASE_EVT, &intr_evts,
298
+
RT5133_INTR_BYTE_NR);
299
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if (ret) {
300
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dev_err(priv->dev, "%s, read event failed\n", __func__);
301
+
return IRQ_NONE;
302
+
}
303
+
304
+
handle_evts = intr_evts & RT5133_BASE_EVT_MASK;
305
+
/*
306
+
* VREF_EVT is a special case, if base off
307
+
* this event will also be trigger. Skip it
308
+
*/
309
+
if (handle_evts & ~RT5133_VREF_EVT_MASK)
310
+
dev_dbg(priv->dev, "base event occurred [0x%02x]\n",
311
+
handle_evts);
312
+
313
+
handle_evts = (intr_evts & RT5133_LDO_OC_EVT_MASK) >>
314
+
RT5133_LDO_OC_EVT_SHIFT;
315
+
316
+
for (i = RT5133_REGULATOR_LDO1; i < RT5133_REGULATOR_MAX && handle_evts; i++) {
317
+
if (!(handle_evts & BIT(i - 1)))
318
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continue;
319
+
regulator_notifier_call_chain(priv->rdev[i],
320
+
REGULATOR_EVENT_OVER_CURRENT,
321
+
&i);
322
+
}
323
+
324
+
handle_evts = (intr_evts & RT5133_LDO_PGB_EVT_MASK) >>
325
+
RT5133_LDO_PGB_EVT_SHIFT;
326
+
for (i = RT5133_REGULATOR_LDO1; i < RT5133_REGULATOR_MAX && handle_evts; i++) {
327
+
if (!(handle_evts & BIT(i - 1)))
328
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continue;
329
+
regulator_notifier_call_chain(priv->rdev[i],
330
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REGULATOR_EVENT_FAIL, &i);
331
+
}
332
+
333
+
ret = regmap_bulk_write(priv->regmap, RT5133_REG_BASE_EVT, &intr_evts,
334
+
RT5133_INTR_BYTE_NR);
335
+
if (ret)
336
+
dev_err(priv->dev, "%s, clear event failed\n", __func__);
337
+
338
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return IRQ_HANDLED;
339
+
}
340
+
341
+
static int rt5133_enable_interrupts(int irq_no, struct rt5133_priv *priv)
342
+
{
343
+
u32 mask = RT5133_INTR_CLR_MASK;
344
+
int ret;
345
+
346
+
/* Force to write clear all events */
347
+
ret = regmap_bulk_write(priv->regmap, RT5133_REG_BASE_EVT, &mask,
348
+
RT5133_INTR_BYTE_NR);
349
+
if (ret) {
350
+
dev_err(priv->dev, "Failed to clear all interrupts\n");
351
+
return ret;
352
+
}
353
+
354
+
/* Unmask all interrupts */
355
+
mask = 0;
356
+
ret = regmap_bulk_write(priv->regmap, RT5133_REG_BASE_MASK, &mask,
357
+
RT5133_INTR_BYTE_NR);
358
+
if (ret) {
359
+
dev_err(priv->dev, "Failed to unmask all interrupts\n");
360
+
return ret;
361
+
}
362
+
363
+
return devm_request_threaded_irq(priv->dev, irq_no, NULL,
364
+
rt5133_intr_handler, IRQF_ONESHOT,
365
+
dev_name(priv->dev), priv);
366
+
}
367
+
368
+
static int rt5133_regmap_hw_read(void *context, const void *reg_buf,
369
+
size_t reg_size, void *val_buf,
370
+
size_t val_size)
371
+
{
372
+
struct rt5133_priv *priv = context;
373
+
struct i2c_client *client = to_i2c_client(priv->dev);
374
+
u8 reg = *(u8 *)reg_buf, crc;
375
+
u8 *buf;
376
+
int buf_len = RT5133_PREDATA_LEN + val_size + RT5133_I2C_CRC_LEN;
377
+
int read_len, ret;
378
+
379
+
buf = kzalloc(buf_len, GFP_KERNEL);
380
+
if (!buf)
381
+
return -ENOMEM;
382
+
383
+
buf[0] = I2C_ADDR_XLATE_8BIT(client->addr, I2C_SMBUS_READ);
384
+
buf[1] = reg;
385
+
386
+
read_len = val_size + RT5133_I2C_CRC_LEN;
387
+
ret = i2c_smbus_read_i2c_block_data(client, reg, read_len,
388
+
buf + RT5133_PREDATA_LEN);
389
+
390
+
if (ret < 0)
391
+
goto out_read_err;
392
+
393
+
if (ret != read_len) {
394
+
ret = -EIO;
395
+
goto out_read_err;
396
+
}
397
+
398
+
crc = crc8(priv->crc8_tbls, buf, RT5133_PREDATA_LEN + val_size, 0);
399
+
if (crc != buf[RT5133_PREDATA_LEN + val_size]) {
400
+
ret = -EIO;
401
+
goto out_read_err;
402
+
}
403
+
404
+
memcpy(val_buf, buf + RT5133_PREDATA_LEN, val_size);
405
+
dev_dbg(priv->dev, "%s, reg = 0x%02x, data = 0x%02x\n", __func__, reg, *(u8 *)val_buf);
406
+
407
+
out_read_err:
408
+
kfree(buf);
409
+
return (ret < 0) ? ret : 0;
410
+
}
411
+
412
+
static int rt5133_regmap_hw_write(void *context, const void *data, size_t count)
413
+
{
414
+
struct rt5133_priv *priv = context;
415
+
struct i2c_client *client = to_i2c_client(priv->dev);
416
+
u8 reg = *(u8 *)data, crc;
417
+
u8 *buf;
418
+
int buf_len = RT5133_I2C_ADDR_LEN + count + RT5133_I2C_CRC_LEN +
419
+
RT5133_I2C_DUMMY_LEN;
420
+
int write_len, ret;
421
+
422
+
buf = kzalloc(buf_len, GFP_KERNEL);
423
+
if (!buf)
424
+
return -ENOMEM;
425
+
426
+
buf[0] = I2C_ADDR_XLATE_8BIT(client->addr, I2C_SMBUS_WRITE);
427
+
buf[1] = reg;
428
+
memcpy(buf + RT5133_PREDATA_LEN, data + RT5133_REG_ADDR_LEN,
429
+
count - RT5133_REG_ADDR_LEN);
430
+
431
+
crc = crc8(priv->crc8_tbls, buf, RT5133_I2C_ADDR_LEN + count, 0);
432
+
buf[RT5133_I2C_ADDR_LEN + count] = crc;
433
+
434
+
write_len = count - RT5133_REG_ADDR_LEN + RT5133_I2C_CRC_LEN +
435
+
RT5133_I2C_DUMMY_LEN;
436
+
ret = i2c_smbus_write_i2c_block_data(client, reg, write_len,
437
+
buf + RT5133_PREDATA_LEN);
438
+
439
+
dev_dbg(priv->dev, "%s, reg = 0x%02x, data = 0x%02x\n", __func__, reg,
440
+
*(u8 *)(buf + RT5133_PREDATA_LEN));
441
+
kfree(buf);
442
+
return ret;
443
+
}
444
+
445
+
static const struct regmap_bus rt5133_regmap_bus = {
446
+
.read = rt5133_regmap_hw_read,
447
+
.write = rt5133_regmap_hw_write,
448
+
/* Due to crc, the block read/write length has the limit */
449
+
.max_raw_read = RT5133_MAX_I2C_BLOCK_SIZE,
450
+
.max_raw_write = RT5133_MAX_I2C_BLOCK_SIZE,
451
+
};
452
+
453
+
static bool rt5133_is_volatile_reg(struct device *dev, unsigned int reg)
454
+
{
455
+
switch (reg) {
456
+
case RT5133_REG_CHIP_INFO:
457
+
case RT5133_REG_BASE_EVT...RT5133_REG_LDO_PGB_STAT:
458
+
case RT5133_REG_LDO_ON...RT5133_REG_LDO_OFF:
459
+
case RT5133_REG_LDO1_CTRL1:
460
+
case RT5133_REG_LDO2_CTRL1:
461
+
case RT5133_REG_LDO3_CTRL1:
462
+
case RT5133_REG_LDO4_CTRL1:
463
+
case RT5133_REG_LDO5_CTRL1:
464
+
case RT5133_REG_LDO6_CTRL1:
465
+
case RT5133_REG_LDO7_CTRL1:
466
+
case RT5133_REG_LDO8_CTRL1:
467
+
return true;
468
+
default:
469
+
return false;
470
+
};
471
+
}
472
+
473
+
static const struct regmap_config rt5133_regmap_config = {
474
+
.reg_bits = 8,
475
+
.val_bits = 8,
476
+
.max_register = RT5133_REG_LDO8_CTRL4,
477
+
.cache_type = REGCACHE_FLAT,
478
+
.num_reg_defaults_raw = RT5133_REG_LDO8_CTRL4 + 1,
479
+
.volatile_reg = rt5133_is_volatile_reg,
480
+
};
481
+
482
+
static int rt5133_chip_reset(struct rt5133_priv *priv)
483
+
{
484
+
int ret;
485
+
486
+
ret = regmap_write(priv->regmap, RT5133_REG_RST_CTRL,
487
+
RT5133_RESET_CODE);
488
+
if (ret)
489
+
return ret;
490
+
491
+
/* Wait for register reset to take effect */
492
+
udelay(2);
493
+
494
+
return 0;
495
+
}
496
+
497
+
static int rt5133_validate_vendor_info(struct rt5133_priv *priv)
498
+
{
499
+
unsigned int val = 0;
500
+
int i, ret;
501
+
502
+
ret = regmap_read(priv->regmap, RT5133_REG_CHIP_INFO, &val);
503
+
if (ret)
504
+
return ret;
505
+
506
+
for (i = 0; i < ARRAY_SIZE(regulator_data); i++) {
507
+
if ((val & RT5133_VENDOR_ID_MASK) ==
508
+
regulator_data[i].vendor_id){
509
+
priv->cdata = ®ulator_data[i];
510
+
break;
511
+
}
512
+
}
513
+
if (IS_ERR(priv->cdata)) {
514
+
dev_err(priv->dev, "Failed to find regualtor match version\n");
515
+
return -ENODEV;
516
+
}
517
+
518
+
return 0;
519
+
}
520
+
521
+
static int rt5133_parse_dt(struct rt5133_priv *priv)
522
+
{
523
+
unsigned int val = 0;
524
+
int ret = 0;
525
+
526
+
if (!device_property_read_bool(priv->dev, "richtek,oc-shutdown-all"))
527
+
val = 0;
528
+
else
529
+
val = 1 << RT5133_OCSHDN_ALL_SHIFT;
530
+
ret = regmap_update_bits(priv->regmap, RT5133_REG_LDO_SHDN,
531
+
RT5133_OCSHDN_ALL_MASK, val);
532
+
if (ret)
533
+
return ret;
534
+
535
+
if (!device_property_read_bool(priv->dev, "richtek,pgb-shutdown-all"))
536
+
val = 0;
537
+
else
538
+
val = 1 << RT5133_PGBSHDN_ALL_SHIFT;
539
+
return regmap_update_bits(priv->regmap, RT5133_REG_LDO_SHDN,
540
+
RT5133_PGBSHDN_ALL_MASK, val);
541
+
}
542
+
543
+
static int rt5133_probe(struct i2c_client *i2c)
544
+
{
545
+
struct rt5133_priv *priv;
546
+
struct regulator_config config = {0};
547
+
int i, ret;
548
+
549
+
priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL);
550
+
if (!priv)
551
+
return -ENOMEM;
552
+
553
+
priv->dev = &i2c->dev;
554
+
crc8_populate_msb(priv->crc8_tbls, RT5133_CRC8_POLYNOMIAL);
555
+
556
+
priv->enable_gpio = devm_gpiod_get_optional(&i2c->dev, "enable",
557
+
GPIOD_OUT_HIGH);
558
+
if (IS_ERR(priv->enable_gpio))
559
+
dev_err(&i2c->dev, "Failed to request HWEN gpio, check if default en=high\n");
560
+
561
+
priv->regmap = devm_regmap_init(&i2c->dev, &rt5133_regmap_bus, priv,
562
+
&rt5133_regmap_config);
563
+
if (IS_ERR(priv->regmap)) {
564
+
dev_err(&i2c->dev, "Failed to register regmap\n");
565
+
return PTR_ERR(priv->regmap);
566
+
}
567
+
568
+
ret = rt5133_validate_vendor_info(priv);
569
+
if (ret) {
570
+
dev_err(&i2c->dev, "Failed to check vendor info [%d]\n", ret);
571
+
return ret;
572
+
}
573
+
574
+
ret = rt5133_chip_reset(priv);
575
+
if (ret) {
576
+
dev_err(&i2c->dev, "Failed to execute sw reset\n");
577
+
return ret;
578
+
}
579
+
580
+
config.dev = &i2c->dev;
581
+
config.driver_data = priv;
582
+
config.regmap = priv->regmap;
583
+
584
+
for (i = 0; i < RT5133_REGULATOR_MAX; i++) {
585
+
priv->rdev[i] = devm_regulator_register(&i2c->dev,
586
+
priv->cdata->regulators + i,
587
+
&config);
588
+
if (IS_ERR(priv->rdev[i])) {
589
+
dev_err(&i2c->dev,
590
+
"Failed to register [%d] regulator\n", i);
591
+
return PTR_ERR(priv->rdev[i]);
592
+
}
593
+
}
594
+
595
+
ret = rt5133_parse_dt(priv);
596
+
if (ret) {
597
+
dev_err(&i2c->dev, "%s, Failed to parse dt\n", __func__);
598
+
return ret;
599
+
}
600
+
601
+
priv->gc.label = dev_name(&i2c->dev);
602
+
priv->gc.parent = &i2c->dev;
603
+
priv->gc.base = -1;
604
+
priv->gc.ngpio = RT5133_GPIO_NR;
605
+
priv->gc.set = rt5133_gpio_set;
606
+
priv->gc.get = rt5133_gpio_get;
607
+
priv->gc.direction_output = rt5133_gpio_direction_output;
608
+
priv->gc.can_sleep = true;
609
+
610
+
ret = devm_gpiochip_add_data(&i2c->dev, &priv->gc, priv);
611
+
if (ret)
612
+
return ret;
613
+
614
+
ret = rt5133_enable_interrupts(i2c->irq, priv);
615
+
if (ret) {
616
+
dev_err(&i2c->dev, "enable interrupt failed\n");
617
+
return ret;
618
+
}
619
+
620
+
i2c_set_clientdata(i2c, priv);
621
+
622
+
return ret;
623
+
}
624
+
625
+
static const struct of_device_id __maybe_unused rt5133_of_match_table[] = {
626
+
{ .compatible = "richtek,rt5133", },
627
+
{ }
628
+
};
629
+
MODULE_DEVICE_TABLE(of, rt5133_of_match_table);
630
+
631
+
static struct i2c_driver rt5133_driver = {
632
+
.driver = {
633
+
.name = "rt5133",
634
+
.probe_type = PROBE_PREFER_ASYNCHRONOUS,
635
+
.of_match_table = rt5133_of_match_table,
636
+
},
637
+
.probe = rt5133_probe,
638
+
};
639
+
module_i2c_driver(rt5133_driver);
640
+
641
+
MODULE_DESCRIPTION("RT5133 Regulator Driver");
642
+
MODULE_LICENSE("GPL v2");