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Merge tag 'timers_urgent_for_v6.1_rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull timer fix from Borislav Petkov:

- Return the proper timer register width (31 bits) for a 32-bit signed
register in order to avoid a timer interrupt storm on ARM XGene-1
hardware running in NO_HZ mode

* tag 'timers_urgent_for_v6.1_rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
clocksource/drivers/arm_arch_timer: Fix XGene-1 TVAL register math error

+5 -2
+5 -2
drivers/clocksource/arm_arch_timer.c
··· 806 806 /* 807 807 * XGene-1 implements CVAL in terms of TVAL, meaning 808 808 * that the maximum timer range is 32bit. Shame on them. 809 + * 810 + * Note that TVAL is signed, thus has only 31 of its 811 + * 32 bits to express magnitude. 809 812 */ 810 813 MIDR_ALL_VERSIONS(MIDR_CPU_MODEL(ARM_CPU_IMP_APM, 811 814 APM_CPU_PART_POTENZA)), ··· 816 813 }; 817 814 818 815 if (is_midr_in_range_list(read_cpuid_id(), broken_cval_midrs)) { 819 - pr_warn_once("Broken CNTx_CVAL_EL1, limiting width to 32bits"); 820 - return CLOCKSOURCE_MASK(32); 816 + pr_warn_once("Broken CNTx_CVAL_EL1, using 31 bit TVAL instead.\n"); 817 + return CLOCKSOURCE_MASK(31); 821 818 } 822 819 #endif 823 820 return CLOCKSOURCE_MASK(arch_counter_get_width());