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Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm:
ARM: 6205/1: perf: ensure counter delta is treated as unsigned
ARM: 6202/1: Do not ARM_DMA_MEM_BUFFERABLE on RealView boards with L210/L220
ARM: 6201/1: RealView: Do not use outer_sync() on ARM11MPCore boards with L220
ARM: 6195/1: OMAP3: pmu: make CPU_HAS_PMU dependent on OMAP3_EMU
ARM: 6194/1: change definition of cpu_relax() for ARM11MPCore
ARM: 6193/1: RealView: Align the machine_desc.phys_io to 1MB section
ARM: 6192/1: VExpress: Align the machine_desc.phys_io to 1MB section
ARM: 6188/1: Add a config option for the ARM11MPCore DMA cache maintenance workaround
ARM: 6187/1: The v6_dma_inv_range() function must preserve data on SMP
ARM: 6186/1: Avoid the CONSISTENT_DMA_SIZE warning on noMMU builds
ARM: mx3: mx31lilly: fix build error for !CONFIG_USB_ULPI
[ARM] mmp: fix build failure due to IRQ_PMU depends on ARCH_PXA
[ARM] pxa/mioa701: fix camera regression
[ARM] pxa/z2: fix flash layout to final version
[ARM] pxa/z2: fix missing include in battery driver
[ARM] pxa: fix incorrect gpio type in udc_pxa2xx.h

+113 -61
+2 -1
arch/arm/Kconfig
··· 955 955 default y 956 956 957 957 config CPU_HAS_PMU 958 - depends on CPU_V6 || CPU_V7 || XSCALE_PMU 958 + depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \ 959 + (!ARCH_OMAP3 || OMAP3_EMU) 959 960 default y 960 961 bool 961 962
+2 -2
arch/arm/include/asm/mach/udc_pxa2xx.h
··· 21 21 * here. Note that sometimes the signals go through inverters... 22 22 */ 23 23 bool gpio_vbus_inverted; 24 - u16 gpio_vbus; /* high == vbus present */ 24 + int gpio_vbus; /* high == vbus present */ 25 25 bool gpio_pullup_inverted; 26 - u16 gpio_pullup; /* high == pullup activated */ 26 + int gpio_pullup; /* high == pullup activated */ 27 27 }; 28 28
+4
arch/arm/include/asm/processor.h
··· 91 91 92 92 unsigned long get_wchan(struct task_struct *p); 93 93 94 + #if __LINUX_ARM_ARCH__ == 6 95 + #define cpu_relax() smp_mb() 96 + #else 94 97 #define cpu_relax() barrier() 98 + #endif 95 99 96 100 /* 97 101 * Create a new kernel thread
+1 -1
arch/arm/kernel/perf_event.c
··· 201 201 { 202 202 int shift = 64 - 32; 203 203 s64 prev_raw_count, new_raw_count; 204 - s64 delta; 204 + u64 delta; 205 205 206 206 again: 207 207 prev_raw_count = atomic64_read(&hwc->prev_count);
+22 -11
arch/arm/mach-mx3/mach-mx31lilly.c
··· 115 115 116 116 /* USB */ 117 117 118 + #if defined(CONFIG_USB_ULPI) 119 + 118 120 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ 119 121 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) 120 122 ··· 246 244 .flags = MXC_EHCI_POWER_PINS_ENABLED, 247 245 }; 248 246 249 - static struct platform_device *devices[] __initdata = { 250 - &smsc91x_device, 251 - &physmap_flash_device, 252 - }; 247 + static void lilly1131_usb_init(void) 248 + { 249 + usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 250 + USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); 251 + usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 252 + USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); 253 + 254 + mxc_register_device(&mxc_usbh1, &usbh1_pdata); 255 + mxc_register_device(&mxc_usbh2, &usbh2_pdata); 256 + } 257 + 258 + #else 259 + static inline void lilly1131_usb_init(void) {} 260 + #endif /* CONFIG_USB_ULPI */ 253 261 254 262 /* SPI */ 255 263 ··· 289 277 .bus_num = 1, 290 278 .chip_select = 0, 291 279 .platform_data = &mc13783_pdata, 280 + }; 281 + 282 + static struct platform_device *devices[] __initdata = { 283 + &smsc91x_device, 284 + &physmap_flash_device, 292 285 }; 293 286 294 287 static int mx31lilly_baseboard; ··· 338 321 platform_add_devices(devices, ARRAY_SIZE(devices)); 339 322 340 323 /* USB */ 341 - usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 342 - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); 343 - usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, 344 - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); 345 - 346 - mxc_register_device(&mxc_usbh1, &usbh1_pdata); 347 - mxc_register_device(&mxc_usbh2, &usbh2_pdata); 324 + lilly1131_usb_init(); 348 325 } 349 326 350 327 static void __init mx31lilly_timer_init(void)
+1 -1
arch/arm/mach-pxa/mioa701.c
··· 697 697 }; 698 698 699 699 /* Board I2C devices. */ 700 - static struct i2c_board_info __initdata mioa701_i2c_devices[] = { 700 + static struct i2c_board_info mioa701_i2c_devices[] = { 701 701 { 702 702 I2C_BOARD_INFO("mt9m111", 0x5d), 703 703 },
+10 -16
arch/arm/mach-pxa/z2.c
··· 3 3 * 4 4 * Support for the Zipit Z2 Handheld device. 5 5 * 6 - * Author: Ken McGuire 7 - * Created: Jan 25, 2009 6 + * Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com> 7 + * 8 + * Based on research and code by: Ken McGuire 8 9 * Based on mainstone.c as modified for the Zipit Z2. 9 10 * 10 11 * This program is free software; you can redistribute it and/or modify ··· 158 157 { 159 158 .name = "U-Boot Bootloader", 160 159 .offset = 0x0, 161 - .size = 0x20000, 162 - }, 163 - { 164 - .name = "Linux Kernel", 165 - .offset = 0x20000, 166 - .size = 0x220000, 167 - }, 168 - { 169 - .name = "Filesystem", 170 - .offset = 0x240000, 171 - .size = 0x5b0000, 172 - }, 173 - { 160 + .size = 0x40000, 161 + }, { 174 162 .name = "U-Boot Environment", 175 - .offset = 0x7f0000, 163 + .offset = 0x40000, 164 + .size = 0x60000, 165 + }, { 166 + .name = "Flash", 167 + .offset = 0x60000, 176 168 .size = MTDPART_SIZ_FULL, 177 169 }, 178 170 };
+2
arch/arm/mach-realview/Kconfig
··· 18 18 bool "Support ARM11MPCore tile" 19 19 depends on MACH_REALVIEW_EB 20 20 select CPU_V6 21 + select ARCH_HAS_BARRIERS if SMP 21 22 help 22 23 Enable support for the ARM11MPCore tile on the Realview platform. 23 24 ··· 36 35 select CPU_V6 37 36 select ARM_GIC 38 37 select HAVE_PATA_PLATFORM 38 + select ARCH_HAS_BARRIERS if SMP 39 39 help 40 40 Include support for the ARM(R) RealView MPCore Platform Baseboard. 41 41 PB11MPCore is a platform with an on-board ARM11MPCore and has
+8
arch/arm/mach-realview/include/mach/barriers.h
··· 1 + /* 2 + * Barriers redefined for RealView ARM11MPCore platforms with L220 cache 3 + * controller to work around hardware errata causing the outer_sync() 4 + * operation to deadlock the system. 5 + */ 6 + #define mb() dsb() 7 + #define rmb() dmb() 8 + #define wmb() mb()
+2 -1
arch/arm/mach-realview/realview_eb.c
··· 32 32 #include <asm/leds.h> 33 33 #include <asm/mach-types.h> 34 34 #include <asm/pmu.h> 35 + #include <asm/pgtable.h> 35 36 #include <asm/hardware/gic.h> 36 37 #include <asm/hardware/cache-l2x0.h> 37 38 #include <asm/localtimer.h> ··· 458 457 459 458 MACHINE_START(REALVIEW_EB, "ARM-RealView EB") 460 459 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 461 - .phys_io = REALVIEW_EB_UART0_BASE, 460 + .phys_io = REALVIEW_EB_UART0_BASE & SECTION_MASK, 462 461 .io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc, 463 462 .boot_params = PHYS_OFFSET + 0x00000100, 464 463 .fixup = realview_fixup,
+2 -1
arch/arm/mach-realview/realview_pb1176.c
··· 32 32 #include <asm/leds.h> 33 33 #include <asm/mach-types.h> 34 34 #include <asm/pmu.h> 35 + #include <asm/pgtable.h> 35 36 #include <asm/hardware/gic.h> 36 37 #include <asm/hardware/cache-l2x0.h> 37 38 ··· 352 351 353 352 MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") 354 353 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 355 - .phys_io = REALVIEW_PB1176_UART0_BASE, 354 + .phys_io = REALVIEW_PB1176_UART0_BASE & SECTION_MASK, 356 355 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc, 357 356 .boot_params = PHYS_OFFSET + 0x00000100, 358 357 .fixup = realview_pb1176_fixup,
+2 -1
arch/arm/mach-realview/realview_pb11mp.c
··· 32 32 #include <asm/leds.h> 33 33 #include <asm/mach-types.h> 34 34 #include <asm/pmu.h> 35 + #include <asm/pgtable.h> 35 36 #include <asm/hardware/gic.h> 36 37 #include <asm/hardware/cache-l2x0.h> 37 38 #include <asm/localtimer.h> ··· 374 373 375 374 MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") 376 375 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 377 - .phys_io = REALVIEW_PB11MP_UART0_BASE, 376 + .phys_io = REALVIEW_PB11MP_UART0_BASE & SECTION_MASK, 378 377 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc, 379 378 .boot_params = PHYS_OFFSET + 0x00000100, 380 379 .fixup = realview_fixup,
+2 -1
arch/arm/mach-realview/realview_pba8.c
··· 31 31 #include <asm/leds.h> 32 32 #include <asm/mach-types.h> 33 33 #include <asm/pmu.h> 34 + #include <asm/pgtable.h> 34 35 #include <asm/hardware/gic.h> 35 36 36 37 #include <asm/mach/arch.h> ··· 324 323 325 324 MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") 326 325 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 327 - .phys_io = REALVIEW_PBA8_UART0_BASE, 326 + .phys_io = REALVIEW_PBA8_UART0_BASE & SECTION_MASK, 328 327 .io_pg_offst = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc, 329 328 .boot_params = PHYS_OFFSET + 0x00000100, 330 329 .fixup = realview_fixup,
+2 -1
arch/arm/mach-realview/realview_pbx.c
··· 31 31 #include <asm/mach-types.h> 32 32 #include <asm/pmu.h> 33 33 #include <asm/smp_twd.h> 34 + #include <asm/pgtable.h> 34 35 #include <asm/hardware/gic.h> 35 36 #include <asm/hardware/cache-l2x0.h> 36 37 ··· 410 409 411 410 MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") 412 411 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 413 - .phys_io = REALVIEW_PBX_UART0_BASE, 412 + .phys_io = REALVIEW_PBX_UART0_BASE & SECTION_MASK, 414 413 .io_pg_offst = (IO_ADDRESS(REALVIEW_PBX_UART0_BASE) >> 18) & 0xfffc, 415 414 .boot_params = PHYS_OFFSET + 0x00000100, 416 415 .fixup = realview_pbx_fixup,
+2 -1
arch/arm/mach-vexpress/ct-ca9x4.c
··· 10 10 #include <linux/amba/clcd.h> 11 11 12 12 #include <asm/clkdev.h> 13 + #include <asm/pgtable.h> 13 14 #include <asm/hardware/arm_timer.h> 14 15 #include <asm/hardware/cache-l2x0.h> 15 16 #include <asm/hardware/gic.h> ··· 237 236 } 238 237 239 238 MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4") 240 - .phys_io = V2M_UART0, 239 + .phys_io = V2M_UART0 & SECTION_MASK, 241 240 .io_pg_offst = (__MMIO_P2V(V2M_UART0) >> 18) & 0xfffc, 242 241 .boot_params = PHYS_OFFSET + 0x00000100, 243 242 .map_io = ct_ca9x4_map_io,
+21
arch/arm/mm/Kconfig
··· 735 735 Forget about fast user space cmpxchg support. 736 736 It is just not possible. 737 737 738 + config DMA_CACHE_RWFO 739 + bool "Enable read/write for ownership DMA cache maintenance" 740 + depends on CPU_V6 && SMP 741 + default y 742 + help 743 + The Snoop Control Unit on ARM11MPCore does not detect the 744 + cache maintenance operations and the dma_{map,unmap}_area() 745 + functions may leave stale cache entries on other CPUs. By 746 + enabling this option, Read or Write For Ownership in the ARMv6 747 + DMA cache maintenance functions is performed. These LDR/STR 748 + instructions change the cache line state to shared or modified 749 + so that the cache operation has the desired effect. 750 + 751 + Note that the workaround is only valid on processors that do 752 + not perform speculative loads into the D-cache. For such 753 + processors, if cache maintenance operations are not broadcast 754 + in hardware, other workarounds are needed (e.g. cache 755 + maintenance broadcasting in software via FIQ). 756 + 738 757 config OUTER_CACHE 739 758 bool 740 759 ··· 813 794 814 795 config ARM_DMA_MEM_BUFFERABLE 815 796 bool "Use non-cacheable memory for DMA" if CPU_V6 && !CPU_V7 797 + depends on !(MACH_REALVIEW_PB1176 || REALVIEW_EB_ARM11MP || \ 798 + MACH_REALVIEW_PB11MP) 816 799 default y if CPU_V6 || CPU_V7 817 800 help 818 801 Historically, the kernel has used strongly ordered mappings to
+14 -4
arch/arm/mm/cache-v6.S
··· 211 211 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line 212 212 #endif 213 213 1: 214 - #ifdef CONFIG_SMP 215 - str r0, [r0] @ write for ownership 214 + #ifdef CONFIG_DMA_CACHE_RWFO 215 + ldr r2, [r0] @ read for ownership 216 + str r2, [r0] @ write for ownership 216 217 #endif 217 218 #ifdef HARVARD_CACHE 218 219 mcr p15, 0, r0, c7, c6, 1 @ invalidate D line ··· 235 234 v6_dma_clean_range: 236 235 bic r0, r0, #D_CACHE_LINE_SIZE - 1 237 236 1: 238 - #ifdef CONFIG_SMP 237 + #ifdef CONFIG_DMA_CACHE_RWFO 239 238 ldr r2, [r0] @ read for ownership 240 239 #endif 241 240 #ifdef HARVARD_CACHE ··· 258 257 ENTRY(v6_dma_flush_range) 259 258 bic r0, r0, #D_CACHE_LINE_SIZE - 1 260 259 1: 261 - #ifdef CONFIG_SMP 260 + #ifdef CONFIG_DMA_CACHE_RWFO 262 261 ldr r2, [r0] @ read for ownership 263 262 str r2, [r0] @ write for ownership 264 263 #endif ··· 284 283 add r1, r1, r0 285 284 teq r2, #DMA_FROM_DEVICE 286 285 beq v6_dma_inv_range 286 + #ifndef CONFIG_DMA_CACHE_RWFO 287 + b v6_dma_clean_range 288 + #else 287 289 teq r2, #DMA_TO_DEVICE 288 290 beq v6_dma_clean_range 289 291 b v6_dma_flush_range 292 + #endif 290 293 ENDPROC(v6_dma_map_area) 291 294 292 295 /* ··· 300 295 * - dir - DMA direction 301 296 */ 302 297 ENTRY(v6_dma_unmap_area) 298 + #ifndef CONFIG_DMA_CACHE_RWFO 299 + add r1, r1, r0 300 + teq r2, #DMA_TO_DEVICE 301 + bne v6_dma_inv_range 302 + #endif 303 303 mov pc, lr 304 304 ENDPROC(v6_dma_unmap_area) 305 305
+9 -9
arch/arm/mm/dma-mapping.c
··· 24 24 #include <asm/tlbflush.h> 25 25 #include <asm/sizes.h> 26 26 27 - /* Sanity check size */ 28 - #if (CONSISTENT_DMA_SIZE % SZ_2M) 29 - #error "CONSISTENT_DMA_SIZE must be multiple of 2MiB" 30 - #endif 31 - 32 - #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT) 33 - #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT) 34 - #define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT) 35 - 36 27 static u64 get_coherent_dma_mask(struct device *dev) 37 28 { 38 29 u64 mask = ISA_DMA_THRESHOLD; ··· 114 123 } 115 124 116 125 #ifdef CONFIG_MMU 126 + /* Sanity check size */ 127 + #if (CONSISTENT_DMA_SIZE % SZ_2M) 128 + #error "CONSISTENT_DMA_SIZE must be multiple of 2MiB" 129 + #endif 130 + 131 + #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT) 132 + #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT) 133 + #define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT) 134 + 117 135 /* 118 136 * These are the page tables (2MB each) covering uncached, DMA consistent allocations 119 137 */
+2 -1
arch/arm/plat-pxa/Makefile
··· 2 2 # Makefile for code common across different PXA processor families 3 3 # 4 4 5 - obj-y := dma.o pmu.o 5 + obj-y := dma.o 6 6 7 + obj-$(CONFIG_ARCH_PXA) += pmu.o 7 8 obj-$(CONFIG_GENERIC_GPIO) += gpio.o 8 9 obj-$(CONFIG_PXA3xx) += mfp.o 9 10 obj-$(CONFIG_ARCH_MMP) += mfp.o
+3 -9
drivers/power/z2_battery.c
··· 9 9 * 10 10 */ 11 11 12 - #include <linux/init.h> 13 - #include <linux/kernel.h> 14 12 #include <linux/module.h> 15 - #include <linux/platform_device.h> 16 - #include <linux/power_supply.h> 17 - #include <linux/i2c.h> 18 - #include <linux/spinlock.h> 19 - #include <linux/interrupt.h> 20 13 #include <linux/gpio.h> 14 + #include <linux/i2c.h> 21 15 #include <linux/interrupt.h> 22 16 #include <linux/irq.h> 23 - #include <asm/irq.h> 24 - #include <asm/mach/irq.h> 17 + #include <linux/power_supply.h> 18 + #include <linux/slab.h> 25 19 #include <linux/z2_battery.h> 26 20 27 21 #define Z2_DEFAULT_NAME "Z2"