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regulator: dt-bindings: add s2mpg10-pmic regulators

The S2MPG10 PMIC is a Power Management IC for mobile applications with
buck converters, various LDOs, power meters, RTC, clock outputs, and
additional GPIO interfaces.

It has 10 buck and 31 LDO rails. Several of these can either be
controlled via software (register writes) or via external signals, in
particular by:
* one out of several input pins connected to a main processor's:
* GPIO pins
* other pins that are e.g. firmware- or power-domain-controlled
without explicit driver intervention
* a combination of input pins and register writes.

Control via input pins allows PMIC rails to be controlled by firmware,
e.g. during standby/suspend, or as part of power domain handling where
otherwise that would not be possible. Additionally toggling a pin is
faster than register writes, and it also allows the PMIC to ensure that
any necessary timing requirements between rails are respected
automatically if multiple rails are to be enabled or disabled quasi
simultaneously.

While external control via input pins appears to exist on other
versions of this PMIC, there is more flexibility in this version, in
particular there is a selection of input pins to choose from for each
rail (which must therefore be configured accordingly if in use),
whereas other versions don't have this flexibility.

Add documentation related to the regulator (buck & ldo) parts like
devicetree definitions, regulator naming patterns, and additional
properties.

S2MPG10 is typically used as the main-PMIC together with an S2MPG11
PMIC in a main/sub configuration, hence the datasheet and the binding
both suffix the rails with an 'm'.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-2-3b1f9831fffd@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

André Draszik and committed by
Mark Brown
71bc6ada e4691f35

+198
+158
Documentation/devicetree/bindings/regulator/samsung,s2mpg10-regulator.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/regulator/samsung,s2mpg10-regulator.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Samsung S2MPG10 Power Management IC regulators 8 + 9 + maintainers: 10 + - André Draszik <andre.draszik@linaro.org> 11 + 12 + description: | 13 + This is part of the device tree bindings for the S2MG10 Power Management IC 14 + (PMIC). 15 + 16 + The S2MPG10 PMIC provides 10 buck and 31 LDO regulators. 17 + 18 + See also Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml for 19 + additional information and example. 20 + 21 + properties: 22 + # 1 LDO with possible (but limited) external control 23 + ldo20m: 24 + type: object 25 + $ref: regulator.yaml# 26 + unevaluatedProperties: false 27 + description: 28 + Properties for a single LDO regulator. 29 + 30 + allOf: 31 + - $ref: "#/$defs/s2mpg10-ext-control" 32 + 33 + properties: 34 + regulator-ramp-delay: false 35 + 36 + samsung,ext-control: 37 + minimum: 11 38 + 39 + patternProperties: 40 + # 10 bucks 41 + "^buck([1-9]|10)m$": 42 + type: object 43 + $ref: regulator.yaml# 44 + unevaluatedProperties: false 45 + description: 46 + Properties for a single buck regulator. 47 + 48 + allOf: 49 + - $ref: "#/$defs/s2mpg10-ext-control" 50 + 51 + properties: 52 + regulator-ramp-delay: 53 + enum: [6250, 12500, 25000] 54 + default: 6250 55 + 56 + samsung,ext-control: 57 + maximum: 10 58 + 59 + # 12 standard LDOs 60 + "^ldo(2[1-9]?|3[0-1])m$": 61 + type: object 62 + $ref: regulator.yaml# 63 + unevaluatedProperties: false 64 + description: 65 + Properties for single LDO regulator. 66 + 67 + properties: 68 + regulator-ramp-delay: false 69 + 70 + # 12 LDOs with possible external control 71 + "^ldo([3-689]|1[046-9])m$": 72 + type: object 73 + $ref: regulator.yaml# 74 + unevaluatedProperties: false 75 + description: 76 + Properties for a single LDO regulator. 77 + 78 + allOf: 79 + - $ref: "#/$defs/s2mpg10-ext-control" 80 + 81 + properties: 82 + regulator-ramp-delay: false 83 + 84 + samsung,ext-control: 85 + maximum: 10 86 + 87 + # 6 LDOs with ramp support, 5 out of those with possible external control 88 + "^ldo(1[1235]?|7)m$": 89 + type: object 90 + $ref: regulator.yaml# 91 + unevaluatedProperties: false 92 + description: 93 + Properties for a single LDO regulator. 94 + 95 + allOf: 96 + - $ref: "#/$defs/s2mpg10-ext-control" 97 + 98 + properties: 99 + regulator-ramp-delay: 100 + enum: [6250, 12500] 101 + default: 6250 102 + 103 + samsung,ext-control: 104 + maximum: 10 105 + 106 + $defs: 107 + s2mpg10-ext-control: 108 + properties: 109 + samsung,ext-control: 110 + description: | 111 + These rails can be controlled via one of several possible external 112 + (hardware) signals. If so, this property configures the signal the PMIC 113 + should monitor. For S2MPG10 rails where external control is possible other 114 + than ldo20m, the following values generally corresponding to the 115 + respective on-chip pin are valid: 116 + - 0 # S2MPG10_EXTCTRL_PWREN - PWREN pin 117 + - 1 # S2MPG10_EXTCTRL_PWREN_MIF - PWREN_MIF pin 118 + - 2 # S2MPG10_EXTCTRL_AP_ACTIVE_N - ~AP_ACTIVE_N pin 119 + - 3 # S2MPG10_EXTCTRL_CPUCL1_EN - CPUCL1_EN pin 120 + - 4 # S2MPG10_EXTCTRL_CPUCL1_EN2 - CPUCL1_EN & PWREN pins 121 + - 5 # S2MPG10_EXTCTRL_CPUCL2_EN - CPUCL2_EN pin 122 + - 6 # S2MPG10_EXTCTRL_CPUCL2_EN2 - CPUCL2_E2 & PWREN pins 123 + - 7 # S2MPG10_EXTCTRL_TPU_EN - TPU_EN pin 124 + - 8 # S2MPG10_EXTCTRL_TPU_EN2 - TPU_EN & ~AP_ACTIVE_N pins 125 + - 9 # S2MPG10_EXTCTRL_TCXO_ON - TCXO_ON pin 126 + - 10 # S2MPG10_EXTCTRL_TCXO_ON2 - TCXO_ON & ~AP_ACTIVE_N pins 127 + 128 + For S2MPG10 ldo20m, the following values are valid 129 + - 11 # S2MPG10_EXTCTRL_LDO20M_EN2 - VLDO20M_EN & LDO20M_SFR 130 + - 12 # S2MPG10_EXTCTRL_LDO20M_EN - VLDO20M_EN pin 131 + 132 + $ref: /schemas/types.yaml#/definitions/uint32 133 + minimum: 0 134 + maximum: 12 135 + 136 + enable-gpios: 137 + description: 138 + For rails where external control is done via a GPIO, this optional 139 + property describes the GPIO line used. 140 + 141 + dependentRequired: 142 + enable-gpios: [ "samsung,ext-control" ] 143 + 144 + allOf: 145 + # Bucks 8, 9, and LDO 1 can not be controlled externally - above definition 146 + # allows it and we deny it here. This approach reduces repetition. 147 + - if: 148 + anyOf: 149 + - required: [buck8m] 150 + - required: [buck9m] 151 + - required: [ldo1m] 152 + then: 153 + patternProperties: 154 + "^(buck[8-9]|ldo1)m$": 155 + properties: 156 + samsung,ext-control: false 157 + 158 + additionalProperties: false
+1
MAINTAINERS
··· 23239 23239 F: drivers/regulator/s2*.c 23240 23240 F: drivers/regulator/s5m*.c 23241 23241 F: drivers/rtc/rtc-s5m.c 23242 + F: include/dt-bindings/regulator/samsung,s2m*.h 23242 23243 F: include/linux/mfd/samsung/ 23243 23244 23244 23245 SAMSUNG S3C24XX/S3C64XX SOC SERIES CAMIF DRIVER
+39
include/dt-bindings/regulator/samsung,s2mpg10-regulator.h
··· 1 + /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 + /* 3 + * Copyright 2021 Google LLC 4 + * Copyright 2025 Linaro Ltd. 5 + * 6 + * Device Tree binding constants for the Samsung S2MPG1x PMIC regulators 7 + */ 8 + 9 + #ifndef _DT_BINDINGS_REGULATOR_SAMSUNG_S2MPG10_H 10 + #define _DT_BINDINGS_REGULATOR_SAMSUNG_S2MPG10_H 11 + 12 + /* 13 + * Several regulators may be controlled via external signals instead of via 14 + * software. These constants describe the possible signals for such regulators 15 + * and generally correspond to the respecitve on-chip pins. 16 + * 17 + * S2MPG10 regulators supporting these are: 18 + * - buck1m .. buck7m buck10m 19 + * - ldo3m .. ldo19m 20 + * 21 + * ldo20m supports external control, but using a different set of control 22 + * signals. 23 + */ 24 + #define S2MPG10_EXTCTRL_PWREN 0 /* PWREN pin */ 25 + #define S2MPG10_EXTCTRL_PWREN_MIF 1 /* PWREN_MIF pin */ 26 + #define S2MPG10_EXTCTRL_AP_ACTIVE_N 2 /* ~AP_ACTIVE_N pin */ 27 + #define S2MPG10_EXTCTRL_CPUCL1_EN 3 /* CPUCL1_EN pin */ 28 + #define S2MPG10_EXTCTRL_CPUCL1_EN2 4 /* CPUCL1_EN & PWREN pins */ 29 + #define S2MPG10_EXTCTRL_CPUCL2_EN 5 /* CPUCL2_EN pin */ 30 + #define S2MPG10_EXTCTRL_CPUCL2_EN2 6 /* CPUCL2_E2 & PWREN pins */ 31 + #define S2MPG10_EXTCTRL_TPU_EN 7 /* TPU_EN pin */ 32 + #define S2MPG10_EXTCTRL_TPU_EN2 8 /* TPU_EN & ~AP_ACTIVE_N pins */ 33 + #define S2MPG10_EXTCTRL_TCXO_ON 9 /* TCXO_ON pin */ 34 + #define S2MPG10_EXTCTRL_TCXO_ON2 10 /* TCXO_ON & ~AP_ACTIVE_N pins */ 35 + 36 + #define S2MPG10_EXTCTRL_LDO20M_EN2 11 /* VLDO20M_EN & LDO20M_SFR */ 37 + #define S2MPG10_EXTCTRL_LDO20M_EN 12 /* VLDO20M_EN pin */ 38 + 39 + #endif /* _DT_BINDINGS_REGULATOR_SAMSUNG_S2MPG10_H */