Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
arm64: dts: renesas: rzg2l-smarc: Add common dtsi file
RZ/{G2L,V2L} and G2LC SoC use the same carrier board, but the SoM is
different.
Different pin mapping is possible on SoM. For eg:- RZ/G2L SMARC EVK
uses SCIF2, whereas RZ/G2LC uses SCIF1 for the serial interface available
on PMOD1.
This patch adds support for handling the pin mapping differences by moving
definitions common to RZ/G2L and RZ/G2LC to a common dtsi file.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
authored by
Biju Das
and committed by
Geert Uytterhoeven
726fd781
81a27b1f
+210
-201
+1
-8
arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts
+1
-8
arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts
···
9
9
#include "r9a07g044c2.dtsi"
10
10
#include "rzg2lc-smarc-som.dtsi"
11
11
#include "rzg2lc-smarc-pinfunction.dtsi"
12
-
#include "rzg2l-smarc.dtsi"
12
+
#include "rz-smarc-common.dtsi"
13
13
14
14
/ {
15
15
model = "Renesas SMARC EVK based on r9a07g044c2";
16
16
compatible = "renesas,smarc-evk", "renesas,r9a07g044c2", "renesas,r9a07g044";
17
-
18
17
};
19
18
20
19
&canfd {
···
71
72
};
72
73
73
74
&phyrst {
74
-
status = "disabled";
75
-
};
76
-
77
-
&scif2 {
78
-
/delete-property/ pinctrl-0;
79
-
/delete-property/ pinctrl-names;
80
75
status = "disabled";
81
76
};
82
77
+1
arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts
+1
arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts
+1
arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts
+1
arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts
+207
arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi
+207
arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi
···
1
+
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
/*
3
+
* Device Tree Source for the RZ/{G2L,G2LC,V2L} SMARC EVK common parts
4
+
*
5
+
* Copyright (C) 2022 Renesas Electronics Corp.
6
+
*/
7
+
8
+
#include <dt-bindings/gpio/gpio.h>
9
+
#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
10
+
11
+
/*
12
+
* SSI-WM8978
13
+
*
14
+
* This command is required when Playback/Capture
15
+
*
16
+
* amixer cset name='Left Input Mixer L2 Switch' on
17
+
* amixer cset name='Right Input Mixer R2 Switch' on
18
+
* amixer cset name='Headphone Playback Volume' 100
19
+
* amixer cset name='PCM Volume' 100%
20
+
* amixer cset name='Input PGA Volume' 25
21
+
*
22
+
*/
23
+
24
+
/ {
25
+
aliases {
26
+
serial0 = &scif0;
27
+
i2c0 = &i2c0;
28
+
i2c1 = &i2c1;
29
+
i2c3 = &i2c3;
30
+
};
31
+
32
+
chosen {
33
+
stdout-path = "serial0:115200n8";
34
+
};
35
+
36
+
audio_mclock: audio_mclock {
37
+
compatible = "fixed-clock";
38
+
#clock-cells = <0>;
39
+
clock-frequency = <11289600>;
40
+
};
41
+
42
+
snd_rzg2l: sound {
43
+
compatible = "simple-audio-card";
44
+
simple-audio-card,format = "i2s";
45
+
simple-audio-card,bitclock-master = <&cpu_dai>;
46
+
simple-audio-card,frame-master = <&cpu_dai>;
47
+
simple-audio-card,mclk-fs = <256>;
48
+
49
+
simple-audio-card,widgets = "Microphone", "Microphone Jack";
50
+
simple-audio-card,routing =
51
+
"L2", "Mic Bias",
52
+
"R2", "Mic Bias",
53
+
"Mic Bias", "Microphone Jack";
54
+
55
+
cpu_dai: simple-audio-card,cpu {
56
+
sound-dai = <&ssi0>;
57
+
};
58
+
59
+
codec_dai: simple-audio-card,codec {
60
+
clocks = <&audio_mclock>;
61
+
sound-dai = <&wm8978>;
62
+
};
63
+
};
64
+
65
+
usb0_vbus_otg: regulator-usb0-vbus-otg {
66
+
compatible = "regulator-fixed";
67
+
68
+
regulator-name = "USB0_VBUS_OTG";
69
+
regulator-min-microvolt = <5000000>;
70
+
regulator-max-microvolt = <5000000>;
71
+
};
72
+
73
+
vccq_sdhi1: regulator-vccq-sdhi1 {
74
+
compatible = "regulator-gpio";
75
+
regulator-name = "SDHI1 VccQ";
76
+
regulator-min-microvolt = <1800000>;
77
+
regulator-max-microvolt = <3300000>;
78
+
gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_HIGH>;
79
+
gpios-states = <1>;
80
+
states = <3300000 1>, <1800000 0>;
81
+
};
82
+
};
83
+
84
+
&audio_clk1{
85
+
clock-frequency = <11289600>;
86
+
};
87
+
88
+
&audio_clk2{
89
+
clock-frequency = <12288000>;
90
+
};
91
+
92
+
&canfd {
93
+
pinctrl-0 = <&can0_pins &can1_pins>;
94
+
pinctrl-names = "default";
95
+
status = "okay";
96
+
97
+
channel0 {
98
+
status = "okay";
99
+
};
100
+
101
+
channel1 {
102
+
status = "okay";
103
+
};
104
+
};
105
+
106
+
&ehci0 {
107
+
dr_mode = "otg";
108
+
status = "okay";
109
+
};
110
+
111
+
&ehci1 {
112
+
status = "okay";
113
+
};
114
+
115
+
&hsusb {
116
+
dr_mode = "otg";
117
+
status = "okay";
118
+
};
119
+
120
+
&i2c0 {
121
+
pinctrl-0 = <&i2c0_pins>;
122
+
pinctrl-names = "default";
123
+
124
+
status = "okay";
125
+
};
126
+
127
+
&i2c1 {
128
+
pinctrl-0 = <&i2c1_pins>;
129
+
pinctrl-names = "default";
130
+
131
+
status = "okay";
132
+
};
133
+
134
+
&i2c3 {
135
+
pinctrl-0 = <&i2c3_pins>;
136
+
pinctrl-names = "default";
137
+
clock-frequency = <400000>;
138
+
139
+
status = "okay";
140
+
141
+
wm8978: codec@1a {
142
+
compatible = "wlf,wm8978";
143
+
#sound-dai-cells = <0>;
144
+
reg = <0x1a>;
145
+
};
146
+
};
147
+
148
+
&ohci0 {
149
+
dr_mode = "otg";
150
+
status = "okay";
151
+
};
152
+
153
+
&ohci1 {
154
+
status = "okay";
155
+
};
156
+
157
+
&phyrst {
158
+
status = "okay";
159
+
};
160
+
161
+
&scif0 {
162
+
pinctrl-0 = <&scif0_pins>;
163
+
pinctrl-names = "default";
164
+
status = "okay";
165
+
};
166
+
167
+
&sdhi1 {
168
+
pinctrl-0 = <&sdhi1_pins>;
169
+
pinctrl-1 = <&sdhi1_pins_uhs>;
170
+
pinctrl-names = "default", "state_uhs";
171
+
172
+
vmmc-supply = <®_3p3v>;
173
+
vqmmc-supply = <&vccq_sdhi1>;
174
+
bus-width = <4>;
175
+
sd-uhs-sdr50;
176
+
sd-uhs-sdr104;
177
+
status = "okay";
178
+
};
179
+
180
+
&spi1 {
181
+
pinctrl-0 = <&spi1_pins>;
182
+
pinctrl-names = "default";
183
+
184
+
status = "okay";
185
+
};
186
+
187
+
&ssi0 {
188
+
pinctrl-0 = <&ssi0_pins>;
189
+
pinctrl-names = "default";
190
+
191
+
status = "okay";
192
+
};
193
+
194
+
&usb2_phy0 {
195
+
pinctrl-0 = <&usb0_pins>;
196
+
pinctrl-names = "default";
197
+
198
+
vbus-supply = <&usb0_vbus_otg>;
199
+
status = "okay";
200
+
};
201
+
202
+
&usb2_phy1 {
203
+
pinctrl-0 = <&usb1_pins>;
204
+
pinctrl-names = "default";
205
+
206
+
status = "okay";
207
+
};
-193
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
-193
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
···
8
8
#include <dt-bindings/gpio/gpio.h>
9
9
#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
10
10
11
-
/*
12
-
* SSI-WM8978
13
-
*
14
-
* This command is required when Playback/Capture
15
-
*
16
-
* amixer cset name='Left Input Mixer L2 Switch' on
17
-
* amixer cset name='Right Input Mixer R2 Switch' on
18
-
* amixer cset name='Headphone Playback Volume' 100
19
-
* amixer cset name='PCM Volume' 100%
20
-
* amixer cset name='Input PGA Volume' 25
21
-
*
22
-
*/
23
-
24
11
/* comment the #define statement to disable SCIF2 (SER0) on PMOD1 (CN7) */
25
12
#define PMOD1_SER0 1
26
13
27
14
/ {
28
15
aliases {
29
-
serial0 = &scif0;
30
16
serial1 = &scif2;
31
-
i2c0 = &i2c0;
32
-
i2c1 = &i2c1;
33
-
i2c3 = &i2c3;
34
17
};
35
-
36
-
chosen {
37
-
stdout-path = "serial0:115200n8";
38
-
};
39
-
40
-
audio_mclock: audio_mclock {
41
-
compatible = "fixed-clock";
42
-
#clock-cells = <0>;
43
-
clock-frequency = <11289600>;
44
-
};
45
-
46
-
snd_rzg2l: sound {
47
-
compatible = "simple-audio-card";
48
-
simple-audio-card,format = "i2s";
49
-
simple-audio-card,bitclock-master = <&cpu_dai>;
50
-
simple-audio-card,frame-master = <&cpu_dai>;
51
-
simple-audio-card,mclk-fs = <256>;
52
-
53
-
simple-audio-card,widgets = "Microphone", "Microphone Jack";
54
-
simple-audio-card,routing =
55
-
"L2", "Mic Bias",
56
-
"R2", "Mic Bias",
57
-
"Mic Bias", "Microphone Jack";
58
-
59
-
cpu_dai: simple-audio-card,cpu {
60
-
sound-dai = <&ssi0>;
61
-
};
62
-
63
-
codec_dai: simple-audio-card,codec {
64
-
clocks = <&audio_mclock>;
65
-
sound-dai = <&wm8978>;
66
-
};
67
-
};
68
-
69
-
usb0_vbus_otg: regulator-usb0-vbus-otg {
70
-
compatible = "regulator-fixed";
71
-
72
-
regulator-name = "USB0_VBUS_OTG";
73
-
regulator-min-microvolt = <5000000>;
74
-
regulator-max-microvolt = <5000000>;
75
-
};
76
-
77
-
vccq_sdhi1: regulator-vccq-sdhi1 {
78
-
compatible = "regulator-gpio";
79
-
regulator-name = "SDHI1 VccQ";
80
-
regulator-min-microvolt = <1800000>;
81
-
regulator-max-microvolt = <3300000>;
82
-
gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_HIGH>;
83
-
gpios-states = <1>;
84
-
states = <3300000 1>, <1800000 0>;
85
-
};
86
-
};
87
-
88
-
&audio_clk1{
89
-
clock-frequency = <11289600>;
90
-
};
91
-
92
-
&audio_clk2{
93
-
clock-frequency = <12288000>;
94
-
};
95
-
96
-
&canfd {
97
-
pinctrl-0 = <&can0_pins &can1_pins>;
98
-
pinctrl-names = "default";
99
-
status = "okay";
100
-
101
-
channel0 {
102
-
status = "okay";
103
-
};
104
-
105
-
channel1 {
106
-
status = "okay";
107
-
};
108
-
};
109
-
110
-
&ehci0 {
111
-
dr_mode = "otg";
112
-
status = "okay";
113
-
};
114
-
115
-
&ehci1 {
116
-
status = "okay";
117
-
};
118
-
119
-
&hsusb {
120
-
dr_mode = "otg";
121
-
status = "okay";
122
-
};
123
-
124
-
&i2c0 {
125
-
pinctrl-0 = <&i2c0_pins>;
126
-
pinctrl-names = "default";
127
-
128
-
status = "okay";
129
-
};
130
-
131
-
&i2c1 {
132
-
pinctrl-0 = <&i2c1_pins>;
133
-
pinctrl-names = "default";
134
-
135
-
status = "okay";
136
-
};
137
-
138
-
&i2c3 {
139
-
pinctrl-0 = <&i2c3_pins>;
140
-
pinctrl-names = "default";
141
-
clock-frequency = <400000>;
142
-
143
-
status = "okay";
144
-
145
-
wm8978: codec@1a {
146
-
compatible = "wlf,wm8978";
147
-
#sound-dai-cells = <0>;
148
-
reg = <0x1a>;
149
-
};
150
-
};
151
-
152
-
&ohci0 {
153
-
dr_mode = "otg";
154
-
status = "okay";
155
-
};
156
-
157
-
&ohci1 {
158
-
status = "okay";
159
-
};
160
-
161
-
&phyrst {
162
-
status = "okay";
163
-
};
164
-
165
-
&scif0 {
166
-
pinctrl-0 = <&scif0_pins>;
167
-
pinctrl-names = "default";
168
-
status = "okay";
169
18
};
170
19
171
20
/*
···
33
184
status = "okay";
34
185
};
35
186
#endif
36
-
37
-
&sdhi1 {
38
-
pinctrl-0 = <&sdhi1_pins>;
39
-
pinctrl-1 = <&sdhi1_pins_uhs>;
40
-
pinctrl-names = "default", "state_uhs";
41
-
42
-
vmmc-supply = <®_3p3v>;
43
-
vqmmc-supply = <&vccq_sdhi1>;
44
-
bus-width = <4>;
45
-
sd-uhs-sdr50;
46
-
sd-uhs-sdr104;
47
-
status = "okay";
48
-
};
49
-
50
-
&spi1 {
51
-
pinctrl-0 = <&spi1_pins>;
52
-
pinctrl-names = "default";
53
-
54
-
status = "okay";
55
-
};
56
-
57
-
&ssi0 {
58
-
pinctrl-0 = <&ssi0_pins>;
59
-
pinctrl-names = "default";
60
-
61
-
status = "okay";
62
-
};
63
-
64
-
&usb2_phy0 {
65
-
pinctrl-0 = <&usb0_pins>;
66
-
pinctrl-names = "default";
67
-
68
-
vbus-supply = <&usb0_vbus_otg>;
69
-
status = "okay";
70
-
};
71
-
72
-
&usb2_phy1 {
73
-
pinctrl-0 = <&usb1_pins>;
74
-
pinctrl-names = "default";
75
-
76
-
status = "okay";
77
-
};