Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Ingo Molnar:
"Misc fixes all over the place:
- might_sleep() atomicity fix in the microcode loader
- resctrl boundary condition fix
- APIC arithmethics bug fix for frequencies >= 4.2 GHz
- three 5-level paging crash fixes
- two speculation fixes
- a perf/stacktrace fix"
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/unwind/orc: Fall back to using frame pointers for generated code
perf/x86: Always store regs->ip in perf_callchain_kernel()
x86/speculation: Allow guests to use SSBD even if host does not
x86/mm: Handle physical-virtual alignment mismatch in phys_p4d_init()
x86/boot/64: Add missing fixup_pointer() for next_early_pgt access
x86/boot/64: Fix crash if kernel image crosses page table boundary
x86/apic: Fix integer overflow on 10 bit left shift of cpu_khz
x86/resctrl: Prevent possible overrun during bitmap operations
x86/microcode: Fix the microcode load on CPU hotplug for real
+89
-55
+5
-5
arch/x86/events/core.c
+5
-5
arch/x86/events/core.c
···
2402
2402
return;
2403
2403
}
2404
2404
2405
-
if (perf_hw_regs(regs)) {
2406
-
if (perf_callchain_store(entry, regs->ip))
2407
-
return;
2405
+
if (perf_callchain_store(entry, regs->ip))
2406
+
return;
2407
+
2408
+
if (perf_hw_regs(regs))
2408
2409
unwind_start(&state, current, regs, NULL);
2409
-
} else {
2410
+
else
2410
2411
unwind_start(&state, current, NULL, (void *)regs->sp);
2411
-
}
2412
2412
2413
2413
for (; !unwind_done(&state); unwind_next_frame(&state)) {
2414
2414
addr = unwind_get_return_address(&state);
+2
-1
arch/x86/kernel/apic/apic.c
+2
-1
arch/x86/kernel/apic/apic.c
+10
-1
arch/x86/kernel/cpu/bugs.c
+10
-1
arch/x86/kernel/cpu/bugs.c
···
836
836
}
837
837
838
838
/*
839
+
* If SSBD is controlled by the SPEC_CTRL MSR, then set the proper
840
+
* bit in the mask to allow guests to use the mitigation even in the
841
+
* case where the host does not enable it.
842
+
*/
843
+
if (static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) ||
844
+
static_cpu_has(X86_FEATURE_AMD_SSBD)) {
845
+
x86_spec_ctrl_mask |= SPEC_CTRL_SSBD;
846
+
}
847
+
848
+
/*
839
849
* We have three CPU feature flags that are in play here:
840
850
* - X86_BUG_SPEC_STORE_BYPASS - CPU is susceptible.
841
851
* - X86_FEATURE_SSBD - CPU is able to turn off speculative store bypass
···
862
852
x86_amd_ssb_disable();
863
853
} else {
864
854
x86_spec_ctrl_base |= SPEC_CTRL_SSBD;
865
-
x86_spec_ctrl_mask |= SPEC_CTRL_SSBD;
866
855
wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
867
856
}
868
857
}
+10
-5
arch/x86/kernel/cpu/microcode/core.c
+10
-5
arch/x86/kernel/cpu/microcode/core.c
···
789
789
.resume = mc_bp_resume,
790
790
};
791
791
792
-
static int mc_cpu_online(unsigned int cpu)
792
+
static int mc_cpu_starting(unsigned int cpu)
793
793
{
794
-
struct device *dev;
795
-
796
-
dev = get_cpu_device(cpu);
797
794
microcode_update_cpu(cpu);
798
795
pr_debug("CPU%d added\n", cpu);
796
+
return 0;
797
+
}
798
+
799
+
static int mc_cpu_online(unsigned int cpu)
800
+
{
801
+
struct device *dev = get_cpu_device(cpu);
799
802
800
803
if (sysfs_create_group(&dev->kobj, &mc_attr_group))
801
804
pr_err("Failed to create group for CPU%d\n", cpu);
···
875
872
goto out_ucode_group;
876
873
877
874
register_syscore_ops(&mc_syscore_ops);
878
-
cpuhp_setup_state_nocalls(CPUHP_AP_MICROCODE_LOADER, "x86/microcode:online",
875
+
cpuhp_setup_state_nocalls(CPUHP_AP_MICROCODE_LOADER, "x86/microcode:starting",
876
+
mc_cpu_starting, NULL);
877
+
cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "x86/microcode:online",
879
878
mc_cpu_online, mc_cpu_down_prep);
880
879
881
880
pr_info("Microcode Update Driver: v%s.", DRIVER_VERSION);
+16
-19
arch/x86/kernel/cpu/resctrl/rdtgroup.c
+16
-19
arch/x86/kernel/cpu/resctrl/rdtgroup.c
···
796
796
struct seq_file *seq, void *v)
797
797
{
798
798
struct rdt_resource *r = of->kn->parent->priv;
799
-
u32 sw_shareable = 0, hw_shareable = 0;
800
-
u32 exclusive = 0, pseudo_locked = 0;
799
+
/*
800
+
* Use unsigned long even though only 32 bits are used to ensure
801
+
* test_bit() is used safely.
802
+
*/
803
+
unsigned long sw_shareable = 0, hw_shareable = 0;
804
+
unsigned long exclusive = 0, pseudo_locked = 0;
801
805
struct rdt_domain *dom;
802
806
int i, hwb, swb, excl, psl;
803
807
enum rdtgrp_mode mode;
···
846
842
}
847
843
for (i = r->cache.cbm_len - 1; i >= 0; i--) {
848
844
pseudo_locked = dom->plr ? dom->plr->cbm : 0;
849
-
hwb = test_bit(i, (unsigned long *)&hw_shareable);
850
-
swb = test_bit(i, (unsigned long *)&sw_shareable);
851
-
excl = test_bit(i, (unsigned long *)&exclusive);
852
-
psl = test_bit(i, (unsigned long *)&pseudo_locked);
845
+
hwb = test_bit(i, &hw_shareable);
846
+
swb = test_bit(i, &sw_shareable);
847
+
excl = test_bit(i, &exclusive);
848
+
psl = test_bit(i, &pseudo_locked);
853
849
if (hwb && swb)
854
850
seq_putc(seq, 'X');
855
851
else if (hwb && !swb)
···
2490
2486
*/
2491
2487
static void cbm_ensure_valid(u32 *_val, struct rdt_resource *r)
2492
2488
{
2493
-
/*
2494
-
* Convert the u32 _val to an unsigned long required by all the bit
2495
-
* operations within this function. No more than 32 bits of this
2496
-
* converted value can be accessed because all bit operations are
2497
-
* additionally provided with cbm_len that is initialized during
2498
-
* hardware enumeration using five bits from the EAX register and
2499
-
* thus never can exceed 32 bits.
2500
-
*/
2501
-
unsigned long *val = (unsigned long *)_val;
2489
+
unsigned long val = *_val;
2502
2490
unsigned int cbm_len = r->cache.cbm_len;
2503
2491
unsigned long first_bit, zero_bit;
2504
2492
2505
-
if (*val == 0)
2493
+
if (val == 0)
2506
2494
return;
2507
2495
2508
-
first_bit = find_first_bit(val, cbm_len);
2509
-
zero_bit = find_next_zero_bit(val, cbm_len, first_bit);
2496
+
first_bit = find_first_bit(&val, cbm_len);
2497
+
zero_bit = find_next_zero_bit(&val, cbm_len, first_bit);
2510
2498
2511
2499
/* Clear any remaining bits to ensure contiguous region */
2512
-
bitmap_clear(val, zero_bit, cbm_len - zero_bit);
2500
+
bitmap_clear(&val, zero_bit, cbm_len - zero_bit);
2501
+
*_val = (u32)val;
2513
2502
}
2514
2503
2515
2504
/*
+11
-9
arch/x86/kernel/head64.c
+11
-9
arch/x86/kernel/head64.c
···
184
184
pgtable_flags = _KERNPG_TABLE_NOENC + sme_get_me_mask();
185
185
186
186
if (la57) {
187
-
p4d = fixup_pointer(early_dynamic_pgts[next_early_pgt++], physaddr);
187
+
p4d = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++],
188
+
physaddr);
188
189
189
190
i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD;
190
191
pgd[i + 0] = (pgdval_t)p4d + pgtable_flags;
191
192
pgd[i + 1] = (pgdval_t)p4d + pgtable_flags;
192
193
193
-
i = (physaddr >> P4D_SHIFT) % PTRS_PER_P4D;
194
-
p4d[i + 0] = (pgdval_t)pud + pgtable_flags;
195
-
p4d[i + 1] = (pgdval_t)pud + pgtable_flags;
194
+
i = physaddr >> P4D_SHIFT;
195
+
p4d[(i + 0) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags;
196
+
p4d[(i + 1) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags;
196
197
} else {
197
198
i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD;
198
199
pgd[i + 0] = (pgdval_t)pud + pgtable_flags;
199
200
pgd[i + 1] = (pgdval_t)pud + pgtable_flags;
200
201
}
201
202
202
-
i = (physaddr >> PUD_SHIFT) % PTRS_PER_PUD;
203
-
pud[i + 0] = (pudval_t)pmd + pgtable_flags;
204
-
pud[i + 1] = (pudval_t)pmd + pgtable_flags;
203
+
i = physaddr >> PUD_SHIFT;
204
+
pud[(i + 0) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags;
205
+
pud[(i + 1) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags;
205
206
206
207
pmd_entry = __PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL;
207
208
/* Filter out unsupported __PAGE_KERNEL_* bits: */
···
212
211
pmd_entry += physaddr;
213
212
214
213
for (i = 0; i < DIV_ROUND_UP(_end - _text, PMD_SIZE); i++) {
215
-
int idx = i + (physaddr >> PMD_SHIFT) % PTRS_PER_PMD;
216
-
pmd[idx] = pmd_entry + i * PMD_SIZE;
214
+
int idx = i + (physaddr >> PMD_SHIFT);
215
+
216
+
pmd[idx % PTRS_PER_PMD] = pmd_entry + i * PMD_SIZE;
217
217
}
218
218
219
219
/*
+22
-4
arch/x86/kernel/unwind_orc.c
+22
-4
arch/x86/kernel/unwind_orc.c
···
82
82
* But they are copies of the ftrace entries that are static and
83
83
* defined in ftrace_*.S, which do have orc entries.
84
84
*
85
-
* If the undwinder comes across a ftrace trampoline, then find the
85
+
* If the unwinder comes across a ftrace trampoline, then find the
86
86
* ftrace function that was used to create it, and use that ftrace
87
-
* function's orc entrie, as the placement of the return code in
87
+
* function's orc entry, as the placement of the return code in
88
88
* the stack will be identical.
89
89
*/
90
90
static struct orc_entry *orc_ftrace_find(unsigned long ip)
···
126
126
.sp_reg = ORC_REG_SP,
127
127
.bp_reg = ORC_REG_UNDEFINED,
128
128
.type = ORC_TYPE_CALL
129
+
};
130
+
131
+
/* Fake frame pointer entry -- used as a fallback for generated code */
132
+
static struct orc_entry orc_fp_entry = {
133
+
.type = ORC_TYPE_CALL,
134
+
.sp_reg = ORC_REG_BP,
135
+
.sp_offset = 16,
136
+
.bp_reg = ORC_REG_PREV_SP,
137
+
.bp_offset = -16,
138
+
.end = 0,
129
139
};
130
140
131
141
static struct orc_entry *orc_find(unsigned long ip)
···
402
392
* calls and calls to noreturn functions.
403
393
*/
404
394
orc = orc_find(state->signal ? state->ip : state->ip - 1);
405
-
if (!orc)
406
-
goto err;
395
+
if (!orc) {
396
+
/*
397
+
* As a fallback, try to assume this code uses a frame pointer.
398
+
* This is useful for generated code, like BPF, which ORC
399
+
* doesn't know about. This is just a guess, so the rest of
400
+
* the unwind is no longer considered reliable.
401
+
*/
402
+
orc = &orc_fp_entry;
403
+
state->error = true;
404
+
}
407
405
408
406
/* End-of-stack check for kernel threads: */
409
407
if (orc->sp_reg == ORC_REG_UNDEFINED) {
+13
-11
arch/x86/mm/init_64.c
+13
-11
arch/x86/mm/init_64.c
···
671
671
phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, unsigned long paddr_end,
672
672
unsigned long page_size_mask, bool init)
673
673
{
674
-
unsigned long paddr_next, paddr_last = paddr_end;
675
-
unsigned long vaddr = (unsigned long)__va(paddr);
676
-
int i = p4d_index(vaddr);
674
+
unsigned long vaddr, vaddr_end, vaddr_next, paddr_next, paddr_last;
675
+
676
+
paddr_last = paddr_end;
677
+
vaddr = (unsigned long)__va(paddr);
678
+
vaddr_end = (unsigned long)__va(paddr_end);
677
679
678
680
if (!pgtable_l5_enabled())
679
681
return phys_pud_init((pud_t *) p4d_page, paddr, paddr_end,
680
682
page_size_mask, init);
681
683
682
-
for (; i < PTRS_PER_P4D; i++, paddr = paddr_next) {
683
-
p4d_t *p4d;
684
+
for (; vaddr < vaddr_end; vaddr = vaddr_next) {
685
+
p4d_t *p4d = p4d_page + p4d_index(vaddr);
684
686
pud_t *pud;
685
687
686
-
vaddr = (unsigned long)__va(paddr);
687
-
p4d = p4d_page + p4d_index(vaddr);
688
-
paddr_next = (paddr & P4D_MASK) + P4D_SIZE;
688
+
vaddr_next = (vaddr & P4D_MASK) + P4D_SIZE;
689
+
paddr = __pa(vaddr);
689
690
690
691
if (paddr >= paddr_end) {
692
+
paddr_next = __pa(vaddr_next);
691
693
if (!after_bootmem &&
692
694
!e820__mapped_any(paddr & P4D_MASK, paddr_next,
693
695
E820_TYPE_RAM) &&
···
701
699
702
700
if (!p4d_none(*p4d)) {
703
701
pud = pud_offset(p4d, 0);
704
-
paddr_last = phys_pud_init(pud, paddr, paddr_end,
705
-
page_size_mask, init);
702
+
paddr_last = phys_pud_init(pud, paddr, __pa(vaddr_end),
703
+
page_size_mask, init);
706
704
continue;
707
705
}
708
706
709
707
pud = alloc_low_page();
710
-
paddr_last = phys_pud_init(pud, paddr, paddr_end,
708
+
paddr_last = phys_pud_init(pud, paddr, __pa(vaddr_end),
711
709
page_size_mask, init);
712
710
713
711
spin_lock(&init_mm.page_table_lock);