tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'dmaengine-fix-5.1-rc7' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine fixes from Vinod Koul:

- fix for wrong register use in mediatek driver

- fix in sh driver for glitch is tx_status and treating 0 a valid
residue for cyclic

- fix in bcm driver for using right memory allocation flag

* tag 'dmaengine-fix-5.1-rc7' of git://git.infradead.org/users/vkoul/slave-dma:
dmaengine: mediatek-cqdma: fix wrong register usage in mtk_cqdma_start
dmaengine: sh: rcar-dmac: Fix glitch in dmaengine_tx_status
dmaengine: sh: rcar-dmac: With cyclic DMA residue 0 is valid
dmaengine: bcm2835: Avoid GFP_KERNEL in device_prep_slave_sg

Linus Torvalds 72a6e35d 25cce03b

+28 -6
+1 -1
drivers/dma/bcm2835-dma.c
··· 671 671 d = bcm2835_dma_create_cb_chain(chan, direction, false, 672 672 info, extra, 673 673 frames, src, dst, 0, 0, 674 - GFP_KERNEL); 674 + GFP_NOWAIT); 675 675 if (!d) 676 676 return NULL; 677 677
+1 -1
drivers/dma/mediatek/mtk-cqdma.c
··· 253 253 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT 254 254 mtk_dma_set(pc, MTK_CQDMA_DST2, cvd->dest >> MTK_CQDMA_ADDR2_SHFIT); 255 255 #else 256 - mtk_dma_set(pc, MTK_CQDMA_SRC2, 0); 256 + mtk_dma_set(pc, MTK_CQDMA_DST2, 0); 257 257 #endif 258 258 259 259 /* setup the length */
+26 -4
drivers/dma/sh/rcar-dmac.c
··· 1282 1282 enum dma_status status; 1283 1283 unsigned int residue = 0; 1284 1284 unsigned int dptr = 0; 1285 + unsigned int chcrb; 1286 + unsigned int tcrb; 1287 + unsigned int i; 1285 1288 1286 1289 if (!desc) 1287 1290 return 0; ··· 1333 1330 } 1334 1331 1335 1332 /* 1333 + * We need to read two registers. 1334 + * Make sure the control register does not skip to next chunk 1335 + * while reading the counter. 1336 + * Trying it 3 times should be enough: Initial read, retry, retry 1337 + * for the paranoid. 1338 + */ 1339 + for (i = 0; i < 3; i++) { 1340 + chcrb = rcar_dmac_chan_read(chan, RCAR_DMACHCRB) & 1341 + RCAR_DMACHCRB_DPTR_MASK; 1342 + tcrb = rcar_dmac_chan_read(chan, RCAR_DMATCRB); 1343 + /* Still the same? */ 1344 + if (chcrb == (rcar_dmac_chan_read(chan, RCAR_DMACHCRB) & 1345 + RCAR_DMACHCRB_DPTR_MASK)) 1346 + break; 1347 + } 1348 + WARN_ONCE(i >= 3, "residue might be not continuous!"); 1349 + 1350 + /* 1336 1351 * In descriptor mode the descriptor running pointer is not maintained 1337 1352 * by the interrupt handler, find the running descriptor from the 1338 1353 * descriptor pointer field in the CHCRB register. In non-descriptor 1339 1354 * mode just use the running descriptor pointer. 1340 1355 */ 1341 1356 if (desc->hwdescs.use) { 1342 - dptr = (rcar_dmac_chan_read(chan, RCAR_DMACHCRB) & 1343 - RCAR_DMACHCRB_DPTR_MASK) >> RCAR_DMACHCRB_DPTR_SHIFT; 1357 + dptr = chcrb >> RCAR_DMACHCRB_DPTR_SHIFT; 1344 1358 if (dptr == 0) 1345 1359 dptr = desc->nchunks; 1346 1360 dptr--; ··· 1375 1355 } 1376 1356 1377 1357 /* Add the residue for the current chunk. */ 1378 - residue += rcar_dmac_chan_read(chan, RCAR_DMATCRB) << desc->xfer_shift; 1358 + residue += tcrb << desc->xfer_shift; 1379 1359 1380 1360 return residue; 1381 1361 } ··· 1388 1368 enum dma_status status; 1389 1369 unsigned long flags; 1390 1370 unsigned int residue; 1371 + bool cyclic; 1391 1372 1392 1373 status = dma_cookie_status(chan, cookie, txstate); 1393 1374 if (status == DMA_COMPLETE || !txstate) ··· 1396 1375 1397 1376 spin_lock_irqsave(&rchan->lock, flags); 1398 1377 residue = rcar_dmac_chan_get_residue(rchan, cookie); 1378 + cyclic = rchan->desc.running ? rchan->desc.running->cyclic : false; 1399 1379 spin_unlock_irqrestore(&rchan->lock, flags); 1400 1380 1401 1381 /* if there's no residue, the cookie is complete */ 1402 - if (!residue) 1382 + if (!residue && !cyclic) 1403 1383 return DMA_COMPLETE; 1404 1384 1405 1385 dma_set_residue(txstate, residue);