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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
clk: mediatek: clk-mt6795-topckgen: Migrate to mtk_clk_simple_probe()
Migrate away from custom probe functions and use the commonized
mtk_clk_simple_{probe, remove}().
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230120092053.182923-22-angelogioacchino.delregno@collabora.com
Tested-by: Mingming Su <mingming.su@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
authored by
AngeloGioacchino Del Regno
and committed by
Stephen Boyd
72feb6f1
75c12ea3
+16
-74
+16
-74
drivers/clk/mediatek/clk-mt6795-topckgen.c
+16
-74
drivers/clk/mediatek/clk-mt6795-topckgen.c
···
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DIV_GATE(CLK_TOP_APLL2_DIV5, "apll2_div5", "apll2_div4", 0x12c, 21, 0x12c, 4, 4),
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};
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-
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-
static const struct of_device_id of_match_clk_mt6795_topckgen[] = {
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-
{ .compatible = "mediatek,mt6795-topckgen" },
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-
{ /* sentinel */ }
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+
static const struct mtk_clk_desc topck_desc = {
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+
.fixed_clks = fixed_clks,
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+
.num_fixed_clks = ARRAY_SIZE(fixed_clks),
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+
.factor_clks = top_divs,
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+
.num_factor_clks = ARRAY_SIZE(top_divs),
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+
.mux_clks = top_muxes,
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+
.num_mux_clks = ARRAY_SIZE(top_muxes),
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+
.composite_clks = top_aud_divs,
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+
.num_composite_clks = ARRAY_SIZE(top_aud_divs),
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+
.clk_lock = &mt6795_top_clk_lock,
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};
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-
static int clk_mt6795_topckgen_probe(struct platform_device *pdev)
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-
{
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struct clk_hw_onecell_data *clk_data;
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struct device_node *node = pdev->dev.of_node;
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void __iomem *base;
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int ret;
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-
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base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(base))
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return PTR_ERR(base);
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-
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clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK);
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-
if (!clk_data)
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return -ENOMEM;
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-
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-
ret = mtk_clk_register_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks), clk_data);
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-
if (ret)
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goto free_clk_data;
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-
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-
ret = mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
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-
if (ret)
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goto unregister_fixed_clks;
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-
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ret = mtk_clk_register_muxes(&pdev->dev, top_muxes,
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ARRAY_SIZE(top_muxes), node,
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&mt6795_top_clk_lock, clk_data);
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-
if (ret)
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goto unregister_factors;
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-
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ret = mtk_clk_register_composites(&pdev->dev, top_aud_divs,
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ARRAY_SIZE(top_aud_divs), base,
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&mt6795_top_clk_lock, clk_data);
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-
if (ret)
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-
goto unregister_muxes;
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-
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ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
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if (ret)
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goto unregister_composites;
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-
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return 0;
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-
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-
unregister_composites:
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mtk_clk_unregister_composites(top_aud_divs, ARRAY_SIZE(top_aud_divs), clk_data);
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-
unregister_muxes:
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mtk_clk_unregister_muxes(top_muxes, ARRAY_SIZE(top_muxes), clk_data);
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-
unregister_factors:
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mtk_clk_unregister_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
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unregister_fixed_clks:
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mtk_clk_unregister_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks), clk_data);
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free_clk_data:
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mtk_free_clk_data(clk_data);
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return ret;
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-
}
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-
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static int clk_mt6795_topckgen_remove(struct platform_device *pdev)
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-
{
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struct device_node *node = pdev->dev.of_node;
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struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
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-
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of_clk_del_provider(node);
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mtk_clk_unregister_composites(top_aud_divs, ARRAY_SIZE(top_aud_divs), clk_data);
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mtk_clk_unregister_muxes(top_muxes, ARRAY_SIZE(top_muxes), clk_data);
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mtk_clk_unregister_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
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mtk_clk_unregister_fixed_clks(fixed_clks, ARRAY_SIZE(fixed_clks), clk_data);
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mtk_free_clk_data(clk_data);
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-
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return 0;
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-
}
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+
static const struct of_device_id of_match_clk_mt6795_topckgen[] = {
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{ .compatible = "mediatek,mt6795-topckgen", .data = &topck_desc },
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{ /* sentinel */ }
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};
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static struct platform_driver clk_mt6795_topckgen_drv = {
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.driver = {
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.name = "clk-mt6795-topckgen",
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.of_match_table = of_match_clk_mt6795_topckgen,
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},
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.probe = clk_mt6795_topckgen_probe,
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-
.remove = clk_mt6795_topckgen_remove,
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+
.probe = mtk_clk_simple_probe,
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.remove = mtk_clk_simple_remove,
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};
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module_platform_driver(clk_mt6795_topckgen_drv);
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