Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'mmc-v6.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC fixes from Ulf Hansson:
"MMC core:
- Prevent splat from warning when setting maximum DMA segment
MMC host:
- mvsdio: Drop sg_miter support for PIO as it didn't work
- sdhci-of-dwcmshc: Prevent stale interrupt for the T-Head 1520
variant"
* tag 'mmc-v6.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
mmc: sdhci-of-dwcmshc: Prevent stale command interrupt handling
Revert "mmc: mvsdio: Use sg_miter for PIO"
mmc: core: Only set maximum DMA segment size if DMA is supported
+28
-54
+2
-1
drivers/mmc/core/queue.c
+2
-1
drivers/mmc/core/queue.c
···
388
388
389
389
blk_queue_rq_timeout(mq->queue, 60 * HZ);
390
390
391
-
dma_set_max_seg_size(mmc_dev(host), queue_max_segment_size(mq->queue));
391
+
if (mmc_dev(host)->dma_parms)
392
+
dma_set_max_seg_size(mmc_dev(host), queue_max_segment_size(mq->queue));
392
393
393
394
INIT_WORK(&mq->recovery_work, mmc_mq_recovery_handler);
394
395
INIT_WORK(&mq->complete_work, mmc_blk_mq_complete_work);
+18
-53
drivers/mmc/host/mvsdio.c
+18
-53
drivers/mmc/host/mvsdio.c
···
38
38
unsigned int xfer_mode;
39
39
unsigned int intr_en;
40
40
unsigned int ctrl;
41
-
bool use_pio;
42
-
struct sg_mapping_iter sg_miter;
43
41
unsigned int pio_size;
42
+
void *pio_ptr;
44
43
unsigned int sg_frags;
45
44
unsigned int ns_per_clk;
46
45
unsigned int clock;
···
114
115
* data when the buffer is not aligned on a 64 byte
115
116
* boundary.
116
117
*/
117
-
unsigned int miter_flags = SG_MITER_ATOMIC; /* Used from IRQ */
118
-
119
-
if (data->flags & MMC_DATA_READ)
120
-
miter_flags |= SG_MITER_TO_SG;
121
-
else
122
-
miter_flags |= SG_MITER_FROM_SG;
123
-
124
118
host->pio_size = data->blocks * data->blksz;
125
-
sg_miter_start(&host->sg_miter, data->sg, data->sg_len, miter_flags);
119
+
host->pio_ptr = sg_virt(data->sg);
126
120
if (!nodma)
127
-
dev_dbg(host->dev, "fallback to PIO for data\n");
128
-
host->use_pio = true;
121
+
dev_dbg(host->dev, "fallback to PIO for data at 0x%p size %d\n",
122
+
host->pio_ptr, host->pio_size);
129
123
return 1;
130
124
} else {
131
125
dma_addr_t phys_addr;
···
129
137
phys_addr = sg_dma_address(data->sg);
130
138
mvsd_write(MVSD_SYS_ADDR_LOW, (u32)phys_addr & 0xffff);
131
139
mvsd_write(MVSD_SYS_ADDR_HI, (u32)phys_addr >> 16);
132
-
host->use_pio = false;
133
140
return 0;
134
141
}
135
142
}
···
288
297
{
289
298
void __iomem *iobase = host->base;
290
299
291
-
if (host->use_pio) {
292
-
sg_miter_stop(&host->sg_miter);
300
+
if (host->pio_ptr) {
301
+
host->pio_ptr = NULL;
293
302
host->pio_size = 0;
294
303
} else {
295
304
dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->sg_frags,
···
344
353
static irqreturn_t mvsd_irq(int irq, void *dev)
345
354
{
346
355
struct mvsd_host *host = dev;
347
-
struct sg_mapping_iter *sgm = &host->sg_miter;
348
356
void __iomem *iobase = host->base;
349
357
u32 intr_status, intr_done_mask;
350
358
int irq_handled = 0;
351
-
u16 *p;
352
-
int s;
353
359
354
360
intr_status = mvsd_read(MVSD_NOR_INTR_STATUS);
355
361
dev_dbg(host->dev, "intr 0x%04x intr_en 0x%04x hw_state 0x%04x\n",
···
370
382
spin_lock(&host->lock);
371
383
372
384
/* PIO handling, if needed. Messy business... */
373
-
if (host->use_pio) {
374
-
/*
375
-
* As we set sgm->consumed this always gives a valid buffer
376
-
* position.
377
-
*/
378
-
if (!sg_miter_next(sgm)) {
379
-
/* This should not happen */
380
-
dev_err(host->dev, "ran out of scatter segments\n");
381
-
spin_unlock(&host->lock);
382
-
host->intr_en &=
383
-
~(MVSD_NOR_RX_READY | MVSD_NOR_RX_FIFO_8W |
384
-
MVSD_NOR_TX_AVAIL | MVSD_NOR_TX_FIFO_8W);
385
-
mvsd_write(MVSD_NOR_INTR_EN, host->intr_en);
386
-
return IRQ_HANDLED;
387
-
}
388
-
p = sgm->addr;
389
-
s = sgm->length;
390
-
if (s > host->pio_size)
391
-
s = host->pio_size;
392
-
}
393
-
394
-
if (host->use_pio &&
385
+
if (host->pio_size &&
395
386
(intr_status & host->intr_en &
396
387
(MVSD_NOR_RX_READY | MVSD_NOR_RX_FIFO_8W))) {
397
-
388
+
u16 *p = host->pio_ptr;
389
+
int s = host->pio_size;
398
390
while (s >= 32 && (intr_status & MVSD_NOR_RX_FIFO_8W)) {
399
391
readsw(iobase + MVSD_FIFO, p, 16);
400
392
p += 16;
401
393
s -= 32;
402
-
sgm->consumed += 32;
403
394
intr_status = mvsd_read(MVSD_NOR_INTR_STATUS);
404
395
}
405
396
/*
···
391
424
put_unaligned(mvsd_read(MVSD_FIFO), p++);
392
425
put_unaligned(mvsd_read(MVSD_FIFO), p++);
393
426
s -= 4;
394
-
sgm->consumed += 4;
395
427
intr_status = mvsd_read(MVSD_NOR_INTR_STATUS);
396
428
}
397
429
if (s && s < 4 && (intr_status & MVSD_NOR_RX_READY)) {
···
398
432
val[0] = mvsd_read(MVSD_FIFO);
399
433
val[1] = mvsd_read(MVSD_FIFO);
400
434
memcpy(p, ((void *)&val) + 4 - s, s);
401
-
sgm->consumed += s;
402
435
s = 0;
403
436
intr_status = mvsd_read(MVSD_NOR_INTR_STATUS);
404
437
}
405
-
/* PIO transfer done */
406
-
host->pio_size -= sgm->consumed;
407
-
if (host->pio_size == 0) {
438
+
if (s == 0) {
408
439
host->intr_en &=
409
440
~(MVSD_NOR_RX_READY | MVSD_NOR_RX_FIFO_8W);
410
441
mvsd_write(MVSD_NOR_INTR_EN, host->intr_en);
···
413
450
}
414
451
dev_dbg(host->dev, "pio %d intr 0x%04x hw_state 0x%04x\n",
415
452
s, intr_status, mvsd_read(MVSD_HW_STATE));
453
+
host->pio_ptr = p;
454
+
host->pio_size = s;
416
455
irq_handled = 1;
417
-
} else if (host->use_pio &&
456
+
} else if (host->pio_size &&
418
457
(intr_status & host->intr_en &
419
458
(MVSD_NOR_TX_AVAIL | MVSD_NOR_TX_FIFO_8W))) {
459
+
u16 *p = host->pio_ptr;
460
+
int s = host->pio_size;
420
461
/*
421
462
* The TX_FIFO_8W bit is unreliable. When set, bursting
422
463
* 16 halfwords all at once in the FIFO drops data. Actually
···
431
464
mvsd_write(MVSD_FIFO, get_unaligned(p++));
432
465
mvsd_write(MVSD_FIFO, get_unaligned(p++));
433
466
s -= 4;
434
-
sgm->consumed += 4;
435
467
intr_status = mvsd_read(MVSD_NOR_INTR_STATUS);
436
468
}
437
469
if (s < 4) {
···
439
473
memcpy(((void *)&val) + 4 - s, p, s);
440
474
mvsd_write(MVSD_FIFO, val[0]);
441
475
mvsd_write(MVSD_FIFO, val[1]);
442
-
sgm->consumed += s;
443
476
s = 0;
444
477
intr_status = mvsd_read(MVSD_NOR_INTR_STATUS);
445
478
}
446
-
/* PIO transfer done */
447
-
host->pio_size -= sgm->consumed;
448
-
if (host->pio_size == 0) {
479
+
if (s == 0) {
449
480
host->intr_en &=
450
481
~(MVSD_NOR_TX_AVAIL | MVSD_NOR_TX_FIFO_8W);
451
482
mvsd_write(MVSD_NOR_INTR_EN, host->intr_en);
···
450
487
}
451
488
dev_dbg(host->dev, "pio %d intr 0x%04x hw_state 0x%04x\n",
452
489
s, intr_status, mvsd_read(MVSD_HW_STATE));
490
+
host->pio_ptr = p;
491
+
host->pio_size = s;
453
492
irq_handled = 1;
454
493
}
455
494
+8
drivers/mmc/host/sdhci-of-dwcmshc.c
+8
drivers/mmc/host/sdhci-of-dwcmshc.c
···
852
852
853
853
sdhci_reset(host, mask);
854
854
855
+
/* The T-Head 1520 SoC does not comply with the SDHCI specification
856
+
* regarding the "Software Reset for CMD line should clear 'Command
857
+
* Complete' in the Normal Interrupt Status Register." Clear the bit
858
+
* here to compensate for this quirk.
859
+
*/
860
+
if (mask & SDHCI_RESET_CMD)
861
+
sdhci_writel(host, SDHCI_INT_RESPONSE, SDHCI_INT_STATUS);
862
+
855
863
if (priv->flags & FLAG_IO_FIXED_1V8) {
856
864
ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
857
865
if (!(ctrl_2 & SDHCI_CTRL_VDD_180)) {