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ARM: dts: suniv: add device tree for PopStick v1.1

PopStick is a minimal Allwinner F1C200s dongle, with its USB controller
wired to a USB Type-A plug, a SD slot and a SPI NAND flash on board, and
an on-board CH340 USB-UART converted connected to F1C200s's UART0.

Add a device tree for it. As F1C200s is just F1C100s with a different
DRAM chip co-packaged, directly use F1C100s DTSI here.

This commit covers the v1.1 version of this board, which is now shipped.
v1.0 is some internal sample that have not been shipped at all.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20230319212936.26649-6-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>

authored by

Icenowy Zheng and committed by
Jernej Skrabec
7452d479 e89556d6

+83 -1
+2 -1
arch/arm/boot/dts/Makefile
··· 1406 1406 sun9i-a80-optimus.dtb \ 1407 1407 sun9i-a80-cubieboard4.dtb 1408 1408 dtb-$(CONFIG_MACH_SUNIV) += \ 1409 - suniv-f1c100s-licheepi-nano.dtb 1409 + suniv-f1c100s-licheepi-nano.dtb \ 1410 + suniv-f1c200s-popstick-v1.1.dtb 1410 1411 dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \ 1411 1412 tegra20-acer-a500-picasso.dtb \ 1412 1413 tegra20-asus-tf101.dtb \
+81
arch/arm/boot/dts/suniv-f1c200s-popstick-v1.1.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + /* 3 + * Copyright 2022 Icenowy Zheng <uwu@icenowy.me> 4 + */ 5 + 6 + /dts-v1/; 7 + #include "suniv-f1c100s.dtsi" 8 + 9 + #include <dt-bindings/gpio/gpio.h> 10 + #include <dt-bindings/leds/common.h> 11 + 12 + / { 13 + model = "Popcorn Computer PopStick v1.1"; 14 + compatible = "sourceparts,popstick-v1.1", "sourceparts,popstick", 15 + "allwinner,suniv-f1c200s", "allwinner,suniv-f1c100s"; 16 + 17 + aliases { 18 + serial0 = &uart0; 19 + }; 20 + 21 + chosen { 22 + stdout-path = "serial0:115200n8"; 23 + }; 24 + 25 + leds { 26 + compatible = "gpio-leds"; 27 + 28 + led { 29 + function = LED_FUNCTION_STATUS; 30 + color = <LED_COLOR_ID_GREEN>; 31 + gpios = <&pio 4 6 GPIO_ACTIVE_HIGH>; /* PE6 */ 32 + linux,default-trigger = "heartbeat"; 33 + }; 34 + }; 35 + 36 + reg_vcc3v3: regulator-3v3 { 37 + compatible = "regulator-fixed"; 38 + regulator-name = "vcc3v3"; 39 + regulator-min-microvolt = <3300000>; 40 + regulator-max-microvolt = <3300000>; 41 + }; 42 + }; 43 + 44 + &mmc0 { 45 + cd-gpios = <&pio 4 3 GPIO_ACTIVE_LOW>; /* PE3 */ 46 + bus-width = <4>; 47 + disable-wp; 48 + vmmc-supply = <&reg_vcc3v3>; 49 + status = "okay"; 50 + }; 51 + 52 + &otg_sram { 53 + status = "okay"; 54 + }; 55 + 56 + &spi0 { 57 + pinctrl-names = "default"; 58 + pinctrl-0 = <&spi0_pc_pins>; 59 + status = "okay"; 60 + 61 + flash@0 { 62 + compatible = "spi-nand"; 63 + reg = <0>; 64 + spi-max-frequency = <40000000>; 65 + }; 66 + }; 67 + 68 + &uart0 { 69 + pinctrl-names = "default"; 70 + pinctrl-0 = <&uart0_pe_pins>; 71 + status = "okay"; 72 + }; 73 + 74 + &usb_otg { 75 + dr_mode = "peripheral"; 76 + status = "okay"; 77 + }; 78 + 79 + &usbphy { 80 + status = "okay"; 81 + };