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dt-bindings: usb: qcom,dwc3: drop assigned-clocks

The binding does not have to specify assigned-clocks, because they are
already allowed by core DT schema. On the other hand, fixed
assigned-clocks in the binding will not fit different boards or SoCs.
Exactly this is the case for Qualcomm SuperSpeed DWC3 USB SoC controller
binding, where few boards have different assigned-clocks:

ipq8074-hk10-c1.dtb: usb@8cf8800: assigned-clocks: [[5, 131], [5, 132], [5, 133]] is too long
sdm660-xiaomi-lavender.dtb: usb@a8f8800: assigned-clocks: [[37, 92], [37, 91], [38, 64]] is too long

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230723141550.90223-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Krzysztof Kozlowski and committed by
Greg Kroah-Hartman 74a6f1e8 26910f97

-9
-9
Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
··· 83 83 minItems: 1 84 84 maxItems: 9 85 85 86 - assigned-clocks: 87 - items: 88 - - description: Phandle and clock specifier of MOCK_UTMI_CLK. 89 - - description: Phandle and clock specifoer of MASTER_CLK. 90 - 91 - assigned-clock-rates: 92 - items: 93 - - description: Must be 19.2MHz (19200000). 94 - - description: Must be >= 60 MHz in HS mode, >= 125 MHz in SS mode. 95 86 resets: 96 87 maxItems: 1 97 88