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tty: serial: imx: keep dma request disabled before dma transfer setup

Since sdma hardware configure postpone to transfer phase, have to
disable dma request before dma transfer setup because there is a
hardware limitation on sdma event enable(ENBLn) as below.

Refer SDMA 2.6.28 Channel Enable RAM (SDMAARMx_CHNENBLn) section:
"It is thus essential for the Arm platform to program them before any
DMA request is triggered to the SDMA, otherwise an unpredictable
combination of channels may be started."

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Link: https://patch.msgid.link/20260312094526.297348-1-sherry.sun@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Robin Gong and committed by
Greg Kroah-Hartman 74e0c9f0 072ce481

+4 -3
+4 -3
drivers/tty/serial/imx.c
··· 1442 1442 1443 1443 imx_uart_setup_ufcr(sport, TXTL_DMA, RXTL_DMA); 1444 1444 1445 - /* set UCR1 */ 1445 + /* set UCR1 except TXDMAEN which would be enabled in imx_uart_dma_tx */ 1446 1446 ucr1 = imx_uart_readl(sport, UCR1); 1447 - ucr1 |= UCR1_RXDMAEN | UCR1_TXDMAEN | UCR1_ATDMAEN; 1447 + ucr1 |= UCR1_RXDMAEN | UCR1_ATDMAEN; 1448 1448 imx_uart_writel(sport, ucr1, UCR1); 1449 1449 1450 1450 sport->dma_is_enabled = 1; ··· 1567 1567 imx_uart_enable_ms(&sport->port); 1568 1568 1569 1569 if (dma_is_inited) { 1570 - imx_uart_enable_dma(sport); 1570 + /* Note: enable dma request after transfer start! */ 1571 1571 imx_uart_start_rx_dma(sport); 1572 + imx_uart_enable_dma(sport); 1572 1573 } else { 1573 1574 ucr1 = imx_uart_readl(sport, UCR1); 1574 1575 ucr1 |= UCR1_RRDYEN;