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Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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scsi: ufs: dt-bindings: amd-versal2: Add UFS Host Controller for AMD Versal Gen 2 SoC

Add devicetree document for UFS Host Controller on AMD Versal Gen 2 SoC.
This includes clocks and clock-names as mandated by UFS common bindings.

Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
Co-developed-by: Ajay Neeli <ajay.neeli@amd.com>
Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Bart Van Assche <bvanassche@acm.org>
Link: https://patch.msgid.link/20251021113003.13650-2-ajay.neeli@amd.com
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

authored by

Sai Krishna Potthuri and committed by
Martin K. Petersen 754c6f53 3a866087

+61
+61
Documentation/devicetree/bindings/ufs/amd,versal2-ufs.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/ufs/amd,versal2-ufs.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: AMD Versal Gen 2 UFS Host Controller 8 + 9 + maintainers: 10 + - Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> 11 + 12 + allOf: 13 + - $ref: ufs-common.yaml 14 + 15 + properties: 16 + compatible: 17 + const: amd,versal2-ufs 18 + 19 + reg: 20 + maxItems: 1 21 + 22 + clocks: 23 + maxItems: 1 24 + 25 + clock-names: 26 + items: 27 + - const: core 28 + 29 + power-domains: 30 + maxItems: 1 31 + 32 + resets: 33 + maxItems: 2 34 + 35 + reset-names: 36 + items: 37 + - const: host 38 + - const: phy 39 + 40 + required: 41 + - reg 42 + - clocks 43 + - clock-names 44 + - resets 45 + - reset-names 46 + 47 + unevaluatedProperties: false 48 + 49 + examples: 50 + - | 51 + #include <dt-bindings/interrupt-controller/arm-gic.h> 52 + ufs@f10b0000 { 53 + compatible = "amd,versal2-ufs"; 54 + reg = <0xf10b0000 0x1000>; 55 + clocks = <&ufs_core_clk>; 56 + clock-names = "core"; 57 + resets = <&scmi_reset 4>, <&scmi_reset 35>; 58 + reset-names = "host", "phy"; 59 + interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>; 60 + freq-table-hz = <0 0>; 61 + };