Merge tag 'drm-fixes-2018-10-19' of git://anongit.freedesktop.org/drm/drm

+7 -3

drivers/gpu/drm/drm_crtc.c

··· 567 567 struct drm_mode_crtc *crtc_req = data; 568 568 struct drm_crtc *crtc; 569 569 struct drm_plane *plane; 570 - struct drm_connector **connector_set = NULL, *connector; 571 - struct drm_framebuffer *fb = NULL; 572 - struct drm_display_mode *mode = NULL; 570 + struct drm_connector **connector_set, *connector; 571 + struct drm_framebuffer *fb; 572 + struct drm_display_mode *mode; 573 573 struct drm_mode_set set; 574 574 uint32_t __user *set_connectors_ptr; 575 575 struct drm_modeset_acquire_ctx ctx; ··· 598 598 mutex_lock(&crtc->dev->mode_config.mutex); 599 599 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE); 600 600 retry: 601 + connector_set = NULL; 602 + fb = NULL; 603 + mode = NULL; 604 + 601 605 ret = drm_modeset_lock_all_ctx(crtc->dev, &ctx); 602 606 if (ret) 603 607 goto out;

+4 -1

drivers/gpu/drm/drm_edid.c

··· 113 113 /* AEO model 0 reports 8 bpc, but is a 6 bpc panel */ 114 114 { "AEO", 0, EDID_QUIRK_FORCE_6BPC }, 115 115 116 + /* BOE model on HP Pavilion 15-n233sl reports 8 bpc, but is a 6 bpc panel */ 117 + { "BOE", 0x78b, EDID_QUIRK_FORCE_6BPC }, 118 + 116 119 /* CPT panel of Asus UX303LA reports 8 bpc, but is a 6 bpc panel */ 117 120 { "CPT", 0x17df, EDID_QUIRK_FORCE_6BPC }, 118 121 ··· 4282 4279 struct drm_hdmi_info *hdmi = &connector->display_info.hdmi; 4283 4280 4284 4281 dc_mask = db[7] & DRM_EDID_YCBCR420_DC_MASK; 4285 - hdmi->y420_dc_modes |= dc_mask; 4282 + hdmi->y420_dc_modes = dc_mask; 4286 4283 } 4287 4284 4288 4285 static void drm_parse_hdmi_forum_vsdb(struct drm_connector *connector,

+26 -65

drivers/gpu/drm/drm_fb_helper.c

··· 1580 1580 } 1581 1581 EXPORT_SYMBOL(drm_fb_helper_ioctl); 1582 1582 1583 + static bool drm_fb_pixel_format_equal(const struct fb_var_screeninfo *var_1, 1584 + const struct fb_var_screeninfo *var_2) 1585 + { 1586 + return var_1->bits_per_pixel == var_2->bits_per_pixel && 1587 + var_1->grayscale == var_2->grayscale && 1588 + var_1->red.offset == var_2->red.offset && 1589 + var_1->red.length == var_2->red.length && 1590 + var_1->red.msb_right == var_2->red.msb_right && 1591 + var_1->green.offset == var_2->green.offset && 1592 + var_1->green.length == var_2->green.length && 1593 + var_1->green.msb_right == var_2->green.msb_right && 1594 + var_1->blue.offset == var_2->blue.offset && 1595 + var_1->blue.length == var_2->blue.length && 1596 + var_1->blue.msb_right == var_2->blue.msb_right && 1597 + var_1->transp.offset == var_2->transp.offset && 1598 + var_1->transp.length == var_2->transp.length && 1599 + var_1->transp.msb_right == var_2->transp.msb_right; 1600 + } 1601 + 1583 1602 /** 1584 1603 * drm_fb_helper_check_var - implementation for &fb_ops.fb_check_var 1585 1604 * @var: screeninfo to check ··· 1609 1590 { 1610 1591 struct drm_fb_helper *fb_helper = info->par; 1611 1592 struct drm_framebuffer *fb = fb_helper->fb; 1612 - int depth; 1613 1593 1614 1594 if (var->pixclock != 0 || in_dbg_master()) 1615 1595 return -EINVAL; ··· 1628 1610 return -EINVAL; 1629 1611 } 1630 1612 1631 - switch (var->bits_per_pixel) { 1632 - case 16: 1633 - depth = (var->green.length == 6) ? 16 : 15; 1634 - break; 1635 - case 32: 1636 - depth = (var->transp.length > 0) ? 32 : 24; 1637 - break; 1638 - default: 1639 - depth = var->bits_per_pixel; 1640 - break; 1641 - } 1642 - 1643 - switch (depth) { 1644 - case 8: 1645 - var->red.offset = 0; 1646 - var->green.offset = 0; 1647 - var->blue.offset = 0; 1648 - var->red.length = 8; 1649 - var->green.length = 8; 1650 - var->blue.length = 8; 1651 - var->transp.length = 0; 1652 - var->transp.offset = 0; 1653 - break; 1654 - case 15: 1655 - var->red.offset = 10; 1656 - var->green.offset = 5; 1657 - var->blue.offset = 0; 1658 - var->red.length = 5; 1659 - var->green.length = 5; 1660 - var->blue.length = 5; 1661 - var->transp.length = 1; 1662 - var->transp.offset = 15; 1663 - break; 1664 - case 16: 1665 - var->red.offset = 11; 1666 - var->green.offset = 5; 1667 - var->blue.offset = 0; 1668 - var->red.length = 5; 1669 - var->green.length = 6; 1670 - var->blue.length = 5; 1671 - var->transp.length = 0; 1672 - var->transp.offset = 0; 1673 - break; 1674 - case 24: 1675 - var->red.offset = 16; 1676 - var->green.offset = 8; 1677 - var->blue.offset = 0; 1678 - var->red.length = 8; 1679 - var->green.length = 8; 1680 - var->blue.length = 8; 1681 - var->transp.length = 0; 1682 - var->transp.offset = 0; 1683 - break; 1684 - case 32: 1685 - var->red.offset = 16; 1686 - var->green.offset = 8; 1687 - var->blue.offset = 0; 1688 - var->red.length = 8; 1689 - var->green.length = 8; 1690 - var->blue.length = 8; 1691 - var->transp.length = 8; 1692 - var->transp.offset = 24; 1693 - break; 1694 - default: 1613 + /* 1614 + * drm fbdev emulation doesn't support changing the pixel format at all, 1615 + * so reject all pixel format changing requests. 1616 + */ 1617 + if (!drm_fb_pixel_format_equal(var, &info->var)) { 1618 + DRM_DEBUG("fbdev emulation doesn't support changing the pixel format\n"); 1695 1619 return -EINVAL; 1696 1620 } 1621 + 1697 1622 return 0; 1698 1623 } 1699 1624 EXPORT_SYMBOL(drm_fb_helper_check_var);

+3 -3

include/drm/drm_edid.h

··· 214 214 #define DRM_EDID_HDMI_DC_Y444 (1 << 3) 215 215 216 216 /* YCBCR 420 deep color modes */ 217 - #define DRM_EDID_YCBCR420_DC_48 (1 << 6) 218 - #define DRM_EDID_YCBCR420_DC_36 (1 << 5) 219 - #define DRM_EDID_YCBCR420_DC_30 (1 << 4) 217 + #define DRM_EDID_YCBCR420_DC_48 (1 << 2) 218 + #define DRM_EDID_YCBCR420_DC_36 (1 << 1) 219 + #define DRM_EDID_YCBCR420_DC_30 (1 << 0) 220 220 #define DRM_EDID_YCBCR420_DC_MASK (DRM_EDID_YCBCR420_DC_48 | \ 221 221 DRM_EDID_YCBCR420_DC_36 | \ 222 222 DRM_EDID_YCBCR420_DC_30)

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