Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'drm-fixes-2020-05-08' of git://anongit.freedesktop.org/drm/drm
Pull drm fixes from Dave Airlie:
"Another pretty normal week. I didn't get any i915 fixes yet, so next
week I'd expect double the usual i915, but otherwise a bunch of amdgpu
and some scattered other fixes.
hdcp:
- fix HDCP regression
amdgpu:
- Runtime PM fixes
- DC fix for PPC
- Misc DC fixes
virtio:
- fix context ordering issue
sun4i:
- old gcc warning fix
ingenic-drm:
- missing module support"
* tag 'drm-fixes-2020-05-08' of git://anongit.freedesktop.org/drm/drm:
drm/amd/display: Prevent dpcd reads with passive dongles
drm/amd/display: fix counter in wait_for_no_pipes_pending
drm/amd/display: Update DCN2.1 DV Code Revision
drm: Fix HDCP failures when SRM fw is missing
sun6i: dsi: fix gcc-4.8
drm: ingenic-drm: add MODULE_DEVICE_TABLE
drm/virtio: create context before RESOURCE_CREATE_2D in 3D mode
drm/amd/display: work around fp code being emitted outside of DC_FP_START/END
drm/amdgpu/dc: Use WARN_ON_ONCE for ASSERT
drm/amdgpu: drop redundant cg/pg ungate on runpm enter
drm/amdgpu: move kfd suspend after ip_suspend_phase1
+57
-31
+2
-5
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+2
-5
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
···
3372
3372
}
3373
3373
}
3374
3374
3375
-
amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
3376
-
amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
3377
-
3378
-
amdgpu_amdkfd_suspend(adev, !fbcon);
3379
-
3380
3375
amdgpu_ras_suspend(adev);
3381
3376
3382
3377
r = amdgpu_device_ip_suspend_phase1(adev);
3378
+
3379
+
amdgpu_amdkfd_suspend(adev, !fbcon);
3383
3380
3384
3381
/* evict vram memory */
3385
3382
amdgpu_bo_evict_vram(adev);
+11
-6
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+11
-6
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
···
2008
2008
dc_sink_retain(aconnector->dc_sink);
2009
2009
if (sink->dc_edid.length == 0) {
2010
2010
aconnector->edid = NULL;
2011
-
drm_dp_cec_unset_edid(&aconnector->dm_dp_aux.aux);
2011
+
if (aconnector->dc_link->aux_mode) {
2012
+
drm_dp_cec_unset_edid(
2013
+
&aconnector->dm_dp_aux.aux);
2014
+
}
2012
2015
} else {
2013
2016
aconnector->edid =
2014
-
(struct edid *) sink->dc_edid.raw_edid;
2015
-
2017
+
(struct edid *)sink->dc_edid.raw_edid;
2016
2018
2017
2019
drm_connector_update_edid_property(connector,
2018
-
aconnector->edid);
2019
-
drm_dp_cec_set_edid(&aconnector->dm_dp_aux.aux,
2020
-
aconnector->edid);
2020
+
aconnector->edid);
2021
+
2022
+
if (aconnector->dc_link->aux_mode)
2023
+
drm_dp_cec_set_edid(&aconnector->dm_dp_aux.aux,
2024
+
aconnector->edid);
2021
2025
}
2026
+
2022
2027
amdgpu_dm_update_freesync_caps(connector, aconnector->edid);
2023
2028
update_connector_ext_caps(aconnector);
2024
2029
} else {
+2
-3
drivers/gpu/drm/amd/display/dc/core/dc.c
+2
-3
drivers/gpu/drm/amd/display/dc/core/dc.c
···
834
834
static void wait_for_no_pipes_pending(struct dc *dc, struct dc_state *context)
835
835
{
836
836
int i;
837
-
int count = 0;
838
-
struct pipe_ctx *pipe;
839
837
PERF_TRACE();
840
838
for (i = 0; i < MAX_PIPES; i++) {
841
-
pipe = &context->res_ctx.pipe_ctx[i];
839
+
int count = 0;
840
+
struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
842
841
843
842
if (!pipe->plane_state)
844
843
continue;
+23
-8
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+23
-8
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
···
3068
3068
return out;
3069
3069
}
3070
3070
3071
-
3072
-
bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,
3073
-
bool fast_validate)
3071
+
/*
3072
+
* This must be noinline to ensure anything that deals with FP registers
3073
+
* is contained within this call; previously our compiling with hard-float
3074
+
* would result in fp instructions being emitted outside of the boundaries
3075
+
* of the DC_FP_START/END macros, which makes sense as the compiler has no
3076
+
* idea about what is wrapped and what is not
3077
+
*
3078
+
* This is largely just a workaround to avoid breakage introduced with 5.6,
3079
+
* ideally all fp-using code should be moved into its own file, only that
3080
+
* should be compiled with hard-float, and all code exported from there
3081
+
* should be strictly wrapped with DC_FP_START/END
3082
+
*/
3083
+
static noinline bool dcn20_validate_bandwidth_fp(struct dc *dc,
3084
+
struct dc_state *context, bool fast_validate)
3074
3085
{
3075
3086
bool voltage_supported = false;
3076
3087
bool full_pstate_supported = false;
3077
3088
bool dummy_pstate_supported = false;
3078
3089
double p_state_latency_us;
3079
3090
3080
-
DC_FP_START();
3081
3091
p_state_latency_us = context->bw_ctx.dml.soc.dram_clock_change_latency_us;
3082
3092
context->bw_ctx.dml.soc.disable_dram_clock_change_vactive_support =
3083
3093
dc->debug.disable_dram_clock_change_vactive_support;
3084
3094
3085
3095
if (fast_validate) {
3086
-
voltage_supported = dcn20_validate_bandwidth_internal(dc, context, true);
3087
-
3088
-
DC_FP_END();
3089
-
return voltage_supported;
3096
+
return dcn20_validate_bandwidth_internal(dc, context, true);
3090
3097
}
3091
3098
3092
3099
// Best case, we support full UCLK switch latency
···
3122
3115
3123
3116
restore_dml_state:
3124
3117
context->bw_ctx.dml.soc.dram_clock_change_latency_us = p_state_latency_us;
3118
+
return voltage_supported;
3119
+
}
3125
3120
3121
+
bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,
3122
+
bool fast_validate)
3123
+
{
3124
+
bool voltage_supported = false;
3125
+
DC_FP_START();
3126
+
voltage_supported = dcn20_validate_bandwidth_fp(dc, context, fast_validate);
3126
3127
DC_FP_END();
3127
3128
return voltage_supported;
3128
3129
}
+4
-4
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
+4
-4
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
···
1200
1200
min_hratio_fact_l = 1.0;
1201
1201
min_hratio_fact_c = 1.0;
1202
1202
1203
-
if (htaps_l <= 1)
1203
+
if (hratio_l <= 1)
1204
1204
min_hratio_fact_l = 2.0;
1205
1205
else if (htaps_l <= 6) {
1206
1206
if ((hratio_l * 2.0) > 4.0)
···
1216
1216
1217
1217
hscale_pixel_rate_l = min_hratio_fact_l * dppclk_freq_in_mhz;
1218
1218
1219
-
if (htaps_c <= 1)
1219
+
if (hratio_c <= 1)
1220
1220
min_hratio_fact_c = 2.0;
1221
1221
else if (htaps_c <= 6) {
1222
1222
if ((hratio_c * 2.0) > 4.0)
···
1522
1522
1523
1523
disp_dlg_regs->refcyc_per_vm_group_vblank = get_refcyc_per_vm_group_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz;
1524
1524
disp_dlg_regs->refcyc_per_vm_group_flip = get_refcyc_per_vm_group_flip(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz;
1525
-
disp_dlg_regs->refcyc_per_vm_req_vblank = get_refcyc_per_vm_req_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz;
1526
-
disp_dlg_regs->refcyc_per_vm_req_flip = get_refcyc_per_vm_req_flip(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz;
1525
+
disp_dlg_regs->refcyc_per_vm_req_vblank = get_refcyc_per_vm_req_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz * dml_pow(2, 10);
1526
+
disp_dlg_regs->refcyc_per_vm_req_flip = get_refcyc_per_vm_req_flip(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz * dml_pow(2, 10);
1527
1527
1528
1528
// Clamp to max for now
1529
1529
if (disp_dlg_regs->refcyc_per_vm_group_vblank >= (unsigned int)dml_pow(2, 23))
+1
-1
drivers/gpu/drm/amd/display/dc/os_types.h
+1
-1
drivers/gpu/drm/amd/display/dc/os_types.h
+7
-1
drivers/gpu/drm/drm_hdcp.c
+7
-1
drivers/gpu/drm/drm_hdcp.c
···
241
241
242
242
ret = request_firmware_direct(&fw, (const char *)fw_name,
243
243
drm_dev->dev);
244
-
if (ret < 0)
244
+
if (ret < 0) {
245
+
*revoked_ksv_cnt = 0;
246
+
*revoked_ksv_list = NULL;
247
+
ret = 0;
245
248
goto exit;
249
+
}
246
250
247
251
if (fw->size && fw->data)
248
252
ret = drm_hdcp_srm_update(fw->data, fw->size, revoked_ksv_list,
···
291
287
292
288
ret = drm_hdcp_request_srm(drm_dev, &revoked_ksv_list,
293
289
&revoked_ksv_cnt);
290
+
if (ret)
291
+
return ret;
294
292
295
293
/* revoked_ksv_cnt will be zero when above function failed */
296
294
for (i = 0; i < revoked_ksv_cnt; i++)
+1
drivers/gpu/drm/ingenic/ingenic-drm.c
+1
drivers/gpu/drm/ingenic/ingenic-drm.c
+1
-1
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+1
-1
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
···
717
717
struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
718
718
struct sun6i_dsi *dsi = encoder_to_sun6i_dsi(encoder);
719
719
struct mipi_dsi_device *device = dsi->device;
720
-
union phy_configure_opts opts = { 0 };
720
+
union phy_configure_opts opts = { };
721
721
struct phy_configure_opts_mipi_dphy *cfg = &opts.mipi_dphy;
722
722
u16 delay;
723
723
int err;
+1
drivers/gpu/drm/virtio/virtgpu_drv.h
+1
drivers/gpu/drm/virtio/virtgpu_drv.h
···
221
221
/* virtio_ioctl.c */
222
222
#define DRM_VIRTIO_NUM_IOCTLS 10
223
223
extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
224
+
void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file);
224
225
225
226
/* virtio_kms.c */
226
227
int virtio_gpu_init(struct drm_device *dev);
+3
drivers/gpu/drm/virtio/virtgpu_gem.c
+3
drivers/gpu/drm/virtio/virtgpu_gem.c
+1
-2
drivers/gpu/drm/virtio/virtgpu_ioctl.c
+1
-2
drivers/gpu/drm/virtio/virtgpu_ioctl.c
···
34
34
35
35
#include "virtgpu_drv.h"
36
36
37
-
static void virtio_gpu_create_context(struct drm_device *dev,
38
-
struct drm_file *file)
37
+
void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file)
39
38
{
40
39
struct virtio_gpu_device *vgdev = dev->dev_private;
41
40
struct virtio_gpu_fpriv *vfpriv = file->driver_priv;