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dmaengine: dw-edma: fix MSI data programming for multi-IRQ case

When using MSI (not MSI-X) with multiple IRQs, the MSI data value
must be unique per vector to ensure correct interrupt delivery.
Currently, the driver fails to increment the MSI data per vector,
causing interrupts to be misrouted.

Fix this by caching the base MSI data and adjusting each vector's
data accordingly during IRQ setup.

Fixes: e63d79d1ff04 ("dmaengine: dw-edma: Add Synopsys DesignWare eDMA IP core driver")
Signed-off-by: Shenghui Shi <brody.shi@m2semi.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260209103726.414-1-brody.shi@m2semi.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Shenghui Shi and committed by
Vinod Koul 77b19d05 2e7b5cf7

+6 -2
+6 -2
drivers/dma/dw-edma/dw-edma-core.c
··· 844 844 { 845 845 struct dw_edma_chip *chip = dw->chip; 846 846 struct device *dev = dw->chip->dev; 847 + struct msi_desc *msi_desc; 847 848 u32 wr_mask = 1; 848 849 u32 rd_mask = 1; 849 850 int i, err = 0; ··· 896 895 &dw->irq[i]); 897 896 if (err) 898 897 goto err_irq_free; 899 - 900 - if (irq_get_msi_desc(irq)) 898 + msi_desc = irq_get_msi_desc(irq); 899 + if (msi_desc) { 901 900 get_cached_msi_msg(irq, &dw->irq[i].msi); 901 + if (!msi_desc->pci.msi_attrib.is_msix) 902 + dw->irq[i].msi.data = dw->irq[0].msi.data + i; 903 + } 902 904 } 903 905 904 906 dw->nr_irqs = i;