tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

scsi: ufs: qcom : Refactor phy_power_on/off calls

Commit 3f6d1767b1a0 ("phy: ufs-qcom: Refactor all init steps into
phy_poweron") moved the phy_power_on/off from ufs_qcom_setup_clocks
to suspend/resume func.

To have a better power saving, remove the phy_power_on/off calls from
resume/suspend path and put them back to ufs_qcom_setup_clocks, so that
PHY regulators & clks can be turned on/off along with UFS's clocks.

Since phy phy_power_on is separated out from phy calibrate, make
separate calls to phy_power_on calls from ufs qcom driver.

Co-developed-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
Link: https://lore.kernel.org/r/20250526153821.7918-11-quic_nitirawa@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Nitin Rawat and committed by
Vinod Koul 77d2fa54 a079b2d7

+27 -31
+27 -31
drivers/ufs/host/ufs-qcom.c
··· 711 711 enum ufs_notify_change_status status) 712 712 { 713 713 struct ufs_qcom_host *host = ufshcd_get_variant(hba); 714 - struct phy *phy = host->generic_phy; 715 714 716 715 if (status == PRE_CHANGE) 717 716 return 0; 718 717 719 - if (ufs_qcom_is_link_off(hba)) { 720 - /* 721 - * Disable the tx/rx lane symbol clocks before PHY is 722 - * powered down as the PLL source should be disabled 723 - * after downstream clocks are disabled. 724 - */ 718 + if (!ufs_qcom_is_link_active(hba)) 725 719 ufs_qcom_disable_lane_clks(host); 726 - phy_power_off(phy); 727 720 728 - /* reset the connected UFS device during power down */ 721 + 722 + /* reset the connected UFS device during power down */ 723 + if (ufs_qcom_is_link_off(hba) && host->device_reset) 729 724 ufs_qcom_device_reset_ctrl(hba, true); 730 - 731 - } else if (!ufs_qcom_is_link_active(hba)) { 732 - ufs_qcom_disable_lane_clks(host); 733 - } 734 725 735 726 return ufs_qcom_ice_suspend(host); 736 727 } ··· 729 738 static int ufs_qcom_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op) 730 739 { 731 740 struct ufs_qcom_host *host = ufshcd_get_variant(hba); 732 - struct phy *phy = host->generic_phy; 733 741 int err; 734 742 735 - if (ufs_qcom_is_link_off(hba)) { 736 - err = phy_power_on(phy); 737 - if (err) { 738 - dev_err(hba->dev, "%s: failed PHY power on: %d\n", 739 - __func__, err); 740 - return err; 741 - } 742 - 743 - err = ufs_qcom_enable_lane_clks(host); 744 - if (err) 745 - return err; 746 - 747 - } else if (!ufs_qcom_is_link_active(hba)) { 748 - err = ufs_qcom_enable_lane_clks(host); 749 - if (err) 750 - return err; 751 - } 743 + err = ufs_qcom_enable_lane_clks(host); 744 + if (err) 745 + return err; 752 746 753 747 return ufs_qcom_ice_resume(host); 754 748 } ··· 1112 1136 * @on: If true, enable clocks else disable them. 1113 1137 * @status: PRE_CHANGE or POST_CHANGE notify 1114 1138 * 1139 + * There are certain clocks which comes from the PHY so it needs 1140 + * to be managed together along with controller clocks which also 1141 + * provides a better power saving. Hence keep phy_power_off/on calls 1142 + * in ufs_qcom_setup_clocks, so that PHY's regulators & clks can be 1143 + * turned on/off along with UFS's clocks. 1144 + * 1115 1145 * Return: 0 on success, non-zero on failure. 1116 1146 */ 1117 1147 static int ufs_qcom_setup_clocks(struct ufs_hba *hba, bool on, 1118 1148 enum ufs_notify_change_status status) 1119 1149 { 1120 1150 struct ufs_qcom_host *host = ufshcd_get_variant(hba); 1151 + struct phy *phy = host->generic_phy; 1152 + int err; 1121 1153 1122 1154 /* 1123 1155 * In case ufs_qcom_init() is not yet done, simply ignore. ··· 1144 1160 /* disable device ref_clk */ 1145 1161 ufs_qcom_dev_ref_clk_ctrl(host, false); 1146 1162 } 1163 + 1164 + err = phy_power_off(phy); 1165 + if (err) { 1166 + dev_err(hba->dev, "phy power off failed, ret=%d\n", err); 1167 + return err; 1168 + } 1147 1169 } 1148 1170 break; 1149 1171 case POST_CHANGE: 1150 1172 if (on) { 1173 + err = phy_power_on(phy); 1174 + if (err) { 1175 + dev_err(hba->dev, "phy power on failed, ret = %d\n", err); 1176 + return err; 1177 + } 1178 + 1151 1179 /* enable the device ref clock for HS mode*/ 1152 1180 if (ufshcd_is_hs_mode(&hba->pwr_info)) 1153 1181 ufs_qcom_dev_ref_clk_ctrl(host, true);