iio: accel: adxl345: move INT enable to regmap cache

Replace the interrupt enable member variable to the regmap cache. This
makes the function set_interrupts() obsolete. The interrupt enable
register is written when the driver is probed. Thus it is perfectly
cacheable.

Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
Link: https://patch.msgid.link/20250313165049.48305-3-l.rubusch@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

authored by

Lothar Rubusch and committed by

Jonathan Cameron 1 year ago 77d48f5e f184a095

+9 -17

1 changed file

expand all

drivers

iio

accel

adxl345_core.c

+9 -17

drivers/iio/accel/adxl345_core.c

··· 36 36 struct regmap *regmap; 37 37 bool fifo_delay; /* delay: delay is needed for SPI */ 38 38 int irq; 39 - u8 int_map; 40 39 u8 watermark; 41 40 u8 fifo_mode; 42 41 __le16 fifo_buf[ADXL345_DIRS * ADXL345_FIFO_SIZE + 1] __aligned(IIO_DMA_MINALIGN); ··· 111 112 unsigned int val = en ? ADXL345_POWER_CTL_MEASURE : ADXL345_POWER_CTL_STANDBY; 112 113 113 114 return regmap_write(st->regmap, ADXL345_REG_POWER_CTL, val); 114 - } 115 - 116 - static int adxl345_set_interrupts(struct adxl345_state *st) 117 - { 118 - return regmap_write(st->regmap, ADXL345_REG_INT_ENABLE, st->int_map); 119 115 } 120 116 121 117 static int adxl345_read_raw(struct iio_dev *indio_dev, ··· 211 217 static int adxl345_set_watermark(struct iio_dev *indio_dev, unsigned int value) 212 218 { 213 219 struct adxl345_state *st = iio_priv(indio_dev); 214 - unsigned int fifo_mask = 0x1F; 220 + const unsigned int fifo_mask = 0x1F, watermark_mask = 0x02; 215 221 int ret; 216 222 217 223 value = min(value, ADXL345_FIFO_SIZE - 1); ··· 221 227 return ret; 222 228 223 229 st->watermark = value; 224 - st->int_map |= ADXL345_INT_WATERMARK; 225 - 226 - return 0; 230 + return regmap_update_bits(st->regmap, ADXL345_REG_INT_ENABLE, 231 + watermark_mask, ADXL345_INT_WATERMARK); 227 232 } 228 233 229 234 static int adxl345_write_raw_get_fmt(struct iio_dev *indio_dev, ··· 374 381 static int adxl345_buffer_postenable(struct iio_dev *indio_dev) 375 382 { 376 383 struct adxl345_state *st = iio_priv(indio_dev); 377 - int ret; 378 - 379 - ret = adxl345_set_interrupts(st); 380 - if (ret < 0) 381 - return ret; 382 384 383 385 st->fifo_mode = ADXL345_FIFO_STREAM; 384 386 return adxl345_set_fifo(st); ··· 389 401 if (ret < 0) 390 402 return ret; 391 403 392 - st->int_map = 0x00; 393 - return adxl345_set_interrupts(st); 404 + return regmap_write(st->regmap, ADXL345_REG_INT_ENABLE, 0x00); 394 405 } 395 406 396 407 static const struct iio_buffer_setup_ops adxl345_buffer_ops = { ··· 510 523 indio_dev->channels = adxl345_channels; 511 524 indio_dev->num_channels = ARRAY_SIZE(adxl345_channels); 512 525 indio_dev->available_scan_masks = adxl345_scan_masks; 526 + 527 + /* Reset interrupts at start up */ 528 + ret = regmap_write(st->regmap, ADXL345_REG_INT_ENABLE, 0x00); 529 + if (ret) 530 + return ret; 513 531 514 532 if (setup) { 515 533 /* Perform optional initial bus specific configuration */

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