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spi: cadence-qspi: Use a default value for cdns,fifo-width

Bindings expect 4 to be the default value for cdns,fifo-width. Said
otherwise, if the property (which is not mandatory) is not provided, the
OS, in order to comply with the bindings, should not error out and take
4 as default value.

Comply with the bindings. This would have slighlty simplyfied my testing
if it had been implemented correctly in the first place, but in practice
it should have no impact on the existing boards using this controller, as
they all set cdns,fifo-width to 4 explicitly in their upstream DTS.

Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Miquel Raynal (Schneider Electric) <miquel.raynal@bootlin.com>
Tested-by: Santhosh Kumar K <s-k6@ti.com>
Link: https://patch.msgid.link/20260122-schneider-6-19-rc1-qspi-v4-13-f9c21419a3e6@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Miquel Raynal (Schneider Electric) and committed by
Mark Brown
77ee3ba5 590f2430

+2 -4
+2 -4
drivers/spi/spi-cadence-quadspi.c
··· 1598 1598 cqspi->fifo_depth = 0; 1599 1599 } 1600 1600 1601 - if (of_property_read_u32(np, "cdns,fifo-width", &cqspi->fifo_width)) { 1602 - dev_err(dev, "couldn't determine fifo-width\n"); 1603 - return -ENXIO; 1604 - } 1601 + if (of_property_read_u32(np, "cdns,fifo-width", &cqspi->fifo_width)) 1602 + cqspi->fifo_width = 4; 1605 1603 1606 1604 if (of_property_read_u32(np, "cdns,trigger-address", 1607 1605 &cqspi->trigger_address)) {