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Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc

Pull powerpc fixes from Ben Herrenschmidt:
"This includes small series from Michael Neuling to fix a couple of
nasty remaining problems with the new Power8 support, also targeted at
stable 3.10, without which some new userspace accessible registers
aren't properly context switched, and in some case, can be clobbered
by the user of transactional memory.

Along with that, a few slightly more minor things, such as a missing
Kconfig option to enable handling of denorm exceptions when not
running under a hypervisor (or userspace will randomly crash when
hitting denorms with the vector unit), some nasty bugs in the new
pstore oops code, and other simple bug fixes worth having in now.

Note: I picked up the two powerpc KVM fixes as Alex Graf asked me to
handle KVM bits while he is on vacation. However I'll let him decide
whether they should go to -stable or not when he is back"

* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
powerpc/tm: Fix context switching TAR, PPR and DSCR SPRs
powerpc: Save the TAR register earlier
powerpc: Fix context switch DSCR on POWER8
powerpc: Rework setting up H/FSCR bit definitions
powerpc: Fix hypervisor facility unavaliable vector number
powerpc/kvm/book3s_pr: Return appropriate error when allocation fails
powerpc/kvm: Add signed type cast for comparation
powerpc/eeh: Add missing procfs entry for PowerNV
powerpc/pseries: Add backward compatibilty to read old kernel oops-log
powerpc/pseries: Fix buffer overflow when reading from pstore
powerpc: On POWERNV enable PPC_DENORMALISATION by default

+170 -99
+1 -1
arch/powerpc/Kconfig
··· 566 566 config PPC_DENORMALISATION 567 567 bool "PowerPC denormalisation exception handling" 568 568 depends on PPC_BOOK3S_64 569 - default "n" 569 + default "y" if PPC_POWERNV 570 570 ---help--- 571 571 Add support for handling denormalisation of single precision 572 572 values. Useful for bare metal only. If unsure say Y here.
+4
arch/powerpc/include/asm/processor.h
··· 247 247 unsigned long tm_orig_msr; /* Thread's MSR on ctx switch */ 248 248 struct pt_regs ckpt_regs; /* Checkpointed registers */ 249 249 250 + unsigned long tm_tar; 251 + unsigned long tm_ppr; 252 + unsigned long tm_dscr; 253 + 250 254 /* 251 255 * Transactional FP and VSX 0-31 register set. 252 256 * NOTE: the sense of these is the opposite of the integer ckpt_regs!
+20 -11
arch/powerpc/include/asm/reg.h
··· 254 254 #define SPRN_HRMOR 0x139 /* Real mode offset register */ 255 255 #define SPRN_HSRR0 0x13A /* Hypervisor Save/Restore 0 */ 256 256 #define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */ 257 + /* HFSCR and FSCR bit numbers are the same */ 258 + #define FSCR_TAR_LG 8 /* Enable Target Address Register */ 259 + #define FSCR_EBB_LG 7 /* Enable Event Based Branching */ 260 + #define FSCR_TM_LG 5 /* Enable Transactional Memory */ 261 + #define FSCR_PM_LG 4 /* Enable prob/priv access to PMU SPRs */ 262 + #define FSCR_BHRB_LG 3 /* Enable Branch History Rolling Buffer*/ 263 + #define FSCR_DSCR_LG 2 /* Enable Data Stream Control Register */ 264 + #define FSCR_VECVSX_LG 1 /* Enable VMX/VSX */ 265 + #define FSCR_FP_LG 0 /* Enable Floating Point */ 257 266 #define SPRN_FSCR 0x099 /* Facility Status & Control Register */ 258 - #define FSCR_TAR (1 << (63-55)) /* Enable Target Address Register */ 259 - #define FSCR_EBB (1 << (63-56)) /* Enable Event Based Branching */ 260 - #define FSCR_DSCR (1 << (63-61)) /* Enable Data Stream Control Register */ 267 + #define FSCR_TAR __MASK(FSCR_TAR_LG) 268 + #define FSCR_EBB __MASK(FSCR_EBB_LG) 269 + #define FSCR_DSCR __MASK(FSCR_DSCR_LG) 261 270 #define SPRN_HFSCR 0xbe /* HV=1 Facility Status & Control Register */ 262 - #define HFSCR_TAR (1 << (63-55)) /* Enable Target Address Register */ 263 - #define HFSCR_EBB (1 << (63-56)) /* Enable Event Based Branching */ 264 - #define HFSCR_TM (1 << (63-58)) /* Enable Transactional Memory */ 265 - #define HFSCR_PM (1 << (63-60)) /* Enable prob/priv access to PMU SPRs */ 266 - #define HFSCR_BHRB (1 << (63-59)) /* Enable Branch History Rolling Buffer*/ 267 - #define HFSCR_DSCR (1 << (63-61)) /* Enable Data Stream Control Register */ 268 - #define HFSCR_VECVSX (1 << (63-62)) /* Enable VMX/VSX */ 269 - #define HFSCR_FP (1 << (63-63)) /* Enable Floating Point */ 271 + #define HFSCR_TAR __MASK(FSCR_TAR_LG) 272 + #define HFSCR_EBB __MASK(FSCR_EBB_LG) 273 + #define HFSCR_TM __MASK(FSCR_TM_LG) 274 + #define HFSCR_PM __MASK(FSCR_PM_LG) 275 + #define HFSCR_BHRB __MASK(FSCR_BHRB_LG) 276 + #define HFSCR_DSCR __MASK(FSCR_DSCR_LG) 277 + #define HFSCR_VECVSX __MASK(FSCR_VECVSX_LG) 278 + #define HFSCR_FP __MASK(FSCR_FP_LG) 270 279 #define SPRN_TAR 0x32f /* Target Address Register */ 271 280 #define SPRN_LPCR 0x13E /* LPAR Control Register */ 272 281 #define LPCR_VPM0 (1ul << (63-0))
+9
arch/powerpc/include/asm/switch_to.h
··· 15 15 struct thread_struct; 16 16 extern struct task_struct *_switch(struct thread_struct *prev, 17 17 struct thread_struct *next); 18 + #ifdef CONFIG_PPC_BOOK3S_64 19 + static inline void save_tar(struct thread_struct *prev) 20 + { 21 + if (cpu_has_feature(CPU_FTR_ARCH_207S)) 22 + prev->tar = mfspr(SPRN_TAR); 23 + } 24 + #else 25 + static inline void save_tar(struct thread_struct *prev) {} 26 + #endif 18 27 19 28 extern void giveup_fpu(struct task_struct *); 20 29 extern void load_up_fpu(void);
+3
arch/powerpc/kernel/asm-offsets.c
··· 138 138 DEFINE(THREAD_TM_TFHAR, offsetof(struct thread_struct, tm_tfhar)); 139 139 DEFINE(THREAD_TM_TEXASR, offsetof(struct thread_struct, tm_texasr)); 140 140 DEFINE(THREAD_TM_TFIAR, offsetof(struct thread_struct, tm_tfiar)); 141 + DEFINE(THREAD_TM_TAR, offsetof(struct thread_struct, tm_tar)); 142 + DEFINE(THREAD_TM_PPR, offsetof(struct thread_struct, tm_ppr)); 143 + DEFINE(THREAD_TM_DSCR, offsetof(struct thread_struct, tm_dscr)); 141 144 DEFINE(PT_CKPT_REGS, offsetof(struct thread_struct, ckpt_regs)); 142 145 DEFINE(THREAD_TRANSACT_VR0, offsetof(struct thread_struct, 143 146 transact_vr[0]));
+1 -1
arch/powerpc/kernel/eeh.c
··· 1061 1061 1062 1062 static int __init eeh_init_proc(void) 1063 1063 { 1064 - if (machine_is(pseries)) 1064 + if (machine_is(pseries) || machine_is(powernv)) 1065 1065 proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations); 1066 1066 return 0; 1067 1067 }
+26 -10
arch/powerpc/kernel/entry_64.S
··· 449 449 450 450 #ifdef CONFIG_PPC_BOOK3S_64 451 451 BEGIN_FTR_SECTION 452 - /* 453 - * Back up the TAR across context switches. Note that the TAR is not 454 - * available for use in the kernel. (To provide this, the TAR should 455 - * be backed up/restored on exception entry/exit instead, and be in 456 - * pt_regs. FIXME, this should be in pt_regs anyway (for debug).) 457 - */ 458 - mfspr r0,SPRN_TAR 459 - std r0,THREAD_TAR(r3) 460 - 461 452 /* Event based branch registers */ 462 453 mfspr r0, SPRN_BESCR 463 454 std r0, THREAD_BESCR(r3) ··· 575 584 ld r7,DSCR_DEFAULT@toc(2) 576 585 ld r0,THREAD_DSCR(r4) 577 586 cmpwi r6,0 587 + li r8, FSCR_DSCR 578 588 bne 1f 579 589 ld r0,0(r7) 580 - 1: cmpd r0,r25 590 + b 3f 591 + 1: 592 + BEGIN_FTR_SECTION_NESTED(70) 593 + mfspr r6, SPRN_FSCR 594 + or r6, r6, r8 595 + mtspr SPRN_FSCR, r6 596 + BEGIN_FTR_SECTION_NESTED(69) 597 + mfspr r6, SPRN_HFSCR 598 + or r6, r6, r8 599 + mtspr SPRN_HFSCR, r6 600 + END_FTR_SECTION_NESTED(CPU_FTR_HVMODE, CPU_FTR_HVMODE, 69) 601 + b 4f 602 + END_FTR_SECTION_NESTED(CPU_FTR_ARCH_207S, CPU_FTR_ARCH_207S, 70) 603 + 3: 604 + BEGIN_FTR_SECTION_NESTED(70) 605 + mfspr r6, SPRN_FSCR 606 + andc r6, r6, r8 607 + mtspr SPRN_FSCR, r6 608 + BEGIN_FTR_SECTION_NESTED(69) 609 + mfspr r6, SPRN_HFSCR 610 + andc r6, r6, r8 611 + mtspr SPRN_HFSCR, r6 612 + END_FTR_SECTION_NESTED(CPU_FTR_HVMODE, CPU_FTR_HVMODE, 69) 613 + END_FTR_SECTION_NESTED(CPU_FTR_ARCH_207S, CPU_FTR_ARCH_207S, 70) 614 + 4: cmpd r0,r25 581 615 beq 2f 582 616 mtspr SPRN_DSCR,r0 583 617 2:
+3 -2
arch/powerpc/kernel/exceptions-64s.S
··· 848 848 . = 0x4f80 849 849 SET_SCRATCH0(r13) 850 850 EXCEPTION_PROLOG_0(PACA_EXGEN) 851 - b facility_unavailable_relon_hv 851 + b hv_facility_unavailable_relon_hv 852 852 853 853 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint) 854 854 #ifdef CONFIG_PPC_DENORMALISATION ··· 1175 1175 b .ret_from_except 1176 1176 1177 1177 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, .facility_unavailable_exception) 1178 + STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, .facility_unavailable_exception) 1178 1179 1179 1180 .align 7 1180 1181 .globl __end_handlers ··· 1189 1188 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) 1190 1189 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) 1191 1190 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) 1192 - STD_RELON_EXCEPTION_HV_OOL(0xf80, facility_unavailable) 1191 + STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable) 1193 1192 1194 1193 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) 1195 1194 /*
+10
arch/powerpc/kernel/process.c
··· 600 600 struct ppc64_tlb_batch *batch; 601 601 #endif 602 602 603 + /* Back up the TAR across context switches. 604 + * Note that the TAR is not available for use in the kernel. (To 605 + * provide this, the TAR should be backed up/restored on exception 606 + * entry/exit instead, and be in pt_regs. FIXME, this should be in 607 + * pt_regs anyway (for debug).) 608 + * Save the TAR here before we do treclaim/trecheckpoint as these 609 + * will change the TAR. 610 + */ 611 + save_tar(&prev->thread); 612 + 603 613 __switch_to_tm(prev); 604 614 605 615 #ifdef CONFIG_SMP
+20
arch/powerpc/kernel/tm.S
··· 233 233 std r5, _CCR(r7) 234 234 std r6, _XER(r7) 235 235 236 + 237 + /* ******************** TAR, PPR, DSCR ********** */ 238 + mfspr r3, SPRN_TAR 239 + mfspr r4, SPRN_PPR 240 + mfspr r5, SPRN_DSCR 241 + 242 + std r3, THREAD_TM_TAR(r12) 243 + std r4, THREAD_TM_PPR(r12) 244 + std r5, THREAD_TM_DSCR(r12) 245 + 236 246 /* MSR and flags: We don't change CRs, and we don't need to alter 237 247 * MSR. 238 248 */ ··· 357 347 mtmsr r6 /* FP/Vec off again! */ 358 348 359 349 restore_gprs: 350 + 351 + /* ******************** TAR, PPR, DSCR ********** */ 352 + ld r4, THREAD_TM_TAR(r3) 353 + ld r5, THREAD_TM_PPR(r3) 354 + ld r6, THREAD_TM_DSCR(r3) 355 + 356 + mtspr SPRN_TAR, r4 357 + mtspr SPRN_PPR, r5 358 + mtspr SPRN_DSCR, r6 359 + 360 360 /* ******************** CR,LR,CCR,MSR ********** */ 361 361 ld r3, _CTR(r7) 362 362 ld r4, _LINK(r7)
+34 -24
arch/powerpc/kernel/traps.c
··· 44 44 #include <asm/machdep.h> 45 45 #include <asm/rtas.h> 46 46 #include <asm/pmc.h> 47 - #ifdef CONFIG_PPC32 48 47 #include <asm/reg.h> 49 - #endif 50 48 #ifdef CONFIG_PMAC_BACKLIGHT 51 49 #include <asm/backlight.h> 52 50 #endif ··· 1294 1296 die("Unrecoverable VSX Unavailable Exception", regs, SIGABRT); 1295 1297 } 1296 1298 1299 + #ifdef CONFIG_PPC64 1297 1300 void facility_unavailable_exception(struct pt_regs *regs) 1298 1301 { 1299 1302 static char *facility_strings[] = { 1300 - "FPU", 1301 - "VMX/VSX", 1302 - "DSCR", 1303 - "PMU SPRs", 1304 - "BHRB", 1305 - "TM", 1306 - "AT", 1307 - "EBB", 1308 - "TAR", 1303 + [FSCR_FP_LG] = "FPU", 1304 + [FSCR_VECVSX_LG] = "VMX/VSX", 1305 + [FSCR_DSCR_LG] = "DSCR", 1306 + [FSCR_PM_LG] = "PMU SPRs", 1307 + [FSCR_BHRB_LG] = "BHRB", 1308 + [FSCR_TM_LG] = "TM", 1309 + [FSCR_EBB_LG] = "EBB", 1310 + [FSCR_TAR_LG] = "TAR", 1309 1311 }; 1310 - char *facility, *prefix; 1312 + char *facility = "unknown"; 1311 1313 u64 value; 1314 + u8 status; 1315 + bool hv; 1312 1316 1313 - if (regs->trap == 0xf60) { 1314 - value = mfspr(SPRN_FSCR); 1315 - prefix = ""; 1316 - } else { 1317 + hv = (regs->trap == 0xf80); 1318 + if (hv) 1317 1319 value = mfspr(SPRN_HFSCR); 1318 - prefix = "Hypervisor "; 1320 + else 1321 + value = mfspr(SPRN_FSCR); 1322 + 1323 + status = value >> 56; 1324 + if (status == FSCR_DSCR_LG) { 1325 + /* User is acessing the DSCR. Set the inherit bit and allow 1326 + * the user to set it directly in future by setting via the 1327 + * H/FSCR DSCR bit. 1328 + */ 1329 + current->thread.dscr_inherit = 1; 1330 + if (hv) 1331 + mtspr(SPRN_HFSCR, value | HFSCR_DSCR); 1332 + else 1333 + mtspr(SPRN_FSCR, value | FSCR_DSCR); 1334 + return; 1319 1335 } 1320 1336 1321 - value = value >> 56; 1337 + if ((status < ARRAY_SIZE(facility_strings)) && 1338 + facility_strings[status]) 1339 + facility = facility_strings[status]; 1322 1340 1323 1341 /* We restore the interrupt state now */ 1324 1342 if (!arch_irq_disabled_regs(regs)) 1325 1343 local_irq_enable(); 1326 1344 1327 - if (value < ARRAY_SIZE(facility_strings)) 1328 - facility = facility_strings[value]; 1329 - else 1330 - facility = "unknown"; 1331 - 1332 1345 pr_err("%sFacility '%s' unavailable, exception at 0x%lx, MSR=%lx\n", 1333 - prefix, facility, regs->nip, regs->msr); 1346 + hv ? "Hypervisor " : "", facility, regs->nip, regs->msr); 1334 1347 1335 1348 if (user_mode(regs)) { 1336 1349 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); ··· 1350 1341 1351 1342 die("Unexpected facility unavailable exception", regs, SIGABRT); 1352 1343 } 1344 + #endif 1353 1345 1354 1346 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1355 1347
+2 -2
arch/powerpc/kvm/book3s_hv.c
··· 1809 1809 rma_size <<= PAGE_SHIFT; 1810 1810 rmls = lpcr_rmls(rma_size); 1811 1811 err = -EINVAL; 1812 - if (rmls < 0) { 1812 + if ((long)rmls < 0) { 1813 1813 pr_err("KVM: Can't use RMA of 0x%lx bytes\n", rma_size); 1814 1814 goto out_srcu; 1815 1815 } ··· 1874 1874 /* Allocate the guest's logical partition ID */ 1875 1875 1876 1876 lpid = kvmppc_alloc_lpid(); 1877 - if (lpid < 0) 1877 + if ((long)lpid < 0) 1878 1878 return -ENOMEM; 1879 1879 kvm->arch.lpid = lpid; 1880 1880
+3 -2
arch/powerpc/kvm/book3s_pr.c
··· 1047 1047 if (err) 1048 1048 goto free_shadow_vcpu; 1049 1049 1050 + err = -ENOMEM; 1050 1051 p = __get_free_page(GFP_KERNEL|__GFP_ZERO); 1051 - /* the real shared page fills the last 4k of our page */ 1052 - vcpu->arch.shared = (void*)(p + PAGE_SIZE - 4096); 1053 1052 if (!p) 1054 1053 goto uninit_vcpu; 1054 + /* the real shared page fills the last 4k of our page */ 1055 + vcpu->arch.shared = (void *)(p + PAGE_SIZE - 4096); 1055 1056 1056 1057 #ifdef CONFIG_PPC_BOOK3S_64 1057 1058 /* default to book3s_64 (970fx) */
+34 -46
arch/powerpc/platforms/pseries/nvram.c
··· 569 569 return ret; 570 570 } 571 571 572 - static int unzip_oops(char *oops_buf, char *big_buf) 573 - { 574 - struct oops_log_info *oops_hdr = (struct oops_log_info *)oops_buf; 575 - u64 timestamp = oops_hdr->timestamp; 576 - char *big_oops_data = NULL; 577 - char *oops_data_buf = NULL; 578 - size_t big_oops_data_sz; 579 - int unzipped_len; 580 - 581 - big_oops_data = big_buf + sizeof(struct oops_log_info); 582 - big_oops_data_sz = big_oops_buf_sz - sizeof(struct oops_log_info); 583 - oops_data_buf = oops_buf + sizeof(struct oops_log_info); 584 - 585 - unzipped_len = nvram_decompress(oops_data_buf, big_oops_data, 586 - oops_hdr->report_length, 587 - big_oops_data_sz); 588 - 589 - if (unzipped_len < 0) { 590 - pr_err("nvram: decompression failed; returned %d\n", 591 - unzipped_len); 592 - return -1; 593 - } 594 - oops_hdr = (struct oops_log_info *)big_buf; 595 - oops_hdr->version = OOPS_HDR_VERSION; 596 - oops_hdr->report_length = (u16) unzipped_len; 597 - oops_hdr->timestamp = timestamp; 598 - return 0; 599 - } 600 - 601 572 static int nvram_pstore_open(struct pstore_info *psi) 602 573 { 603 574 /* Reset the iterator to start reading partitions again */ ··· 656 685 unsigned int err_type, id_no, size = 0; 657 686 struct nvram_os_partition *part = NULL; 658 687 char *buff = NULL, *big_buff = NULL; 659 - int rc, sig = 0; 688 + int sig = 0; 660 689 loff_t p; 661 690 662 - read_partition: 663 691 read_type++; 664 692 665 693 switch (nvram_type_ids[read_type]) { ··· 719 749 *id = id_no; 720 750 721 751 if (nvram_type_ids[read_type] == PSTORE_TYPE_DMESG) { 752 + int length, unzipped_len; 753 + size_t hdr_size; 754 + 722 755 oops_hdr = (struct oops_log_info *)buff; 723 - *buf = buff + sizeof(*oops_hdr); 756 + if (oops_hdr->version < OOPS_HDR_VERSION) { 757 + /* Old format oops header had 2-byte record size */ 758 + hdr_size = sizeof(u16); 759 + length = oops_hdr->version; 760 + time->tv_sec = 0; 761 + time->tv_nsec = 0; 762 + } else { 763 + hdr_size = sizeof(*oops_hdr); 764 + length = oops_hdr->report_length; 765 + time->tv_sec = oops_hdr->timestamp; 766 + time->tv_nsec = 0; 767 + } 768 + *buf = kmalloc(length, GFP_KERNEL); 769 + if (*buf == NULL) 770 + return -ENOMEM; 771 + memcpy(*buf, buff + hdr_size, length); 772 + kfree(buff); 724 773 725 774 if (err_type == ERR_TYPE_KERNEL_PANIC_GZ) { 726 775 big_buff = kmalloc(big_oops_buf_sz, GFP_KERNEL); 727 776 if (!big_buff) 728 777 return -ENOMEM; 729 778 730 - rc = unzip_oops(buff, big_buff); 779 + unzipped_len = nvram_decompress(*buf, big_buff, 780 + length, big_oops_buf_sz); 731 781 732 - if (rc != 0) { 733 - kfree(buff); 782 + if (unzipped_len < 0) { 783 + pr_err("nvram: decompression failed, returned " 784 + "rc %d\n", unzipped_len); 734 785 kfree(big_buff); 735 - goto read_partition; 786 + } else { 787 + *buf = big_buff; 788 + length = unzipped_len; 736 789 } 737 - 738 - oops_hdr = (struct oops_log_info *)big_buff; 739 - *buf = big_buff + sizeof(*oops_hdr); 740 - kfree(buff); 741 790 } 742 - 743 - time->tv_sec = oops_hdr->timestamp; 744 - time->tv_nsec = 0; 745 - return oops_hdr->report_length; 791 + return length; 746 792 } 747 793 748 794 *buf = buff; ··· 802 816 static void __init nvram_init_oops_partition(int rtas_partition_exists) 803 817 { 804 818 int rc; 819 + size_t size; 805 820 806 821 rc = pseries_nvram_init_os_partition(&oops_log_partition); 807 822 if (rc != 0) { ··· 831 844 big_oops_buf_sz = (oops_data_sz * 100) / 45; 832 845 big_oops_buf = kmalloc(big_oops_buf_sz, GFP_KERNEL); 833 846 if (big_oops_buf) { 834 - stream.workspace = kmalloc(zlib_deflate_workspacesize( 835 - WINDOW_BITS, MEM_LEVEL), GFP_KERNEL); 847 + size = max(zlib_deflate_workspacesize(WINDOW_BITS, MEM_LEVEL), 848 + zlib_inflate_workspacesize()); 849 + stream.workspace = kmalloc(size, GFP_KERNEL); 836 850 if (!stream.workspace) { 837 851 pr_err("nvram: No memory for compression workspace; " 838 852 "skipping compression of %s partition data\n",