Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'staging-4.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging
Pull staging/IIO fixes from Greg KH:
"Here are a small number of staging and iio driver fixes for 4.16-rc2.
The IIO fixes are all for reported things, and the android driver
fixes also resolve some reported problems. The remaining fsl-mc
Kconfig change resolves a build testing error that Arnd reported.
All of these have been in linux-next with no reported issues"
* tag 'staging-4.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging:
iio: buffer: check if a buffer has been set up when poll is called
iio: adis_lib: Initialize trigger before requesting interrupt
staging: android: ion: Zero CMA allocated memory
staging: android: ashmem: Fix a race condition in pin ioctls
staging: fsl-mc: fix build testing on x86
iio: srf08: fix link error "devm_iio_triggered_buffer_setup" undefined
staging: iio: ad5933: switch buffer mode to software
iio: adc: stm32: fix stm32h7_adc_enable error handling
staging: iio: adc: ad7192: fix external frequency setting
iio: adc: aspeed: Fix error handling path
+65
-31
+4
-3
drivers/iio/adc/aspeed_adc.c
+4
-3
drivers/iio/adc/aspeed_adc.c
···
243
243
ASPEED_ADC_INIT_POLLING_TIME,
244
244
ASPEED_ADC_INIT_TIMEOUT);
245
245
if (ret)
246
-
goto scaler_error;
246
+
goto poll_timeout_error;
247
247
}
248
248
249
249
/* Start all channels in normal mode. */
···
274
274
writel(ASPEED_OPERATION_MODE_POWER_DOWN,
275
275
data->base + ASPEED_REG_ENGINE_CONTROL);
276
276
clk_disable_unprepare(data->clk_scaler->clk);
277
-
reset_error:
278
-
reset_control_assert(data->rst);
279
277
clk_enable_error:
278
+
poll_timeout_error:
279
+
reset_control_assert(data->rst);
280
+
reset_error:
280
281
clk_hw_unregister_divider(data->clk_scaler);
281
282
scaler_error:
282
283
clk_hw_unregister_divider(data->clk_prescaler);
+4
-3
drivers/iio/adc/stm32-adc.c
+4
-3
drivers/iio/adc/stm32-adc.c
···
722
722
int ret;
723
723
u32 val;
724
724
725
-
/* Clear ADRDY by writing one, then enable ADC */
726
-
stm32_adc_set_bits(adc, STM32H7_ADC_ISR, STM32H7_ADRDY);
727
725
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADEN);
728
726
729
727
/* Poll for ADRDY to be set (after adc startup time) */
···
729
731
val & STM32H7_ADRDY,
730
732
100, STM32_ADC_TIMEOUT_US);
731
733
if (ret) {
732
-
stm32_adc_clr_bits(adc, STM32H7_ADC_CR, STM32H7_ADEN);
734
+
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADDIS);
733
735
dev_err(&indio_dev->dev, "Failed to enable ADC\n");
736
+
} else {
737
+
/* Clear ADRDY by writing one */
738
+
stm32_adc_set_bits(adc, STM32H7_ADC_ISR, STM32H7_ADRDY);
734
739
}
735
740
736
741
return ret;
+4
-3
drivers/iio/imu/adis_trigger.c
+4
-3
drivers/iio/imu/adis_trigger.c
···
46
46
if (adis->trig == NULL)
47
47
return -ENOMEM;
48
48
49
+
adis->trig->dev.parent = &adis->spi->dev;
50
+
adis->trig->ops = &adis_trigger_ops;
51
+
iio_trigger_set_drvdata(adis->trig, adis);
52
+
49
53
ret = request_irq(adis->spi->irq,
50
54
&iio_trigger_generic_data_rdy_poll,
51
55
IRQF_TRIGGER_RISING,
···
58
54
if (ret)
59
55
goto error_free_trig;
60
56
61
-
adis->trig->dev.parent = &adis->spi->dev;
62
-
adis->trig->ops = &adis_trigger_ops;
63
-
iio_trigger_set_drvdata(adis->trig, adis);
64
57
ret = iio_trigger_register(adis->trig);
65
58
66
59
indio_dev->trig = iio_trigger_get(adis->trig);
+1
-1
drivers/iio/industrialio-buffer.c
+1
-1
drivers/iio/industrialio-buffer.c
+2
drivers/iio/proximity/Kconfig
+2
drivers/iio/proximity/Kconfig
+12
-9
drivers/staging/android/ashmem.c
+12
-9
drivers/staging/android/ashmem.c
···
702
702
size_t pgstart, pgend;
703
703
int ret = -EINVAL;
704
704
705
-
if (unlikely(!asma->file))
706
-
return -EINVAL;
705
+
mutex_lock(&ashmem_mutex);
707
706
708
-
if (unlikely(copy_from_user(&pin, p, sizeof(pin))))
709
-
return -EFAULT;
707
+
if (unlikely(!asma->file))
708
+
goto out_unlock;
709
+
710
+
if (unlikely(copy_from_user(&pin, p, sizeof(pin)))) {
711
+
ret = -EFAULT;
712
+
goto out_unlock;
713
+
}
710
714
711
715
/* per custom, you can pass zero for len to mean "everything onward" */
712
716
if (!pin.len)
713
717
pin.len = PAGE_ALIGN(asma->size) - pin.offset;
714
718
715
719
if (unlikely((pin.offset | pin.len) & ~PAGE_MASK))
716
-
return -EINVAL;
720
+
goto out_unlock;
717
721
718
722
if (unlikely(((__u32)-1) - pin.offset < pin.len))
719
-
return -EINVAL;
723
+
goto out_unlock;
720
724
721
725
if (unlikely(PAGE_ALIGN(asma->size) < pin.offset + pin.len))
722
-
return -EINVAL;
726
+
goto out_unlock;
723
727
724
728
pgstart = pin.offset / PAGE_SIZE;
725
729
pgend = pgstart + (pin.len / PAGE_SIZE) - 1;
726
-
727
-
mutex_lock(&ashmem_mutex);
728
730
729
731
switch (cmd) {
730
732
case ASHMEM_PIN:
···
740
738
break;
741
739
}
742
740
741
+
out_unlock:
743
742
mutex_unlock(&ashmem_mutex);
744
743
745
744
return ret;
+17
drivers/staging/android/ion/ion_cma_heap.c
+17
drivers/staging/android/ion/ion_cma_heap.c
···
12
12
#include <linux/err.h>
13
13
#include <linux/cma.h>
14
14
#include <linux/scatterlist.h>
15
+
#include <linux/highmem.h>
15
16
16
17
#include "ion.h"
17
18
···
42
41
pages = cma_alloc(cma_heap->cma, nr_pages, align, GFP_KERNEL);
43
42
if (!pages)
44
43
return -ENOMEM;
44
+
45
+
if (PageHighMem(pages)) {
46
+
unsigned long nr_clear_pages = nr_pages;
47
+
struct page *page = pages;
48
+
49
+
while (nr_clear_pages > 0) {
50
+
void *vaddr = kmap_atomic(page);
51
+
52
+
memset(vaddr, 0, PAGE_SIZE);
53
+
kunmap_atomic(vaddr);
54
+
page++;
55
+
nr_clear_pages--;
56
+
}
57
+
} else {
58
+
memset(page_address(pages), 0, size);
59
+
}
45
60
46
61
table = kmalloc(sizeof(*table), GFP_KERNEL);
47
62
if (!table)
+1
-1
drivers/staging/fsl-mc/bus/Kconfig
+1
-1
drivers/staging/fsl-mc/bus/Kconfig
···
7
7
8
8
config FSL_MC_BUS
9
9
bool "QorIQ DPAA2 fsl-mc bus driver"
10
-
depends on OF && (ARCH_LAYERSCAPE || (COMPILE_TEST && (ARM || ARM64 || X86 || PPC)))
10
+
depends on OF && (ARCH_LAYERSCAPE || (COMPILE_TEST && (ARM || ARM64 || X86_LOCAL_APIC || PPC)))
11
11
select GENERIC_MSI_IRQ_DOMAIN
12
12
help
13
13
Driver to enable the bus infrastructure for the QorIQ DPAA2
+19
-8
drivers/staging/iio/adc/ad7192.c
+19
-8
drivers/staging/iio/adc/ad7192.c
···
141
141
#define AD7192_GPOCON_P1DAT BIT(1) /* P1 state */
142
142
#define AD7192_GPOCON_P0DAT BIT(0) /* P0 state */
143
143
144
+
#define AD7192_EXT_FREQ_MHZ_MIN 2457600
145
+
#define AD7192_EXT_FREQ_MHZ_MAX 5120000
144
146
#define AD7192_INT_FREQ_MHZ 4915200
145
147
146
148
/* NOTE:
···
220
218
ARRAY_SIZE(ad7192_calib_arr));
221
219
}
222
220
221
+
static inline bool ad7192_valid_external_frequency(u32 freq)
222
+
{
223
+
return (freq >= AD7192_EXT_FREQ_MHZ_MIN &&
224
+
freq <= AD7192_EXT_FREQ_MHZ_MAX);
225
+
}
226
+
223
227
static int ad7192_setup(struct ad7192_state *st,
224
228
const struct ad7192_platform_data *pdata)
225
229
{
···
251
243
id);
252
244
253
245
switch (pdata->clock_source_sel) {
254
-
case AD7192_CLK_EXT_MCLK1_2:
255
-
case AD7192_CLK_EXT_MCLK2:
256
-
st->mclk = AD7192_INT_FREQ_MHZ;
257
-
break;
258
246
case AD7192_CLK_INT:
259
247
case AD7192_CLK_INT_CO:
260
-
if (pdata->ext_clk_hz)
261
-
st->mclk = pdata->ext_clk_hz;
262
-
else
263
-
st->mclk = AD7192_INT_FREQ_MHZ;
248
+
st->mclk = AD7192_INT_FREQ_MHZ;
264
249
break;
250
+
case AD7192_CLK_EXT_MCLK1_2:
251
+
case AD7192_CLK_EXT_MCLK2:
252
+
if (ad7192_valid_external_frequency(pdata->ext_clk_hz)) {
253
+
st->mclk = pdata->ext_clk_hz;
254
+
break;
255
+
}
256
+
dev_err(&st->sd.spi->dev, "Invalid frequency setting %u\n",
257
+
pdata->ext_clk_hz);
258
+
ret = -EINVAL;
259
+
goto out;
265
260
default:
266
261
ret = -EINVAL;
267
262
goto out;
+1
-3
drivers/staging/iio/impedance-analyzer/ad5933.c
+1
-3
drivers/staging/iio/impedance-analyzer/ad5933.c
···
648
648
/* Ring buffer functions - here trigger setup related */
649
649
indio_dev->setup_ops = &ad5933_ring_setup_ops;
650
650
651
-
indio_dev->modes |= INDIO_BUFFER_HARDWARE;
652
-
653
651
return 0;
654
652
}
655
653
···
760
762
indio_dev->dev.parent = &client->dev;
761
763
indio_dev->info = &ad5933_info;
762
764
indio_dev->name = id->name;
763
-
indio_dev->modes = INDIO_DIRECT_MODE;
765
+
indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE);
764
766
indio_dev->channels = ad5933_channels;
765
767
indio_dev->num_channels = ARRAY_SIZE(ad5933_channels);
766
768