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iio: adc: ti-ads7950: use iio_push_to_buffers_with_ts_unaligned()

Use iio_push_to_buffers_with_ts_unaligned() to avoid unaligned access
when writing the timestamp in the rx_buf.

The previous implementation would have been fine on architectures that
support 4-byte alignment of 64-bit integers but could cause issues on
architectures that require 8-byte alignment.

Fixes: 902c4b2446d4 ("iio: adc: New driver for TI ADS7950 chips")
Signed-off-by: David Lechner <dlechner@baylibre.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

authored by

David Lechner and committed by
Jonathan Cameron 7806c060 1ac30f58

+5 -6
+5 -6
drivers/iio/adc/ti-ads7950.c
··· 47 47 #define TI_ADS7950_MAX_CHAN 16 48 48 #define TI_ADS7950_NUM_GPIOS 4 49 49 50 - #define TI_ADS7950_TIMESTAMP_SIZE (sizeof(int64_t) / sizeof(__be16)) 51 - 52 50 /* val = value, dec = left shift, bits = number of bits of the mask */ 53 51 #define TI_ADS7950_EXTRACT(val, dec, bits) \ 54 52 (((val) >> (dec)) & ((1 << (bits)) - 1)) ··· 103 105 * DMA (thus cache coherency maintenance) may require the 104 106 * transfer buffers to live in their own cache lines. 105 107 */ 106 - u16 rx_buf[TI_ADS7950_MAX_CHAN + 2 + TI_ADS7950_TIMESTAMP_SIZE] 107 - __aligned(IIO_DMA_MINALIGN); 108 + u16 rx_buf[TI_ADS7950_MAX_CHAN + 2] __aligned(IIO_DMA_MINALIGN); 108 109 u16 tx_buf[TI_ADS7950_MAX_CHAN + 2]; 109 110 u16 single_tx; 110 111 u16 single_rx; ··· 304 307 if (ret < 0) 305 308 goto out; 306 309 307 - iio_push_to_buffers_with_timestamp(indio_dev, &st->rx_buf[2], 308 - iio_get_time_ns(indio_dev)); 310 + iio_push_to_buffers_with_ts_unaligned(indio_dev, &st->rx_buf[2], 311 + sizeof(*st->rx_buf) * 312 + TI_ADS7950_MAX_CHAN, 313 + iio_get_time_ns(indio_dev)); 309 314 310 315 out: 311 316 mutex_unlock(&st->slock);