Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Conflicts:
drivers/net/ethernet/mediatek/mtk_ppe.c
3fbe4d8c0e53 ("net: ethernet: mtk_eth_soc: ppe: add support for flow accounting")
924531326e2d ("net: ethernet: mtk_eth_soc: add missing ppe cache flush when deleting a flow")
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+4204
-1396
+11
.mailmap
+11
.mailmap
···
133
133
Domen Puncer <domen@coderock.org>
134
134
Douglas Gilbert <dougg@torque.net>
135
135
Ed L. Cashin <ecashin@coraid.com>
136
+
Enric Balletbo i Serra <eballetbo@kernel.org> <enric.balletbo@collabora.com>
137
+
Enric Balletbo i Serra <eballetbo@kernel.org> <eballetbo@iseebcn.com>
136
138
Erik Kaneda <erik.kaneda@intel.com> <erik.schmauss@intel.com>
137
139
Eugen Hristev <eugen.hristev@collabora.com> <eugen.hristev@microchip.com>
138
140
Evgeniy Polyakov <johnpol@2ka.mipt.ru>
···
381
379
Quentin Perret <qperret@qperret.net> <quentin.perret@arm.com>
382
380
Rafael J. Wysocki <rjw@rjwysocki.net> <rjw@sisk.pl>
383
381
Rajeev Nandan <quic_rajeevny@quicinc.com> <rajeevny@codeaurora.org>
382
+
Rajendra Nayak <quic_rjendra@quicinc.com> <rnayak@codeaurora.org>
384
383
Rajesh Shah <rajesh.shah@intel.com>
385
384
Ralf Baechle <ralf@linux-mips.org>
386
385
Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
···
390
387
Ricardo Ribalda <ribalda@kernel.org> <ricardo@ribalda.com>
391
388
Ricardo Ribalda <ribalda@kernel.org> Ricardo Ribalda Delgado <ribalda@kernel.org>
392
389
Ricardo Ribalda <ribalda@kernel.org> <ricardo.ribalda@gmail.com>
390
+
Richard Leitner <richard.leitner@linux.dev> <dev@g0hl1n.net>
391
+
Richard Leitner <richard.leitner@linux.dev> <me@g0hl1n.net>
392
+
Richard Leitner <richard.leitner@linux.dev> <richard.leitner@skidata.com>
393
393
Robert Foss <rfoss@kernel.org> <robert.foss@linaro.org>
394
394
Roman Gushchin <roman.gushchin@linux.dev> <guro@fb.com>
395
395
Roman Gushchin <roman.gushchin@linux.dev> <guroan@gmail.com>
···
403
397
Rudolf Marek <R.Marek@sh.cvut.cz>
404
398
Rui Saraiva <rmps@joel.ist.utl.pt>
405
399
Sachin P Sant <ssant@in.ibm.com>
400
+
Sai Prakash Ranjan <quic_saipraka@quicinc.com> <saiprakash.ranjan@codeaurora.org>
406
401
Sakari Ailus <sakari.ailus@linux.intel.com> <sakari.ailus@iki.fi>
407
402
Sam Ravnborg <sam@mars.ravnborg.org>
408
403
Sankeerth Billakanti <quic_sbillaka@quicinc.com> <sbillaka@codeaurora.org>
···
444
437
Thomas Körper <socketcan@esd.eu> <thomas.koerper@esd.eu>
445
438
Thomas Pedersen <twp@codeaurora.org>
446
439
Tiezhu Yang <yangtiezhu@loongson.cn> <kernelpatch@126.com>
440
+
Tobias Klauser <tklauser@distanz.ch> <tobias.klauser@gmail.com>
441
+
Tobias Klauser <tklauser@distanz.ch> <klto@zhaw.ch>
442
+
Tobias Klauser <tklauser@distanz.ch> <tklauser@nuerscht.ch>
443
+
Tobias Klauser <tklauser@distanz.ch> <tklauser@xenon.tklauser.home>
447
444
Todor Tomov <todor.too@gmail.com> <todor.tomov@linaro.org>
448
445
Tony Luck <tony.luck@intel.com>
449
446
TripleX Chung <xxx.phy@gmail.com> <triplex@zh-kernel.org>
+7
Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
+7
Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
+352
Documentation/usb/gadget_uvc.rst
+352
Documentation/usb/gadget_uvc.rst
···
1
+
=======================
2
+
Linux UVC Gadget Driver
3
+
=======================
4
+
5
+
Overview
6
+
--------
7
+
The UVC Gadget driver is a driver for hardware on the *device* side of a USB
8
+
connection. It is intended to run on a Linux system that has USB device-side
9
+
hardware such as boards with an OTG port.
10
+
11
+
On the device system, once the driver is bound it appears as a V4L2 device with
12
+
the output capability.
13
+
14
+
On the host side (once connected via USB cable), a device running the UVC Gadget
15
+
driver *and controlled by an appropriate userspace program* should appear as a UVC
16
+
specification compliant camera, and function appropriately with any program
17
+
designed to handle them. The userspace program running on the device system can
18
+
queue image buffers from a variety of sources to be transmitted via the USB
19
+
connection. Typically this would mean forwarding the buffers from a camera sensor
20
+
peripheral, but the source of the buffer is entirely dependent on the userspace
21
+
companion program.
22
+
23
+
Configuring the device kernel
24
+
-----------------------------
25
+
The Kconfig options USB_CONFIGFS, USB_LIBCOMPOSITE, USB_CONFIGFS_F_UVC and
26
+
USB_F_UVC must be selected to enable support for the UVC gadget.
27
+
28
+
Configuring the gadget through configfs
29
+
---------------------------------------
30
+
The UVC Gadget expects to be configured through configfs using the UVC function.
31
+
This allows a significant degree of flexibility, as many of a UVC device's
32
+
settings can be controlled this way.
33
+
34
+
Not all of the available attributes are described here. For a complete enumeration
35
+
see Documentation/ABI/testing/configfs-usb-gadget-uvc
36
+
37
+
Assumptions
38
+
~~~~~~~~~~~
39
+
This section assumes that you have mounted configfs at `/sys/kernel/config` and
40
+
created a gadget as `/sys/kernel/config/usb_gadget/g1`.
41
+
42
+
The UVC Function
43
+
~~~~~~~~~~~~~~~~
44
+
45
+
The first step is to create the UVC function:
46
+
47
+
.. code-block:: bash
48
+
49
+
# These variables will be assumed throughout the rest of the document
50
+
CONFIGFS="/sys/kernel/config"
51
+
GADGET="$CONFIGFS/usb_gadget/g1"
52
+
FUNCTION="$GADGET/functions/uvc.0"
53
+
54
+
mkdir -p $FUNCTION
55
+
56
+
Formats and Frames
57
+
~~~~~~~~~~~~~~~~~~
58
+
59
+
You must configure the gadget by telling it which formats you support, as well
60
+
as the frame sizes and frame intervals that are supported for each format. In
61
+
the current implementation there is no way for the gadget to refuse to set a
62
+
format that the host instructs it to set, so it is important that this step is
63
+
completed *accurately* to ensure that the host never asks for a format that
64
+
can't be provided.
65
+
66
+
Formats are created under the streaming/uncompressed and streaming/mjpeg configfs
67
+
groups, with the framesizes created under the formats in the following
68
+
structure:
69
+
70
+
::
71
+
72
+
uvc.0 +
73
+
|
74
+
+ streaming +
75
+
|
76
+
+ mjpeg +
77
+
| |
78
+
| + mjpeg +
79
+
| |
80
+
| + 720p
81
+
| |
82
+
| + 1080p
83
+
|
84
+
+ uncompressed +
85
+
|
86
+
+ yuyv +
87
+
|
88
+
+ 720p
89
+
|
90
+
+ 1080p
91
+
92
+
Each frame can then be configured with a width and height, plus the maximum
93
+
buffer size required to store a single frame, and finally with the supported
94
+
frame intervals for that format and framesize. Width and height are enumerated in
95
+
units of pixels, frame interval in units of 100ns. To create the structure
96
+
above with 2, 15 and 100 fps frameintervals for each framesize for example you
97
+
might do:
98
+
99
+
.. code-block:: bash
100
+
101
+
create_frame() {
102
+
# Example usage:
103
+
# create_frame <width> <height> <group> <format name>
104
+
105
+
WIDTH=$1
106
+
HEIGHT=$2
107
+
FORMAT=$3
108
+
NAME=$4
109
+
110
+
wdir=$FUNCTION/streaming/$FORMAT/$NAME/${HEIGHT}p
111
+
112
+
mkdir -p $wdir
113
+
echo $WIDTH > $wdir/wWidth
114
+
echo $HEIGHT > $wdir/wHeight
115
+
echo $(( $WIDTH * $HEIGHT * 2 )) > $wdir/dwMaxVideoFrameBufferSize
116
+
cat <<EOF > $wdir/dwFrameInterval
117
+
666666
118
+
100000
119
+
5000000
120
+
EOF
121
+
}
122
+
123
+
create_frame 1280 720 mjpeg mjpeg
124
+
create_frame 1920 1080 mjpeg mjpeg
125
+
create_frame 1280 720 uncompressed yuyv
126
+
create_frame 1920 1080 uncompressed yuyv
127
+
128
+
The only uncompressed format currently supported is YUYV, which is detailed at
129
+
Documentation/userspace-api/media/v4l/pixfmt-packed.yuv.rst.
130
+
131
+
Color Matching Descriptors
132
+
~~~~~~~~~~~~~~~~~~~~~~~~~~
133
+
It's possible to specify some colometry information for each format you create.
134
+
This step is optional, and default information will be included if this step is
135
+
skipped; those default values follow those defined in the Color Matching Descriptor
136
+
section of the UVC specification.
137
+
138
+
To create a Color Matching Descriptor, create a configfs item and set its three
139
+
attributes to your desired settings and then link to it from the format you wish
140
+
it to be associated with:
141
+
142
+
.. code-block:: bash
143
+
144
+
# Create a new Color Matching Descriptor
145
+
146
+
mkdir $FUNCTION/streaming/color_matching/yuyv
147
+
pushd $FUNCTION/streaming/color_matching/yuyv
148
+
149
+
echo 1 > bColorPrimaries
150
+
echo 1 > bTransferCharacteristics
151
+
echo 4 > bMatrixCoefficients
152
+
153
+
popd
154
+
155
+
# Create a symlink to the Color Matching Descriptor from the format's config item
156
+
ln -s $FUNCTION/streaming/color_matching/yuyv $FUNCTION/streaming/uncompressed/yuyv
157
+
158
+
For details about the valid values, consult the UVC specification. Note that a
159
+
default color matching descriptor exists and is used by any format which does
160
+
not have a link to a different Color Matching Descriptor. It's possible to
161
+
change the attribute settings for the default descriptor, so bear in mind that if
162
+
you do that you are altering the defaults for any format that does not link to
163
+
a different one.
164
+
165
+
166
+
Header linking
167
+
~~~~~~~~~~~~~~
168
+
169
+
The UVC specification requires that Format and Frame descriptors be preceded by
170
+
Headers detailing things such as the number and cumulative size of the different
171
+
Format descriptors that follow. This and similar operations are acheived in
172
+
configfs by linking between the configfs item representing the header and the
173
+
config items representing those other descriptors, in this manner:
174
+
175
+
.. code-block:: bash
176
+
177
+
mkdir $FUNCTION/streaming/header/h
178
+
179
+
# This section links the format descriptors and their associated frames
180
+
# to the header
181
+
cd $FUNCTION/streaming/header/h
182
+
ln -s ../../uncompressed/yuyv
183
+
ln -s ../../mjpeg/mjpeg
184
+
185
+
# This section ensures that the header will be transmitted for each
186
+
# speed's set of descriptors. If support for a particular speed is not
187
+
# needed then it can be skipped here.
188
+
cd ../../class/fs
189
+
ln -s ../../header/h
190
+
cd ../../class/hs
191
+
ln -s ../../header/h
192
+
cd ../../class/ss
193
+
ln -s ../../header/h
194
+
cd ../../../control
195
+
mkdir header/h
196
+
ln -s header/h class/fs
197
+
ln -s header/h class/ss
198
+
199
+
200
+
Extension Unit Support
201
+
~~~~~~~~~~~~~~~~~~~~~~
202
+
203
+
A UVC Extension Unit (XU) basically provides a distinct unit to which control set
204
+
and get requests can be addressed. The meaning of those control requests is
205
+
entirely implementation dependent, but may be used to control settings outside
206
+
of the UVC specification (for example enabling or disabling video effects). An
207
+
XU can be inserted into the UVC unit chain or left free-hanging.
208
+
209
+
Configuring an extension unit involves creating an entry in the appropriate
210
+
directory and setting its attributes appropriately, like so:
211
+
212
+
.. code-block:: bash
213
+
214
+
mkdir $FUNCTION/control/extensions/xu.0
215
+
pushd $FUNCTION/control/extensions/xu.0
216
+
217
+
# Set the bUnitID of the Processing Unit as the source for this
218
+
# Extension Unit
219
+
echo 2 > baSourceID
220
+
221
+
# Set this XU as the source of the default output terminal. This inserts
222
+
# the XU into the UVC chain between the PU and OT such that the final
223
+
# chain is IT > PU > XU.0 > OT
224
+
cat bUnitID > ../../terminal/output/default/baSourceID
225
+
226
+
# Flag some controls as being available for use. The bmControl field is
227
+
# a bitmap with each bit denoting the availability of a particular
228
+
# control. For example to flag the 0th, 2nd and 3rd controls available:
229
+
echo 0x0d > bmControls
230
+
231
+
# Set the GUID; this is a vendor-specific code identifying the XU.
232
+
echo -e -n "\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10" > guidExtensionCode
233
+
234
+
popd
235
+
236
+
The bmControls attribute and the baSourceID attribute are multi-value attributes.
237
+
This means that you may write multiple newline separated values to them. For
238
+
example to flag the 1st, 2nd, 9th and 10th controls as being available you would
239
+
need to write two values to bmControls, like so:
240
+
241
+
.. code-block:: bash
242
+
243
+
cat << EOF > bmControls
244
+
0x03
245
+
0x03
246
+
EOF
247
+
248
+
The multi-value nature of the baSourceID attribute belies the fact that XUs can
249
+
be multiple-input, though note that this currently has no significant effect.
250
+
251
+
The bControlSize attribute reflects the size of the bmControls attribute, and
252
+
similarly bNrInPins reflects the size of the baSourceID attributes. Both
253
+
attributes are automatically increased / decreased as you set bmControls and
254
+
baSourceID. It is also possible to manually increase or decrease bControlSize
255
+
which has the effect of truncating entries to the new size, or padding entries
256
+
out with 0x00, for example:
257
+
258
+
::
259
+
260
+
$ cat bmControls
261
+
0x03
262
+
0x05
263
+
264
+
$ cat bControlSize
265
+
2
266
+
267
+
$ echo 1 > bControlSize
268
+
$ cat bmControls
269
+
0x03
270
+
271
+
$ echo 2 > bControlSize
272
+
$ cat bmControls
273
+
0x03
274
+
0x00
275
+
276
+
bNrInPins and baSourceID function in the same way.
277
+
278
+
Custom Strings Support
279
+
~~~~~~~~~~~~~~~~~~~~~~
280
+
281
+
String descriptors that provide a textual description for various parts of a
282
+
USB device can be defined in the usual place within USB configfs, and may then
283
+
be linked to from the UVC function root or from Extension Unit directories to
284
+
assign those strings as descriptors:
285
+
286
+
.. code-block:: bash
287
+
288
+
# Create a string descriptor in us-EN and link to it from the function
289
+
# root. The name of the link is significant here, as it declares this
290
+
# descriptor to be intended for the Interface Association Descriptor.
291
+
# Other significant link names at function root are vs0_desc and vs1_desc
292
+
# For the VideoStreaming Interface 0/1 Descriptors.
293
+
294
+
mkdir -p $GADGET/strings/0x409/iad_desc
295
+
echo -n "Interface Associaton Descriptor" > $GADGET/strings/0x409/iad_desc/s
296
+
ln -s $GADGET/strings/0x409/iad_desc $FUNCTION/iad_desc
297
+
298
+
# Because the link to a String Descriptor from an Extension Unit clearly
299
+
# associates the two, the name of this link is not significant and may
300
+
# be set freely.
301
+
302
+
mkdir -p $GADGET/strings/0x409/xu.0
303
+
echo -n "A Very Useful Extension Unit" > $GADGET/strings/0x409/xu.0/s
304
+
ln -s $GADGET/strings/0x409/xu.0 $FUNCTION/control/extensions/xu.0
305
+
306
+
The interrupt endpoint
307
+
~~~~~~~~~~~~~~~~~~~~~~
308
+
309
+
The VideoControl interface has an optional interrupt endpoint which is by default
310
+
disabled. This is intended to support delayed response control set requests for
311
+
UVC (which should respond through the interrupt endpoint rather than tying up
312
+
endpoint 0). At present support for sending data through this endpoint is missing
313
+
and so it is left disabled to avoid confusion. If you wish to enable it you can
314
+
do so through the configfs attribute:
315
+
316
+
.. code-block:: bash
317
+
318
+
echo 1 > $FUNCTION/control/enable_interrupt_ep
319
+
320
+
Bandwidth configuration
321
+
~~~~~~~~~~~~~~~~~~~~~~~
322
+
323
+
There are three attributes which control the bandwidth of the USB connection.
324
+
These live in the function root and can be set within limits:
325
+
326
+
.. code-block:: bash
327
+
328
+
# streaming_interval sets bInterval. Values range from 1..255
329
+
echo 1 > $FUNCTION/streaming_interval
330
+
331
+
# streaming_maxpacket sets wMaxPacketSize. Valid values are 1024/2048/3072
332
+
echo 3072 > $FUNCTION/streaming_maxpacket
333
+
334
+
# streaming_maxburst sets bMaxBurst. Valid values are 1..15
335
+
echo 1 > $FUNCTION/streaming_maxburst
336
+
337
+
338
+
The values passed here will be clamped to valid values according to the UVC
339
+
specification (which depend on the speed of the USB connection). To understand
340
+
how the settings influence bandwidth you should consult the UVC specifications,
341
+
but a rule of thumb is that increasing the streaming_maxpacket setting will
342
+
improve bandwidth (and thus the maximum possible framerate), whilst the same is
343
+
true for streaming_maxburst provided the USB connection is running at SuperSpeed.
344
+
Increasing streaming_interval will reduce bandwidth and framerate.
345
+
346
+
The userspace application
347
+
-------------------------
348
+
By itself, the UVC Gadget driver cannot do anything particularly interesting. It
349
+
must be paired with a userspace program that responds to UVC control requests and
350
+
fills buffers to be queued to the V4L2 device that the driver creates. How those
351
+
things are achieved is implementation dependent and beyond the scope of this
352
+
document, but a reference application can be found at https://gitlab.freedesktop.org/camera/uvc-gadget
+1
Documentation/usb/index.rst
+1
Documentation/usb/index.rst
+2
-8
MAINTAINERS
+2
-8
MAINTAINERS
···
8216
8216
8217
8217
FREESCALE QORIQ DPAA FMAN DRIVER
8218
8218
M: Madalin Bucur <madalin.bucur@nxp.com>
8219
+
R: Sean Anderson <sean.anderson@seco.com>
8219
8220
L: netdev@vger.kernel.org
8220
8221
S: Maintained
8221
8222
F: Documentation/devicetree/bindings/net/fsl-fman.txt
···
14665
14664
14666
14665
NFC SUBSYSTEM
14667
14666
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
14668
-
L: linux-nfc@lists.01.org (subscribers-only)
14669
14667
L: netdev@vger.kernel.org
14670
14668
S: Maintained
14671
-
B: mailto:linux-nfc@lists.01.org
14672
14669
F: Documentation/devicetree/bindings/net/nfc/
14673
14670
F: drivers/nfc/
14674
14671
F: include/net/nfc/
···
14676
14677
NFC VIRTUAL NCI DEVICE DRIVER
14677
14678
M: Bongsu Jeon <bongsu.jeon@samsung.com>
14678
14679
L: netdev@vger.kernel.org
14679
-
L: linux-nfc@lists.01.org (subscribers-only)
14680
14680
S: Supported
14681
14681
F: drivers/nfc/virtual_ncidev.c
14682
14682
F: tools/testing/selftests/nci/
···
15047
15049
F: sound/soc/codecs/tfa989x.c
15048
15050
15049
15051
NXP-NCI NFC DRIVER
15050
-
L: linux-nfc@lists.01.org (subscribers-only)
15051
15052
S: Orphan
15052
15053
F: Documentation/devicetree/bindings/net/nfc/nxp,nci.yaml
15053
15054
F: drivers/nfc/nxp-nci
···
18498
18501
18499
18502
SAMSUNG S3FWRN5 NFC DRIVER
18500
18503
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
18501
-
L: linux-nfc@lists.01.org (subscribers-only)
18502
18504
S: Maintained
18503
18505
F: Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml
18504
18506
F: drivers/nfc/s3fwrn5
···
20655
20659
TENSILICA XTENSA PORT (xtensa)
20656
20660
M: Chris Zankel <chris@zankel.net>
20657
20661
M: Max Filippov <jcmvbkbc@gmail.com>
20658
-
L: linux-xtensa@linux-xtensa.org
20659
20662
S: Maintained
20660
20663
T: git https://github.com/jcmvbkbc/linux-xtensa.git
20661
20664
F: arch/xtensa/
···
20990
20995
TI TRF7970A NFC DRIVER
20991
20996
M: Mark Greer <mgreer@animalcreek.com>
20992
20997
L: linux-wireless@vger.kernel.org
20993
-
L: linux-nfc@lists.01.org (subscribers-only)
20994
20998
S: Supported
20995
20999
F: Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml
20996
21000
F: drivers/nfc/trf7970a.c
···
21651
21657
M: Valentina Manea <valentina.manea.m@gmail.com>
21652
21658
M: Shuah Khan <shuah@kernel.org>
21653
21659
M: Shuah Khan <skhan@linuxfoundation.org>
21660
+
R: Hongren Zheng <i@zenithal.me>
21654
21661
L: linux-usb@vger.kernel.org
21655
21662
S: Maintained
21656
21663
F: Documentation/usb/usbip_protocol.rst
···
23046
23051
23047
23052
XTENSA XTFPGA PLATFORM SUPPORT
23048
23053
M: Max Filippov <jcmvbkbc@gmail.com>
23049
-
L: linux-xtensa@linux-xtensa.org
23050
23054
S: Maintained
23051
23055
F: drivers/spi/spi-xtensa-xtfpga.c
23052
23056
F: sound/soc/xtensa/xtfpga-i2s.c
+1
-1
Makefile
+1
-1
Makefile
+1
arch/arm/boot/dts/e60k02.dtsi
+1
arch/arm/boot/dts/e60k02.dtsi
+1
arch/arm/boot/dts/e70k02.dtsi
+1
arch/arm/boot/dts/e70k02.dtsi
+1
arch/arm/boot/dts/imx6sl-tolino-shine2hd.dts
+1
arch/arm/boot/dts/imx6sl-tolino-shine2hd.dts
+10
arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
+10
arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
···
27
27
};
28
28
29
29
reserved-memory {
30
+
sbl_region: sbl@2f00000 {
31
+
reg = <0x02f00000 0x100000>;
32
+
no-map;
33
+
};
34
+
35
+
external_image_region: external-image@3100000 {
36
+
reg = <0x03100000 0x200000>;
37
+
no-map;
38
+
};
39
+
30
40
adsp_region: adsp@3300000 {
31
41
reg = <0x03300000 0x1400000>;
32
42
no-map;
-12
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dts
-12
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dts
···
56
56
};
57
57
58
58
&enetc_port2 {
59
-
nvmem-cells = <&base_mac_address 2>;
60
-
nvmem-cell-names = "mac-address";
61
59
status = "okay";
62
60
};
63
61
64
62
&enetc_port3 {
65
-
nvmem-cells = <&base_mac_address 3>;
66
-
nvmem-cell-names = "mac-address";
67
63
status = "okay";
68
64
};
69
65
···
80
84
managed = "in-band-status";
81
85
phy-handle = <&qsgmii_phy0>;
82
86
phy-mode = "qsgmii";
83
-
nvmem-cells = <&base_mac_address 4>;
84
-
nvmem-cell-names = "mac-address";
85
87
status = "okay";
86
88
};
87
89
···
88
94
managed = "in-band-status";
89
95
phy-handle = <&qsgmii_phy1>;
90
96
phy-mode = "qsgmii";
91
-
nvmem-cells = <&base_mac_address 5>;
92
-
nvmem-cell-names = "mac-address";
93
97
status = "okay";
94
98
};
95
99
···
96
104
managed = "in-band-status";
97
105
phy-handle = <&qsgmii_phy2>;
98
106
phy-mode = "qsgmii";
99
-
nvmem-cells = <&base_mac_address 6>;
100
-
nvmem-cell-names = "mac-address";
101
107
status = "okay";
102
108
};
103
109
···
104
114
managed = "in-band-status";
105
115
phy-handle = <&qsgmii_phy3>;
106
116
phy-mode = "qsgmii";
107
-
nvmem-cells = <&base_mac_address 7>;
108
-
nvmem-cell-names = "mac-address";
109
117
status = "okay";
110
118
};
111
119
-2
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dts
-2
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dts
-8
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dts
-8
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dts
···
36
36
};
37
37
38
38
&enetc_port2 {
39
-
nvmem-cells = <&base_mac_address 2>;
40
-
nvmem-cell-names = "mac-address";
41
39
status = "okay";
42
40
};
43
41
44
42
&enetc_port3 {
45
-
nvmem-cells = <&base_mac_address 3>;
46
-
nvmem-cell-names = "mac-address";
47
43
status = "okay";
48
44
};
49
45
···
52
56
managed = "in-band-status";
53
57
phy-handle = <&phy0>;
54
58
phy-mode = "sgmii";
55
-
nvmem-cells = <&base_mac_address 0>;
56
-
nvmem-cell-names = "mac-address";
57
59
status = "okay";
58
60
};
59
61
···
60
66
managed = "in-band-status";
61
67
phy-handle = <&phy1>;
62
68
phy-mode = "sgmii";
63
-
nvmem-cells = <&base_mac_address 1>;
64
-
nvmem-cell-names = "mac-address";
65
69
status = "okay";
66
70
};
67
71
-2
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts
-2
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts
-17
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts
-17
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts
···
92
92
phy-handle = <&phy0>;
93
93
phy-mode = "sgmii";
94
94
managed = "in-band-status";
95
-
nvmem-cells = <&base_mac_address 0>;
96
-
nvmem-cell-names = "mac-address";
97
95
status = "okay";
98
96
};
99
97
···
152
154
partition@3e0000 {
153
155
reg = <0x3e0000 0x020000>;
154
156
label = "bootloader environment";
155
-
};
156
-
};
157
-
158
-
otp-1 {
159
-
compatible = "user-otp";
160
-
161
-
nvmem-layout {
162
-
compatible = "kontron,sl28-vpd";
163
-
164
-
serial_number: serial-number {
165
-
};
166
-
167
-
base_mac_address: base-mac-address {
168
-
#nvmem-cell-cells = <1>;
169
-
};
170
157
};
171
158
};
172
159
};
+1
-1
arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
+1
-1
arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
···
117
117
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
118
118
clocks = <&clk IMX_SC_R_FSPI_0 IMX_SC_PM_CLK_PER>,
119
119
<&clk IMX_SC_R_FSPI_0 IMX_SC_PM_CLK_PER>;
120
-
clock-names = "fspi", "fspi_en";
120
+
clock-names = "fspi_en", "fspi";
121
121
power-domains = <&pd IMX_SC_R_FSPI_0>;
122
122
status = "disabled";
123
123
};
+3
-2
arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
+3
-2
arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
···
121
121
phy-handle = <ðphy0>;
122
122
nvmem-cells = <&fec_mac1>;
123
123
nvmem-cell-names = "mac-address";
124
-
snps,reset-gpios = <&pca6416_1 2 GPIO_ACTIVE_LOW>;
125
-
snps,reset-delays-us = <10 20 200000>;
126
124
status = "okay";
127
125
128
126
mdio {
···
134
136
eee-broken-1000t;
135
137
qca,disable-smarteee;
136
138
qca,disable-hibernation-mode;
139
+
reset-gpios = <&pca6416_1 2 GPIO_ACTIVE_LOW>;
140
+
reset-assert-us = <20>;
141
+
reset-deassert-us = <200000>;
137
142
vddio-supply = <&vddio0>;
138
143
139
144
vddio0: vddio-regulator {
+1
-1
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+1
-1
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+5
arch/arm64/boot/dts/freescale/imx8mn.dtsi
+5
arch/arm64/boot/dts/freescale/imx8mn.dtsi
···
296
296
sai2: sai@30020000 {
297
297
compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";
298
298
reg = <0x30020000 0x10000>;
299
+
#sound-dai-cells = <0>;
299
300
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
300
301
clocks = <&clk IMX8MN_CLK_SAI2_IPG>,
301
302
<&clk IMX8MN_CLK_DUMMY>,
···
311
310
sai3: sai@30030000 {
312
311
compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";
313
312
reg = <0x30030000 0x10000>;
313
+
#sound-dai-cells = <0>;
314
314
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
315
315
clocks = <&clk IMX8MN_CLK_SAI3_IPG>,
316
316
<&clk IMX8MN_CLK_DUMMY>,
···
326
324
sai5: sai@30050000 {
327
325
compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";
328
326
reg = <0x30050000 0x10000>;
327
+
#sound-dai-cells = <0>;
329
328
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
330
329
clocks = <&clk IMX8MN_CLK_SAI5_IPG>,
331
330
<&clk IMX8MN_CLK_DUMMY>,
···
343
340
sai6: sai@30060000 {
344
341
compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";
345
342
reg = <0x30060000 0x10000>;
343
+
#sound-dai-cells = <0>;
346
344
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
347
345
clocks = <&clk IMX8MN_CLK_SAI6_IPG>,
348
346
<&clk IMX8MN_CLK_DUMMY>,
···
401
397
sai7: sai@300b0000 {
402
398
compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";
403
399
reg = <0x300b0000 0x10000>;
400
+
#sound-dai-cells = <0>;
404
401
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
405
402
clocks = <&clk IMX8MN_CLK_SAI7_IPG>,
406
403
<&clk IMX8MN_CLK_DUMMY>,
+2
-2
arch/arm64/boot/dts/freescale/imx8mp.dtsi
+2
-2
arch/arm64/boot/dts/freescale/imx8mp.dtsi
···
1131
1131
reg = <0x32e90000 0x238>;
1132
1132
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
1133
1133
clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT>,
1134
-
<&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
1135
-
<&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
1134
+
<&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
1135
+
<&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;
1136
1136
clock-names = "pix", "axi", "disp_axi";
1137
1137
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX>,
1138
1138
<&clk IMX8MP_VIDEO_PLL1>;
+20
-4
arch/arm64/boot/dts/freescale/imx93.dtsi
+20
-4
arch/arm64/boot/dts/freescale/imx93.dtsi
···
164
164
lpi2c1: i2c@44340000 {
165
165
compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
166
166
reg = <0x44340000 0x10000>;
167
+
#address-cells = <1>;
168
+
#size-cells = <0>;
167
169
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
168
170
clocks = <&clk IMX93_CLK_LPI2C1_GATE>,
169
171
<&clk IMX93_CLK_BUS_AON>;
···
176
174
lpi2c2: i2c@44350000 {
177
175
compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
178
176
reg = <0x44350000 0x10000>;
177
+
#address-cells = <1>;
178
+
#size-cells = <0>;
179
179
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
180
180
clocks = <&clk IMX93_CLK_LPI2C2_GATE>,
181
181
<&clk IMX93_CLK_BUS_AON>;
···
347
343
lpi2c3: i2c@42530000 {
348
344
compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
349
345
reg = <0x42530000 0x10000>;
346
+
#address-cells = <1>;
347
+
#size-cells = <0>;
350
348
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
351
349
clocks = <&clk IMX93_CLK_LPI2C3_GATE>,
352
350
<&clk IMX93_CLK_BUS_WAKEUP>;
···
359
353
lpi2c4: i2c@42540000 {
360
354
compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
361
355
reg = <0x42540000 0x10000>;
356
+
#address-cells = <1>;
357
+
#size-cells = <0>;
362
358
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
363
359
clocks = <&clk IMX93_CLK_LPI2C4_GATE>,
364
360
<&clk IMX93_CLK_BUS_WAKEUP>;
···
463
455
lpi2c5: i2c@426b0000 {
464
456
compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
465
457
reg = <0x426b0000 0x10000>;
458
+
#address-cells = <1>;
459
+
#size-cells = <0>;
466
460
interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
467
461
clocks = <&clk IMX93_CLK_LPI2C5_GATE>,
468
462
<&clk IMX93_CLK_BUS_WAKEUP>;
···
475
465
lpi2c6: i2c@426c0000 {
476
466
compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
477
467
reg = <0x426c0000 0x10000>;
468
+
#address-cells = <1>;
469
+
#size-cells = <0>;
478
470
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
479
471
clocks = <&clk IMX93_CLK_LPI2C6_GATE>,
480
472
<&clk IMX93_CLK_BUS_WAKEUP>;
···
487
475
lpi2c7: i2c@426d0000 {
488
476
compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
489
477
reg = <0x426d0000 0x10000>;
478
+
#address-cells = <1>;
479
+
#size-cells = <0>;
490
480
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
491
481
clocks = <&clk IMX93_CLK_LPI2C7_GATE>,
492
482
<&clk IMX93_CLK_BUS_WAKEUP>;
···
499
485
lpi2c8: i2c@426e0000 {
500
486
compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
501
487
reg = <0x426e0000 0x10000>;
488
+
#address-cells = <1>;
489
+
#size-cells = <0>;
502
490
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
503
491
clocks = <&clk IMX93_CLK_LPI2C8_GATE>,
504
492
<&clk IMX93_CLK_BUS_WAKEUP>;
···
596
580
eqos: ethernet@428a0000 {
597
581
compatible = "nxp,imx93-dwmac-eqos", "snps,dwmac-5.10a";
598
582
reg = <0x428a0000 0x10000>;
599
-
interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
600
-
<GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
601
-
interrupt-names = "eth_wake_irq", "macirq";
583
+
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
584
+
<GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
585
+
interrupt-names = "macirq", "eth_wake_irq";
602
586
clocks = <&clk IMX93_CLK_ENET_QOS_GATE>,
603
587
<&clk IMX93_CLK_ENET_QOS_GATE>,
604
588
<&clk IMX93_CLK_ENET_TIMER2>,
···
611
595
<&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>;
612
596
assigned-clock-rates = <100000000>, <250000000>;
613
597
intf_mode = <&wakeupmix_gpr 0x28>;
614
-
clk_csr = <0>;
598
+
snps,clk-csr = <0>;
615
599
status = "disabled";
616
600
};
617
601
+1
-1
arch/arm64/boot/dts/nvidia/tegra194.dtsi
+1
-1
arch/arm64/boot/dts/nvidia/tegra194.dtsi
+1
-1
arch/arm64/boot/dts/nvidia/tegra234.dtsi
+1
-1
arch/arm64/boot/dts/nvidia/tegra234.dtsi
-4
arch/arm64/boot/dts/qcom/msm8916-thwc-uf896.dts
-4
arch/arm64/boot/dts/qcom/msm8916-thwc-uf896.dts
+26
-2
arch/arm64/boot/dts/qcom/msm8916-thwc-ufi001c.dts
+26
-2
arch/arm64/boot/dts/qcom/msm8916-thwc-ufi001c.dts
···
25
25
gpios = <&msmgpio 20 GPIO_ACTIVE_HIGH>;
26
26
};
27
27
28
+
&mpss {
29
+
pinctrl-0 = <&sim_ctrl_default>;
30
+
pinctrl-names = "default";
31
+
};
32
+
28
33
&button_default {
29
34
pins = "gpio37";
30
35
bias-pull-down;
···
39
34
pins = "gpio20", "gpio21", "gpio22";
40
35
};
41
36
42
-
&sim_ctrl_default {
43
-
pins = "gpio1", "gpio2";
37
+
/* This selects the external SIM card slot by default */
38
+
&msmgpio {
39
+
sim_ctrl_default: sim-ctrl-default-state {
40
+
esim-sel-pins {
41
+
pins = "gpio0", "gpio3";
42
+
bias-disable;
43
+
output-low;
44
+
};
45
+
46
+
sim-en-pins {
47
+
pins = "gpio1";
48
+
bias-disable;
49
+
output-low;
50
+
};
51
+
52
+
sim-sel-pins {
53
+
pins = "gpio2";
54
+
bias-disable;
55
+
output-high;
56
+
};
57
+
};
44
58
};
-10
arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi
-10
arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi
···
92
92
};
93
93
94
94
&mpss {
95
-
pinctrl-0 = <&sim_ctrl_default>;
96
-
pinctrl-names = "default";
97
-
98
95
status = "okay";
99
96
};
100
97
···
236
239
function = "gpio";
237
240
drive-strength = <2>;
238
241
bias-disable;
239
-
};
240
-
241
-
sim_ctrl_default: sim-ctrl-default-state {
242
-
function = "gpio";
243
-
drive-strength = <2>;
244
-
bias-disable;
245
-
output-low;
246
242
};
247
243
};
+1
-1
arch/arm64/boot/dts/qcom/sa8540p-ride.dts
+1
-1
arch/arm64/boot/dts/qcom/sa8540p-ride.dts
+2
arch/arm64/boot/dts/qcom/sc7280.dtsi
+2
arch/arm64/boot/dts/qcom/sc7280.dtsi
+22
-5
arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
+22
-5
arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
···
370
370
regulator-min-microvolt = <1800000>;
371
371
regulator-max-microvolt = <1800000>;
372
372
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373
+
regulator-always-on;
373
374
};
374
375
375
376
vreg_s11b: smps11 {
···
378
377
regulator-min-microvolt = <1272000>;
379
378
regulator-max-microvolt = <1272000>;
380
379
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
380
+
regulator-always-on;
381
381
};
382
382
383
383
vreg_s12b: smps12 {
···
386
384
regulator-min-microvolt = <984000>;
387
385
regulator-max-microvolt = <984000>;
388
386
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
387
+
regulator-always-on;
389
388
};
390
389
391
390
vreg_l3b: ldo3 {
···
444
441
regulator-min-microvolt = <3008000>;
445
442
regulator-max-microvolt = <3960000>;
446
443
regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
444
+
regulator-always-on;
447
445
};
448
446
};
449
447
···
776
772
pmic-die-temp@3 {
777
773
reg = <PMK8350_ADC7_DIE_TEMP>;
778
774
qcom,pre-scaling = <1 1>;
775
+
label = "pmk8350_die_temp";
779
776
};
780
777
781
778
xo-therm@44 {
782
779
reg = <PMK8350_ADC7_AMUX_THM1_100K_PU>;
783
780
qcom,hw-settle-time = <200>;
784
781
qcom,ratiometric;
782
+
label = "pmk8350_xo_therm";
785
783
};
786
784
787
785
pmic-die-temp@103 {
788
786
reg = <PM8350_ADC7_DIE_TEMP(1)>;
789
787
qcom,pre-scaling = <1 1>;
788
+
label = "pmc8280_1_die_temp";
790
789
};
791
790
792
791
sys-therm@144 {
793
792
reg = <PM8350_ADC7_AMUX_THM1_100K_PU(1)>;
794
793
qcom,hw-settle-time = <200>;
795
794
qcom,ratiometric;
795
+
label = "sys_therm1";
796
796
};
797
797
798
798
sys-therm@145 {
799
799
reg = <PM8350_ADC7_AMUX_THM2_100K_PU(1)>;
800
800
qcom,hw-settle-time = <200>;
801
801
qcom,ratiometric;
802
+
label = "sys_therm2";
802
803
};
803
804
804
805
sys-therm@146 {
805
806
reg = <PM8350_ADC7_AMUX_THM3_100K_PU(1)>;
806
807
qcom,hw-settle-time = <200>;
807
808
qcom,ratiometric;
809
+
label = "sys_therm3";
808
810
};
809
811
810
812
sys-therm@147 {
811
813
reg = <PM8350_ADC7_AMUX_THM4_100K_PU(1)>;
812
814
qcom,hw-settle-time = <200>;
813
815
qcom,ratiometric;
816
+
label = "sys_therm4";
814
817
};
815
818
816
819
pmic-die-temp@303 {
817
820
reg = <PM8350_ADC7_DIE_TEMP(3)>;
818
821
qcom,pre-scaling = <1 1>;
822
+
label = "pmc8280_2_die_temp";
819
823
};
820
824
821
825
sys-therm@344 {
822
826
reg = <PM8350_ADC7_AMUX_THM1_100K_PU(3)>;
823
827
qcom,hw-settle-time = <200>;
824
828
qcom,ratiometric;
829
+
label = "sys_therm5";
825
830
};
826
831
827
832
sys-therm@345 {
828
833
reg = <PM8350_ADC7_AMUX_THM2_100K_PU(3)>;
829
834
qcom,hw-settle-time = <200>;
830
835
qcom,ratiometric;
836
+
label = "sys_therm6";
831
837
};
832
838
833
839
sys-therm@346 {
834
840
reg = <PM8350_ADC7_AMUX_THM3_100K_PU(3)>;
835
841
qcom,hw-settle-time = <200>;
836
842
qcom,ratiometric;
843
+
label = "sys_therm7";
837
844
};
838
845
839
846
sys-therm@347 {
840
847
reg = <PM8350_ADC7_AMUX_THM4_100K_PU(3)>;
841
848
qcom,hw-settle-time = <200>;
842
849
qcom,ratiometric;
850
+
label = "sys_therm8";
843
851
};
844
852
845
853
pmic-die-temp@403 {
846
854
reg = <PMR735A_ADC7_DIE_TEMP>;
847
855
qcom,pre-scaling = <1 1>;
856
+
label = "pmr735a_die_temp";
848
857
};
849
858
};
850
859
···
901
884
"VA DMIC0", "MIC BIAS1",
902
885
"VA DMIC1", "MIC BIAS1",
903
886
"VA DMIC2", "MIC BIAS3",
904
-
"TX DMIC0", "MIC BIAS1",
905
-
"TX DMIC1", "MIC BIAS2",
906
-
"TX DMIC2", "MIC BIAS3",
887
+
"VA DMIC0", "VA MIC BIAS1",
888
+
"VA DMIC1", "VA MIC BIAS1",
889
+
"VA DMIC2", "VA MIC BIAS3",
907
890
"TX SWR_ADC1", "ADC2_OUTPUT";
908
891
909
892
wcd-playback-dai-link {
···
954
937
va-dai-link {
955
938
link-name = "VA Capture";
956
939
cpu {
957
-
sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
940
+
sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;
958
941
};
959
942
960
943
platform {
···
1079
1062
1080
1063
vdd-micb-supply = <&vreg_s10b>;
1081
1064
1082
-
qcom,dmic-sample-rate = <600000>;
1065
+
qcom,dmic-sample-rate = <4800000>;
1083
1066
1084
1067
status = "okay";
1085
1068
};
+9
-9
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+9
-9
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
···
2504
2504
qcom,ports-sinterval-low = /bits/ 8 <0x03 0x1f 0x1f 0x07 0x00>;
2505
2505
qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0B 0x01 0x00>;
2506
2506
qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0B 0x00 0x00>;
2507
-
qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>;
2508
-
qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>;
2507
+
qcom,ports-hstart = /bits/ 8 <0xff 0x03 0x00 0xff 0xff>;
2508
+
qcom,ports-hstop = /bits/ 8 <0xff 0x06 0x0f 0xff 0xff>;
2509
2509
qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>;
2510
-
qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>;
2510
+
qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0x01 0xff 0xff>;
2511
2511
qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
2512
-
qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00>;
2512
+
qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>;
2513
2513
2514
2514
#sound-dai-cells = <1>;
2515
2515
#address-cells = <2>;
···
2600
2600
<&intc GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>;
2601
2601
interrupt-names = "core", "wake";
2602
2602
2603
-
clocks = <&vamacro>;
2603
+
clocks = <&txmacro>;
2604
2604
clock-names = "iface";
2605
2605
label = "TX";
2606
2606
#sound-dai-cells = <1>;
···
2609
2609
2610
2610
qcom,din-ports = <4>;
2611
2611
qcom,dout-ports = <0>;
2612
-
qcom,ports-sinterval-low = /bits/ 8 <0x01 0x03 0x03 0x03>;
2613
-
qcom,ports-offset1 = /bits/ 8 <0x01 0x00 0x02 0x01>;
2612
+
qcom,ports-sinterval-low = /bits/ 8 <0x01 0x01 0x03 0x03>;
2613
+
qcom,ports-offset1 = /bits/ 8 <0x01 0x00 0x02 0x00>;
2614
2614
qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00 0x00>;
2615
2615
qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0xff 0xff>;
2616
2616
qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff>;
2617
2617
qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff>;
2618
-
qcom,ports-word-length = /bits/ 8 <0xff 0x00 0xff 0xff>;
2618
+
qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff>;
2619
2619
qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff>;
2620
-
qcom,ports-lane-control = /bits/ 8 <0x00 0x01 0x00 0x00>;
2620
+
qcom,ports-lane-control = /bits/ 8 <0x00 0x01 0x00 0x01>;
2621
2621
2622
2622
status = "disabled";
2623
2623
};
+1
arch/arm64/boot/dts/qcom/sm6115.dtsi
+1
arch/arm64/boot/dts/qcom/sm6115.dtsi
+1
arch/arm64/boot/dts/qcom/sm6375.dtsi
+1
arch/arm64/boot/dts/qcom/sm6375.dtsi
+2
-2
arch/arm64/boot/dts/qcom/sm8150.dtsi
+2
-2
arch/arm64/boot/dts/qcom/sm8150.dtsi
···
1826
1826
"slave_q2a",
1827
1827
"tbu";
1828
1828
1829
-
iommus = <&apps_smmu 0x1d80 0x7f>;
1829
+
iommus = <&apps_smmu 0x1d80 0x3f>;
1830
1830
iommu-map = <0x0 &apps_smmu 0x1d80 0x1>,
1831
1831
<0x100 &apps_smmu 0x1d81 0x1>;
1832
1832
···
1925
1925
assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
1926
1926
assigned-clock-rates = <19200000>;
1927
1927
1928
-
iommus = <&apps_smmu 0x1e00 0x7f>;
1928
+
iommus = <&apps_smmu 0x1e00 0x3f>;
1929
1929
iommu-map = <0x0 &apps_smmu 0x1e00 0x1>,
1930
1930
<0x100 &apps_smmu 0x1e01 0x1>;
1931
1931
+1
-1
arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish.dts
+1
-1
arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish.dts
+1
arch/arm64/boot/dts/qcom/sm8350.dtsi
+1
arch/arm64/boot/dts/qcom/sm8350.dtsi
+3
-2
arch/arm64/boot/dts/qcom/sm8450.dtsi
+3
-2
arch/arm64/boot/dts/qcom/sm8450.dtsi
···
2143
2143
<&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
2144
2144
<&vamacro>;
2145
2145
clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";
2146
-
assigned-clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
2147
-
<&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
2146
+
assigned-clocks = <&q6prmcc LPASS_CLK_ID_WSA2_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
2147
+
<&q6prmcc LPASS_CLK_ID_WSA2_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
2148
2148
assigned-clock-rates = <19200000>, <19200000>;
2149
2149
2150
2150
#clock-cells = <0>;
···
4003
4003
power-domains = <&gcc UFS_PHY_GDSC>;
4004
4004
4005
4005
iommus = <&apps_smmu 0xe0 0x0>;
4006
+
dma-coherent;
4006
4007
4007
4008
interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>,
4008
4009
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>;
+25
-24
arch/arm64/boot/dts/qcom/sm8550.dtsi
+25
-24
arch/arm64/boot/dts/qcom/sm8550.dtsi
···
66
66
67
67
CPU0: cpu@0 {
68
68
device_type = "cpu";
69
-
compatible = "qcom,kryo";
69
+
compatible = "arm,cortex-a510";
70
70
reg = <0 0>;
71
71
enable-method = "psci";
72
72
next-level-cache = <&L2_0>;
···
89
89
90
90
CPU1: cpu@100 {
91
91
device_type = "cpu";
92
-
compatible = "qcom,kryo";
92
+
compatible = "arm,cortex-a510";
93
93
reg = <0 0x100>;
94
94
enable-method = "psci";
95
95
next-level-cache = <&L2_100>;
···
108
108
109
109
CPU2: cpu@200 {
110
110
device_type = "cpu";
111
-
compatible = "qcom,kryo";
111
+
compatible = "arm,cortex-a510";
112
112
reg = <0 0x200>;
113
113
enable-method = "psci";
114
114
next-level-cache = <&L2_200>;
···
127
127
128
128
CPU3: cpu@300 {
129
129
device_type = "cpu";
130
-
compatible = "qcom,kryo";
130
+
compatible = "arm,cortex-a715";
131
131
reg = <0 0x300>;
132
132
enable-method = "psci";
133
133
next-level-cache = <&L2_300>;
···
146
146
147
147
CPU4: cpu@400 {
148
148
device_type = "cpu";
149
-
compatible = "qcom,kryo";
149
+
compatible = "arm,cortex-a715";
150
150
reg = <0 0x400>;
151
151
enable-method = "psci";
152
152
next-level-cache = <&L2_400>;
···
165
165
166
166
CPU5: cpu@500 {
167
167
device_type = "cpu";
168
-
compatible = "qcom,kryo";
168
+
compatible = "arm,cortex-a710";
169
169
reg = <0 0x500>;
170
170
enable-method = "psci";
171
171
next-level-cache = <&L2_500>;
···
184
184
185
185
CPU6: cpu@600 {
186
186
device_type = "cpu";
187
-
compatible = "qcom,kryo";
187
+
compatible = "arm,cortex-a710";
188
188
reg = <0 0x600>;
189
189
enable-method = "psci";
190
190
next-level-cache = <&L2_600>;
···
203
203
204
204
CPU7: cpu@700 {
205
205
device_type = "cpu";
206
-
compatible = "qcom,kryo";
206
+
compatible = "arm,cortex-x3";
207
207
reg = <0 0x700>;
208
208
enable-method = "psci";
209
209
next-level-cache = <&L2_700>;
···
1905
1905
required-opps = <&rpmhpd_opp_nom>;
1906
1906
1907
1907
iommus = <&apps_smmu 0x60 0x0>;
1908
+
dma-coherent;
1908
1909
1909
1910
interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>,
1910
1911
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>;
···
1998
1997
lpass_tlmm: pinctrl@6e80000 {
1999
1998
compatible = "qcom,sm8550-lpass-lpi-pinctrl";
2000
1999
reg = <0 0x06e80000 0 0x20000>,
2001
-
<0 0x0725a000 0 0x10000>;
2000
+
<0 0x07250000 0 0x10000>;
2002
2001
gpio-controller;
2003
2002
#gpio-cells = <2>;
2004
2003
gpio-ranges = <&lpass_tlmm 0 0 23>;
···
2692
2691
pins = "gpio28", "gpio29";
2693
2692
function = "qup1_se0";
2694
2693
drive-strength = <2>;
2695
-
bias-pull-up;
2694
+
bias-pull-up = <2200>;
2696
2695
};
2697
2696
2698
2697
qup_i2c1_data_clk: qup-i2c1-data-clk-state {
···
2700
2699
pins = "gpio32", "gpio33";
2701
2700
function = "qup1_se1";
2702
2701
drive-strength = <2>;
2703
-
bias-pull-up;
2702
+
bias-pull-up = <2200>;
2704
2703
};
2705
2704
2706
2705
qup_i2c2_data_clk: qup-i2c2-data-clk-state {
···
2708
2707
pins = "gpio36", "gpio37";
2709
2708
function = "qup1_se2";
2710
2709
drive-strength = <2>;
2711
-
bias-pull-up;
2710
+
bias-pull-up = <2200>;
2712
2711
};
2713
2712
2714
2713
qup_i2c3_data_clk: qup-i2c3-data-clk-state {
···
2716
2715
pins = "gpio40", "gpio41";
2717
2716
function = "qup1_se3";
2718
2717
drive-strength = <2>;
2719
-
bias-pull-up;
2718
+
bias-pull-up = <2200>;
2720
2719
};
2721
2720
2722
2721
qup_i2c4_data_clk: qup-i2c4-data-clk-state {
···
2724
2723
pins = "gpio44", "gpio45";
2725
2724
function = "qup1_se4";
2726
2725
drive-strength = <2>;
2727
-
bias-pull-up;
2726
+
bias-pull-up = <2200>;
2728
2727
};
2729
2728
2730
2729
qup_i2c5_data_clk: qup-i2c5-data-clk-state {
···
2732
2731
pins = "gpio52", "gpio53";
2733
2732
function = "qup1_se5";
2734
2733
drive-strength = <2>;
2735
-
bias-pull-up;
2734
+
bias-pull-up = <2200>;
2736
2735
};
2737
2736
2738
2737
qup_i2c6_data_clk: qup-i2c6-data-clk-state {
···
2740
2739
pins = "gpio48", "gpio49";
2741
2740
function = "qup1_se6";
2742
2741
drive-strength = <2>;
2743
-
bias-pull-up;
2742
+
bias-pull-up = <2200>;
2744
2743
};
2745
2744
2746
2745
qup_i2c8_data_clk: qup-i2c8-data-clk-state {
···
2748
2747
pins = "gpio57";
2749
2748
function = "qup2_se0_l1_mira";
2750
2749
drive-strength = <2>;
2751
-
bias-pull-up;
2750
+
bias-pull-up = <2200>;
2752
2751
};
2753
2752
2754
2753
sda-pins {
2755
2754
pins = "gpio56";
2756
2755
function = "qup2_se0_l0_mira";
2757
2756
drive-strength = <2>;
2758
-
bias-pull-up;
2757
+
bias-pull-up = <2200>;
2759
2758
};
2760
2759
};
2761
2760
···
2764
2763
pins = "gpio60", "gpio61";
2765
2764
function = "qup2_se1";
2766
2765
drive-strength = <2>;
2767
-
bias-pull-up;
2766
+
bias-pull-up = <2200>;
2768
2767
};
2769
2768
2770
2769
qup_i2c10_data_clk: qup-i2c10-data-clk-state {
···
2772
2771
pins = "gpio64", "gpio65";
2773
2772
function = "qup2_se2";
2774
2773
drive-strength = <2>;
2775
-
bias-pull-up;
2774
+
bias-pull-up = <2200>;
2776
2775
};
2777
2776
2778
2777
qup_i2c11_data_clk: qup-i2c11-data-clk-state {
···
2780
2779
pins = "gpio68", "gpio69";
2781
2780
function = "qup2_se3";
2782
2781
drive-strength = <2>;
2783
-
bias-pull-up;
2782
+
bias-pull-up = <2200>;
2784
2783
};
2785
2784
2786
2785
qup_i2c12_data_clk: qup-i2c12-data-clk-state {
···
2788
2787
pins = "gpio2", "gpio3";
2789
2788
function = "qup2_se4";
2790
2789
drive-strength = <2>;
2791
-
bias-pull-up;
2790
+
bias-pull-up = <2200>;
2792
2791
};
2793
2792
2794
2793
qup_i2c13_data_clk: qup-i2c13-data-clk-state {
···
2796
2795
pins = "gpio80", "gpio81";
2797
2796
function = "qup2_se5";
2798
2797
drive-strength = <2>;
2799
-
bias-pull-up;
2798
+
bias-pull-up = <2200>;
2800
2799
};
2801
2800
2802
2801
qup_i2c15_data_clk: qup-i2c15-data-clk-state {
···
2804
2803
pins = "gpio72", "gpio106";
2805
2804
function = "qup2_se7";
2806
2805
drive-strength = <2>;
2807
-
bias-pull-up;
2806
+
bias-pull-up = <2200>;
2808
2807
};
2809
2808
2810
2809
qup_spi0_cs: qup-spi0-cs-state {
+1
-1
arch/arm64/kernel/efi-header.S
+1
-1
arch/arm64/kernel/efi-header.S
···
66
66
.long .Lefi_header_end - .L_head // SizeOfHeaders
67
67
.long 0 // CheckSum
68
68
.short IMAGE_SUBSYSTEM_EFI_APPLICATION // Subsystem
69
-
.short 0 // DllCharacteristics
69
+
.short IMAGE_DLL_CHARACTERISTICS_NX_COMPAT // DllCharacteristics
70
70
.quad 0 // SizeOfStackReserve
71
71
.quad 0 // SizeOfStackCommit
72
72
.quad 0 // SizeOfHeapReserve
+65
-36
arch/arm64/kvm/mmu.c
+65
-36
arch/arm64/kvm/mmu.c
···
666
666
CONFIG_PGTABLE_LEVELS),
667
667
.mm_ops = &kvm_user_mm_ops,
668
668
};
669
+
unsigned long flags;
669
670
kvm_pte_t pte = 0; /* Keep GCC quiet... */
670
671
u32 level = ~0;
671
672
int ret;
672
673
674
+
/*
675
+
* Disable IRQs so that we hazard against a concurrent
676
+
* teardown of the userspace page tables (which relies on
677
+
* IPI-ing threads).
678
+
*/
679
+
local_irq_save(flags);
673
680
ret = kvm_pgtable_get_leaf(&pgt, addr, &pte, &level);
674
-
VM_BUG_ON(ret);
675
-
VM_BUG_ON(level >= KVM_PGTABLE_MAX_LEVELS);
676
-
VM_BUG_ON(!(pte & PTE_VALID));
681
+
local_irq_restore(flags);
682
+
683
+
if (ret)
684
+
return ret;
685
+
686
+
/*
687
+
* Not seeing an error, but not updating level? Something went
688
+
* deeply wrong...
689
+
*/
690
+
if (WARN_ON(level >= KVM_PGTABLE_MAX_LEVELS))
691
+
return -EFAULT;
692
+
693
+
/* Oops, the userspace PTs are gone... Replay the fault */
694
+
if (!kvm_pte_valid(pte))
695
+
return -EAGAIN;
677
696
678
697
return BIT(ARM64_HW_PGTABLE_LEVEL_SHIFT(level));
679
698
}
···
1098
1079
*
1099
1080
* Returns the size of the mapping.
1100
1081
*/
1101
-
static unsigned long
1082
+
static long
1102
1083
transparent_hugepage_adjust(struct kvm *kvm, struct kvm_memory_slot *memslot,
1103
1084
unsigned long hva, kvm_pfn_t *pfnp,
1104
1085
phys_addr_t *ipap)
···
1110
1091
* sure that the HVA and IPA are sufficiently aligned and that the
1111
1092
* block map is contained within the memslot.
1112
1093
*/
1113
-
if (fault_supports_stage2_huge_mapping(memslot, hva, PMD_SIZE) &&
1114
-
get_user_mapping_size(kvm, hva) >= PMD_SIZE) {
1094
+
if (fault_supports_stage2_huge_mapping(memslot, hva, PMD_SIZE)) {
1095
+
int sz = get_user_mapping_size(kvm, hva);
1096
+
1097
+
if (sz < 0)
1098
+
return sz;
1099
+
1100
+
if (sz < PMD_SIZE)
1101
+
return PAGE_SIZE;
1102
+
1115
1103
/*
1116
1104
* The address we faulted on is backed by a transparent huge
1117
1105
* page. However, because we map the compound huge page and
···
1218
1192
{
1219
1193
int ret = 0;
1220
1194
bool write_fault, writable, force_pte = false;
1221
-
bool exec_fault;
1195
+
bool exec_fault, mte_allowed;
1222
1196
bool device = false;
1223
1197
unsigned long mmu_seq;
1224
1198
struct kvm *kvm = vcpu->kvm;
···
1229
1203
kvm_pfn_t pfn;
1230
1204
bool logging_active = memslot_is_logging(memslot);
1231
1205
unsigned long fault_level = kvm_vcpu_trap_get_fault_level(vcpu);
1232
-
unsigned long vma_pagesize, fault_granule;
1206
+
long vma_pagesize, fault_granule;
1233
1207
enum kvm_pgtable_prot prot = KVM_PGTABLE_PROT_R;
1234
1208
struct kvm_pgtable *pgt;
1235
1209
···
1241
1215
if (fault_status == ESR_ELx_FSC_PERM && !write_fault && !exec_fault) {
1242
1216
kvm_err("Unexpected L2 read permission error\n");
1243
1217
return -EFAULT;
1218
+
}
1219
+
1220
+
/*
1221
+
* Permission faults just need to update the existing leaf entry,
1222
+
* and so normally don't require allocations from the memcache. The
1223
+
* only exception to this is when dirty logging is enabled at runtime
1224
+
* and a write fault needs to collapse a block entry into a table.
1225
+
*/
1226
+
if (fault_status != ESR_ELx_FSC_PERM ||
1227
+
(logging_active && write_fault)) {
1228
+
ret = kvm_mmu_topup_memory_cache(memcache,
1229
+
kvm_mmu_cache_min_pages(kvm));
1230
+
if (ret)
1231
+
return ret;
1244
1232
}
1245
1233
1246
1234
/*
···
1309
1269
fault_ipa &= ~(vma_pagesize - 1);
1310
1270
1311
1271
gfn = fault_ipa >> PAGE_SHIFT;
1312
-
mmap_read_unlock(current->mm);
1272
+
mte_allowed = kvm_vma_mte_allowed(vma);
1273
+
1274
+
/* Don't use the VMA after the unlock -- it may have vanished */
1275
+
vma = NULL;
1313
1276
1314
1277
/*
1315
-
* Permission faults just need to update the existing leaf entry,
1316
-
* and so normally don't require allocations from the memcache. The
1317
-
* only exception to this is when dirty logging is enabled at runtime
1318
-
* and a write fault needs to collapse a block entry into a table.
1319
-
*/
1320
-
if (fault_status != ESR_ELx_FSC_PERM ||
1321
-
(logging_active && write_fault)) {
1322
-
ret = kvm_mmu_topup_memory_cache(memcache,
1323
-
kvm_mmu_cache_min_pages(kvm));
1324
-
if (ret)
1325
-
return ret;
1326
-
}
1327
-
1328
-
mmu_seq = vcpu->kvm->mmu_invalidate_seq;
1329
-
/*
1330
-
* Ensure the read of mmu_invalidate_seq happens before we call
1331
-
* gfn_to_pfn_prot (which calls get_user_pages), so that we don't risk
1332
-
* the page we just got a reference to gets unmapped before we have a
1333
-
* chance to grab the mmu_lock, which ensure that if the page gets
1334
-
* unmapped afterwards, the call to kvm_unmap_gfn will take it away
1335
-
* from us again properly. This smp_rmb() interacts with the smp_wmb()
1336
-
* in kvm_mmu_notifier_invalidate_<page|range_end>.
1278
+
* Read mmu_invalidate_seq so that KVM can detect if the results of
1279
+
* vma_lookup() or __gfn_to_pfn_memslot() become stale prior to
1280
+
* acquiring kvm->mmu_lock.
1337
1281
*
1338
-
* Besides, __gfn_to_pfn_memslot() instead of gfn_to_pfn_prot() is
1339
-
* used to avoid unnecessary overhead introduced to locate the memory
1340
-
* slot because it's always fixed even @gfn is adjusted for huge pages.
1282
+
* Rely on mmap_read_unlock() for an implicit smp_rmb(), which pairs
1283
+
* with the smp_wmb() in kvm_mmu_invalidate_end().
1341
1284
*/
1342
-
smp_rmb();
1285
+
mmu_seq = vcpu->kvm->mmu_invalidate_seq;
1286
+
mmap_read_unlock(current->mm);
1343
1287
1344
1288
pfn = __gfn_to_pfn_memslot(memslot, gfn, false, false, NULL,
1345
1289
write_fault, &writable, NULL);
···
1374
1350
vma_pagesize = transparent_hugepage_adjust(kvm, memslot,
1375
1351
hva, &pfn,
1376
1352
&fault_ipa);
1353
+
1354
+
if (vma_pagesize < 0) {
1355
+
ret = vma_pagesize;
1356
+
goto out_unlock;
1357
+
}
1377
1358
}
1378
1359
1379
1360
if (fault_status != ESR_ELx_FSC_PERM && !device && kvm_has_mte(kvm)) {
1380
1361
/* Check the VMM hasn't introduced a new disallowed VMA */
1381
-
if (kvm_vma_mte_allowed(vma)) {
1362
+
if (mte_allowed) {
1382
1363
sanitise_mte_tags(kvm, pfn, vma_pagesize);
1383
1364
} else {
1384
1365
ret = -EFAULT;
+2
-1
arch/arm64/kvm/pmu-emul.c
+2
-1
arch/arm64/kvm/pmu-emul.c
···
538
538
if (!kvm_pmu_is_3p5(vcpu))
539
539
val &= ~ARMV8_PMU_PMCR_LP;
540
540
541
-
__vcpu_sys_reg(vcpu, PMCR_EL0) = val;
541
+
/* The reset bits don't indicate any state, and shouldn't be saved. */
542
+
__vcpu_sys_reg(vcpu, PMCR_EL0) = val & ~(ARMV8_PMU_PMCR_C | ARMV8_PMU_PMCR_P);
542
543
543
544
if (val & ARMV8_PMU_PMCR_E) {
544
545
kvm_pmu_enable_counter_mask(vcpu,
+19
-2
arch/arm64/kvm/sys_regs.c
+19
-2
arch/arm64/kvm/sys_regs.c
···
856
856
return true;
857
857
}
858
858
859
+
static int get_pmu_evcntr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,
860
+
u64 *val)
861
+
{
862
+
u64 idx;
863
+
864
+
if (r->CRn == 9 && r->CRm == 13 && r->Op2 == 0)
865
+
/* PMCCNTR_EL0 */
866
+
idx = ARMV8_PMU_CYCLE_IDX;
867
+
else
868
+
/* PMEVCNTRn_EL0 */
869
+
idx = ((r->CRm & 3) << 3) | (r->Op2 & 7);
870
+
871
+
*val = kvm_pmu_get_counter_value(vcpu, idx);
872
+
return 0;
873
+
}
874
+
859
875
static bool access_pmu_evcntr(struct kvm_vcpu *vcpu,
860
876
struct sys_reg_params *p,
861
877
const struct sys_reg_desc *r)
···
1088
1072
/* Macro to expand the PMEVCNTRn_EL0 register */
1089
1073
#define PMU_PMEVCNTR_EL0(n) \
1090
1074
{ PMU_SYS_REG(SYS_PMEVCNTRn_EL0(n)), \
1091
-
.reset = reset_pmevcntr, \
1075
+
.reset = reset_pmevcntr, .get_user = get_pmu_evcntr, \
1092
1076
.access = access_pmu_evcntr, .reg = (PMEVCNTR0_EL0 + n), }
1093
1077
1094
1078
/* Macro to expand the PMEVTYPERn_EL0 register */
···
1998
1982
{ PMU_SYS_REG(SYS_PMCEID1_EL0),
1999
1983
.access = access_pmceid, .reset = NULL },
2000
1984
{ PMU_SYS_REG(SYS_PMCCNTR_EL0),
2001
-
.access = access_pmu_evcntr, .reset = reset_unknown, .reg = PMCCNTR_EL0 },
1985
+
.access = access_pmu_evcntr, .reset = reset_unknown,
1986
+
.reg = PMCCNTR_EL0, .get_user = get_pmu_evcntr},
2002
1987
{ PMU_SYS_REG(SYS_PMXEVTYPER_EL0),
2003
1988
.access = access_pmu_evtyper, .reset = NULL },
2004
1989
{ PMU_SYS_REG(SYS_PMXEVCNTR_EL0),
+1
-1
arch/powerpc/include/asm/kasan.h
+1
-1
arch/powerpc/include/asm/kasan.h
···
2
2
#ifndef __ASM_KASAN_H
3
3
#define __ASM_KASAN_H
4
4
5
-
#ifdef CONFIG_KASAN
5
+
#if defined(CONFIG_KASAN) && !defined(CONFIG_CC_HAS_KASAN_MEMINTRINSIC_PREFIX)
6
6
#define _GLOBAL_KASAN(fn) _GLOBAL(__##fn)
7
7
#define _GLOBAL_TOC_KASAN(fn) _GLOBAL_TOC(__##fn)
8
8
#define EXPORT_SYMBOL_KASAN(fn) EXPORT_SYMBOL(__##fn)
+11
-4
arch/powerpc/include/asm/string.h
+11
-4
arch/powerpc/include/asm/string.h
···
30
30
extern void * memchr(const void *,int,__kernel_size_t);
31
31
void memcpy_flushcache(void *dest, const void *src, size_t size);
32
32
33
+
#ifdef CONFIG_KASAN
34
+
/* __mem variants are used by KASAN to implement instrumented meminstrinsics. */
35
+
#ifdef CONFIG_CC_HAS_KASAN_MEMINTRINSIC_PREFIX
36
+
#define __memset memset
37
+
#define __memcpy memcpy
38
+
#define __memmove memmove
39
+
#else /* CONFIG_CC_HAS_KASAN_MEMINTRINSIC_PREFIX */
33
40
void *__memset(void *s, int c, __kernel_size_t count);
34
41
void *__memcpy(void *to, const void *from, __kernel_size_t n);
35
42
void *__memmove(void *to, const void *from, __kernel_size_t n);
36
-
37
-
#if defined(CONFIG_KASAN) && !defined(__SANITIZE_ADDRESS__)
43
+
#ifndef __SANITIZE_ADDRESS__
38
44
/*
39
45
* For files that are not instrumented (e.g. mm/slub.c) we
40
46
* should use not instrumented version of mem* functions.
···
52
46
#ifndef __NO_FORTIFY
53
47
#define __NO_FORTIFY /* FORTIFY_SOURCE uses __builtin_memcpy, etc. */
54
48
#endif
55
-
56
-
#endif
49
+
#endif /* !__SANITIZE_ADDRESS__ */
50
+
#endif /* CONFIG_CC_HAS_KASAN_MEMINTRINSIC_PREFIX */
51
+
#endif /* CONFIG_KASAN */
57
52
58
53
#ifdef CONFIG_PPC64
59
54
#ifndef CONFIG_KASAN
+7
-2
arch/powerpc/kernel/prom_init_check.sh
+7
-2
arch/powerpc/kernel/prom_init_check.sh
···
13
13
# If you really need to reference something from prom_init.o add
14
14
# it to the list below:
15
15
16
-
grep "^CONFIG_KASAN=y$" ${KCONFIG_CONFIG} >/dev/null
17
-
if [ $? -eq 0 ]
16
+
has_renamed_memintrinsics()
17
+
{
18
+
grep -q "^CONFIG_KASAN=y$" ${KCONFIG_CONFIG} && \
19
+
! grep -q "^CONFIG_CC_HAS_KASAN_MEMINTRINSIC_PREFIX=y" ${KCONFIG_CONFIG}
20
+
}
21
+
22
+
if has_renamed_memintrinsics
18
23
then
19
24
MEM_FUNCS="__memcpy __memset"
20
25
else
+22
arch/riscv/Kconfig
+22
arch/riscv/Kconfig
···
464
464
depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zihintpause)
465
465
depends on LLD_VERSION >= 150000 || LD_VERSION >= 23600
466
466
467
+
config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI
468
+
def_bool y
469
+
# https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=aed44286efa8ae8717a77d94b51ac3614e2ca6dc
470
+
depends on AS_IS_GNU && AS_VERSION >= 23800
471
+
help
472
+
Newer binutils versions default to ISA spec version 20191213 which
473
+
moves some instructions from the I extension to the Zicsr and Zifencei
474
+
extensions.
475
+
476
+
config TOOLCHAIN_NEEDS_OLD_ISA_SPEC
477
+
def_bool y
478
+
depends on TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI
479
+
# https://github.com/llvm/llvm-project/commit/22e199e6afb1263c943c0c0d4498694e15bf8a16
480
+
depends on CC_IS_CLANG && CLANG_VERSION < 170000
481
+
help
482
+
Certain versions of clang do not support zicsr and zifencei via -march
483
+
but newer versions of binutils require it for the reasons noted in the
484
+
help text of CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI. This
485
+
option causes an older ISA spec compatible with these older versions
486
+
of clang to be passed to GAS, which has the same result as passing zicsr
487
+
and zifencei to -march.
488
+
467
489
config FPU
468
490
bool "FPU support"
469
491
default y
+6
-4
arch/riscv/Makefile
+6
-4
arch/riscv/Makefile
···
57
57
riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
58
58
riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
59
59
60
-
# Newer binutils versions default to ISA spec version 20191213 which moves some
61
-
# instructions from the I extension to the Zicsr and Zifencei extensions.
62
-
toolchain-need-zicsr-zifencei := $(call cc-option-yn, -march=$(riscv-march-y)_zicsr_zifencei)
63
-
riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei
60
+
ifdef CONFIG_TOOLCHAIN_NEEDS_OLD_ISA_SPEC
61
+
KBUILD_CFLAGS += -Wa,-misa-spec=2.2
62
+
KBUILD_AFLAGS += -Wa,-misa-spec=2.2
63
+
else
64
+
riscv-march-$(CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI) := $(riscv-march-y)_zicsr_zifencei
65
+
endif
64
66
65
67
# Check if the toolchain supports Zihintpause extension
66
68
riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE) := $(riscv-march-y)_zihintpause
+2
arch/riscv/include/asm/tlbflush.h
+2
arch/riscv/include/asm/tlbflush.h
+2
-4
arch/riscv/kvm/vcpu_timer.c
+2
-4
arch/riscv/kvm/vcpu_timer.c
···
147
147
return;
148
148
149
149
delta_ns = kvm_riscv_delta_cycles2ns(t->next_cycles, gt, t);
150
-
if (delta_ns) {
151
-
hrtimer_start(&t->hrt, ktime_set(0, delta_ns), HRTIMER_MODE_REL);
152
-
t->next_set = true;
153
-
}
150
+
hrtimer_start(&t->hrt, ktime_set(0, delta_ns), HRTIMER_MODE_REL);
151
+
t->next_set = true;
154
152
}
155
153
156
154
static void kvm_riscv_vcpu_timer_unblocking(struct kvm_vcpu *vcpu)
+1
-1
arch/riscv/mm/context.c
+1
-1
arch/riscv/mm/context.c
+1
-1
arch/riscv/mm/tlbflush.c
+1
-1
arch/riscv/mm/tlbflush.c
···
42
42
/* check if the tlbflush needs to be sent to other CPUs */
43
43
broadcast = cpumask_any_but(cmask, cpuid) < nr_cpu_ids;
44
44
if (static_branch_unlikely(&use_asid_allocator)) {
45
-
unsigned long asid = atomic_long_read(&mm->context.id);
45
+
unsigned long asid = atomic_long_read(&mm->context.id) & asid_mask;
46
46
47
47
if (broadcast) {
48
48
sbi_remote_sfence_vma_asid(cmask, start, size, asid);
+1
-1
arch/s390/Makefile
+1
-1
arch/s390/Makefile
+2
-6
arch/s390/kernel/ptrace.c
+2
-6
arch/s390/kernel/ptrace.c
···
474
474
}
475
475
return 0;
476
476
case PTRACE_GET_LAST_BREAK:
477
-
put_user(child->thread.last_break,
478
-
(unsigned long __user *) data);
479
-
return 0;
477
+
return put_user(child->thread.last_break, (unsigned long __user *)data);
480
478
case PTRACE_ENABLE_TE:
481
479
if (!MACHINE_HAS_TE)
482
480
return -EIO;
···
822
824
}
823
825
return 0;
824
826
case PTRACE_GET_LAST_BREAK:
825
-
put_user(child->thread.last_break,
826
-
(unsigned int __user *) data);
827
-
return 0;
827
+
return put_user(child->thread.last_break, (unsigned int __user *)data);
828
828
}
829
829
return compat_ptrace_request(child, request, addr, data);
830
830
}
+1
-1
arch/s390/lib/uaccess.c
+1
-1
arch/s390/lib/uaccess.c
···
172
172
"4: slgr %0,%0\n"
173
173
"5:\n"
174
174
EX_TABLE(0b,2b) EX_TABLE(6b,2b) EX_TABLE(3b,5b) EX_TABLE(7b,5b)
175
-
: "+a" (size), "+a" (to), "+a" (tmp1), "=a" (tmp2)
175
+
: "+&a" (size), "+&a" (to), "+a" (tmp1), "=&a" (tmp2)
176
176
: "a" (empty_zero_page), [spec] "d" (spec.val)
177
177
: "cc", "memory", "0");
178
178
return size;
+1
-2
arch/x86/events/amd/core.c
+1
-2
arch/x86/events/amd/core.c
···
923
923
924
924
/* Event overflow */
925
925
handled++;
926
+
status &= ~mask;
926
927
perf_sample_data_init(&data, 0, hwc->last_period);
927
928
928
929
if (!x86_perf_event_set_period(event))
···
934
933
935
934
if (perf_event_overflow(event, &data, regs))
936
935
x86_pmu_stop(event, 0);
937
-
938
-
status &= ~mask;
939
936
}
940
937
941
938
/*
+14
-16
arch/x86/kernel/fpu/xstate.c
+14
-16
arch/x86/kernel/fpu/xstate.c
···
1118
1118
zerofrom = offsetof(struct xregs_state, extended_state_area);
1119
1119
1120
1120
/*
1121
-
* The ptrace buffer is in non-compacted XSAVE format. In
1122
-
* non-compacted format disabled features still occupy state space,
1123
-
* but there is no state to copy from in the compacted
1124
-
* init_fpstate. The gap tracking will zero these states.
1121
+
* This 'mask' indicates which states to copy from fpstate.
1122
+
* Those extended states that are not present in fpstate are
1123
+
* either disabled or initialized:
1124
+
*
1125
+
* In non-compacted format, disabled features still occupy
1126
+
* state space but there is no state to copy from in the
1127
+
* compacted init_fpstate. The gap tracking will zero these
1128
+
* states.
1129
+
*
1130
+
* The extended features have an all zeroes init state. Thus,
1131
+
* remove them from 'mask' to zero those features in the user
1132
+
* buffer instead of retrieving them from init_fpstate.
1125
1133
*/
1126
-
mask = fpstate->user_xfeatures;
1127
-
1128
-
/*
1129
-
* Dynamic features are not present in init_fpstate. When they are
1130
-
* in an all zeros init state, remove those from 'mask' to zero
1131
-
* those features in the user buffer instead of retrieving them
1132
-
* from init_fpstate.
1133
-
*/
1134
-
if (fpu_state_size_dynamic())
1135
-
mask &= (header.xfeatures | xinit->header.xcomp_bv);
1134
+
mask = header.xfeatures;
1136
1135
1137
1136
for_each_extended_xfeature(i, mask) {
1138
1137
/*
···
1150
1151
pkru.pkru = pkru_val;
1151
1152
membuf_write(&to, &pkru, sizeof(pkru));
1152
1153
} else {
1153
-
copy_feature(header.xfeatures & BIT_ULL(i), &to,
1154
+
membuf_write(&to,
1154
1155
__raw_xsave_addr(xsave, i),
1155
-
__raw_xsave_addr(xinit, i),
1156
1156
xstate_sizes[i]);
1157
1157
}
1158
1158
/*
+7
arch/x86/mm/cpu_entry_area.c
+7
arch/x86/mm/cpu_entry_area.c
···
10
10
#include <asm/fixmap.h>
11
11
#include <asm/desc.h>
12
12
#include <asm/kasan.h>
13
+
#include <asm/setup.h>
13
14
14
15
static DEFINE_PER_CPU_PAGE_ALIGNED(struct entry_stack_page, entry_stack_storage);
15
16
···
29
28
{
30
29
unsigned int max_cea;
31
30
unsigned int i, j;
31
+
32
+
if (!kaslr_enabled()) {
33
+
for_each_possible_cpu(i)
34
+
per_cpu(_cea_offset, i) = i;
35
+
return;
36
+
}
32
37
33
38
max_cea = (CPU_ENTRY_AREA_MAP_SIZE - PAGE_SIZE) / CPU_ENTRY_AREA_SIZE;
34
39
+1
-1
arch/x86/xen/enlighten_pvh.c
+1
-1
arch/x86/xen/enlighten_pvh.c
+12
-4
arch/xtensa/kernel/traps.c
+12
-4
arch/xtensa/kernel/traps.c
···
539
539
540
540
void show_stack(struct task_struct *task, unsigned long *sp, const char *loglvl)
541
541
{
542
-
size_t len;
542
+
size_t len, off = 0;
543
543
544
544
if (!sp)
545
545
sp = stack_pointer(task);
···
548
548
kstack_depth_to_print * STACK_DUMP_ENTRY_SIZE);
549
549
550
550
printk("%sStack:\n", loglvl);
551
-
print_hex_dump(loglvl, " ", DUMP_PREFIX_NONE,
552
-
STACK_DUMP_LINE_SIZE, STACK_DUMP_ENTRY_SIZE,
553
-
sp, len, false);
551
+
while (off < len) {
552
+
u8 line[STACK_DUMP_LINE_SIZE];
553
+
size_t line_len = len - off > STACK_DUMP_LINE_SIZE ?
554
+
STACK_DUMP_LINE_SIZE : len - off;
555
+
556
+
__memcpy(line, (u8 *)sp + off, line_len);
557
+
print_hex_dump(loglvl, " ", DUMP_PREFIX_NONE,
558
+
STACK_DUMP_LINE_SIZE, STACK_DUMP_ENTRY_SIZE,
559
+
line, line_len, false);
560
+
off += STACK_DUMP_LINE_SIZE;
561
+
}
554
562
show_trace(task, sp, loglvl);
555
563
}
556
564
+14
-4
drivers/accel/ivpu/ivpu_drv.c
+14
-4
drivers/accel/ivpu/ivpu_drv.c
···
8
8
#include <linux/pci.h>
9
9
10
10
#include <drm/drm_accel.h>
11
-
#include <drm/drm_drv.h>
12
11
#include <drm/drm_file.h>
13
12
#include <drm/drm_gem.h>
14
13
#include <drm/drm_ioctl.h>
···
117
118
struct pci_dev *pdev = to_pci_dev(vdev->drm.dev);
118
119
struct drm_ivpu_param *args = data;
119
120
int ret = 0;
121
+
int idx;
122
+
123
+
if (!drm_dev_enter(dev, &idx))
124
+
return -ENODEV;
120
125
121
126
switch (args->param) {
122
127
case DRM_IVPU_PARAM_DEVICE_ID:
···
174
171
break;
175
172
}
176
173
174
+
drm_dev_exit(idx);
177
175
return ret;
178
176
}
179
177
···
474
470
475
471
vdev->hw->ops = &ivpu_hw_mtl_ops;
476
472
vdev->platform = IVPU_PLATFORM_INVALID;
477
-
vdev->context_xa_limit.min = IVPU_GLOBAL_CONTEXT_MMU_SSID + 1;
478
-
vdev->context_xa_limit.max = IVPU_CONTEXT_LIMIT;
473
+
vdev->context_xa_limit.min = IVPU_USER_CONTEXT_MIN_SSID;
474
+
vdev->context_xa_limit.max = IVPU_USER_CONTEXT_MAX_SSID;
479
475
atomic64_set(&vdev->unique_id_counter, 0);
480
476
xa_init_flags(&vdev->context_xa, XA_FLAGS_ALLOC);
481
477
xa_init_flags(&vdev->submitted_jobs_xa, XA_FLAGS_ALLOC1);
···
569
565
ivpu_mmu_global_context_fini(vdev);
570
566
err_power_down:
571
567
ivpu_hw_power_down(vdev);
568
+
if (IVPU_WA(d3hot_after_power_off))
569
+
pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot);
572
570
err_xa_destroy:
573
571
xa_destroy(&vdev->submitted_jobs_xa);
574
572
xa_destroy(&vdev->context_xa);
···
581
575
{
582
576
ivpu_pm_disable(vdev);
583
577
ivpu_shutdown(vdev);
578
+
if (IVPU_WA(d3hot_after_power_off))
579
+
pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot);
584
580
ivpu_job_done_thread_fini(vdev);
581
+
ivpu_pm_cancel_recovery(vdev);
582
+
585
583
ivpu_ipc_fini(vdev);
586
584
ivpu_fw_fini(vdev);
587
585
ivpu_mmu_global_context_fini(vdev);
···
632
622
{
633
623
struct ivpu_device *vdev = pci_get_drvdata(pdev);
634
624
635
-
drm_dev_unregister(&vdev->drm);
625
+
drm_dev_unplug(&vdev->drm);
636
626
ivpu_dev_fini(vdev);
637
627
}
638
628
+6
-1
drivers/accel/ivpu/ivpu_drv.h
+6
-1
drivers/accel/ivpu/ivpu_drv.h
···
7
7
#define __IVPU_DRV_H__
8
8
9
9
#include <drm/drm_device.h>
10
+
#include <drm/drm_drv.h>
10
11
#include <drm/drm_managed.h>
11
12
#include <drm/drm_mm.h>
12
13
#include <drm/drm_print.h>
···
25
24
#define PCI_DEVICE_ID_MTL 0x7d1d
26
25
27
26
#define IVPU_GLOBAL_CONTEXT_MMU_SSID 0
28
-
#define IVPU_CONTEXT_LIMIT 64
27
+
/* SSID 1 is used by the VPU to represent invalid context */
28
+
#define IVPU_USER_CONTEXT_MIN_SSID 2
29
+
#define IVPU_USER_CONTEXT_MAX_SSID (IVPU_USER_CONTEXT_MIN_SSID + 63)
30
+
29
31
#define IVPU_NUM_ENGINES 2
30
32
31
33
#define IVPU_PLATFORM_SILICON 0
···
74
70
struct ivpu_wa_table {
75
71
bool punit_disabled;
76
72
bool clear_runtime_mem;
73
+
bool d3hot_after_power_off;
77
74
};
78
75
79
76
struct ivpu_hw_info;
+34
-77
drivers/accel/ivpu/ivpu_hw_mtl.c
+34
-77
drivers/accel/ivpu/ivpu_hw_mtl.c
···
12
12
#include "ivpu_mmu.h"
13
13
#include "ivpu_pm.h"
14
14
15
-
#define TILE_FUSE_ENABLE_BOTH 0x0
16
-
#define TILE_FUSE_ENABLE_UPPER 0x1
17
-
#define TILE_FUSE_ENABLE_LOWER 0x2
18
-
19
-
#define TILE_SKU_BOTH_MTL 0x3630
20
-
#define TILE_SKU_LOWER_MTL 0x3631
21
-
#define TILE_SKU_UPPER_MTL 0x3632
15
+
#define TILE_FUSE_ENABLE_BOTH 0x0
16
+
#define TILE_SKU_BOTH_MTL 0x3630
22
17
23
18
/* Work point configuration values */
24
-
#define WP_CONFIG_1_TILE_5_3_RATIO 0x0101
25
-
#define WP_CONFIG_1_TILE_4_3_RATIO 0x0102
26
-
#define WP_CONFIG_2_TILE_5_3_RATIO 0x0201
27
-
#define WP_CONFIG_2_TILE_4_3_RATIO 0x0202
28
-
#define WP_CONFIG_0_TILE_PLL_OFF 0x0000
19
+
#define CONFIG_1_TILE 0x01
20
+
#define CONFIG_2_TILE 0x02
21
+
#define PLL_RATIO_5_3 0x01
22
+
#define PLL_RATIO_4_3 0x02
23
+
#define WP_CONFIG(tile, ratio) (((tile) << 8) | (ratio))
24
+
#define WP_CONFIG_1_TILE_5_3_RATIO WP_CONFIG(CONFIG_1_TILE, PLL_RATIO_5_3)
25
+
#define WP_CONFIG_1_TILE_4_3_RATIO WP_CONFIG(CONFIG_1_TILE, PLL_RATIO_4_3)
26
+
#define WP_CONFIG_2_TILE_5_3_RATIO WP_CONFIG(CONFIG_2_TILE, PLL_RATIO_5_3)
27
+
#define WP_CONFIG_2_TILE_4_3_RATIO WP_CONFIG(CONFIG_2_TILE, PLL_RATIO_4_3)
28
+
#define WP_CONFIG_0_TILE_PLL_OFF WP_CONFIG(0, 0)
29
29
30
30
#define PLL_REF_CLK_FREQ (50 * 1000000)
31
31
#define PLL_SIMULATION_FREQ (10 * 1000000)
32
-
#define PLL_RATIO_TO_FREQ(x) ((x) * PLL_REF_CLK_FREQ)
33
32
#define PLL_DEFAULT_EPP_VALUE 0x80
34
33
35
34
#define TIM_SAFE_ENABLE 0xf1d0dead
···
100
101
{
101
102
vdev->wa.punit_disabled = ivpu_is_fpga(vdev);
102
103
vdev->wa.clear_runtime_mem = false;
104
+
vdev->wa.d3hot_after_power_off = true;
103
105
}
104
106
105
107
static void ivpu_hw_timeouts_init(struct ivpu_device *vdev)
···
218
218
config = 0;
219
219
}
220
220
221
-
ivpu_dbg(vdev, PM, "PLL workpoint request: %d Hz\n", PLL_RATIO_TO_FREQ(target_ratio));
221
+
ivpu_dbg(vdev, PM, "PLL workpoint request: config 0x%04x pll ratio 0x%x\n",
222
+
config, target_ratio);
222
223
223
224
ret = ivpu_pll_cmd_send(vdev, hw->pll.min_ratio, hw->pll.max_ratio, target_ratio, config);
224
225
if (ret) {
···
404
403
return ivpu_boot_host_ss_axi_drive(vdev, true);
405
404
}
406
405
407
-
static int ivpu_boot_host_ss_axi_disable(struct ivpu_device *vdev)
408
-
{
409
-
return ivpu_boot_host_ss_axi_drive(vdev, false);
410
-
}
411
-
412
406
static int ivpu_boot_host_ss_top_noc_drive(struct ivpu_device *vdev, bool enable)
413
407
{
414
408
int ret;
···
435
439
static int ivpu_boot_host_ss_top_noc_enable(struct ivpu_device *vdev)
436
440
{
437
441
return ivpu_boot_host_ss_top_noc_drive(vdev, true);
438
-
}
439
-
440
-
static int ivpu_boot_host_ss_top_noc_disable(struct ivpu_device *vdev)
441
-
{
442
-
return ivpu_boot_host_ss_top_noc_drive(vdev, false);
443
442
}
444
443
445
444
static void ivpu_boot_pwr_island_trickle_drive(struct ivpu_device *vdev, bool enable)
···
493
502
val = REG_CLR_FLD(MTL_VPU_HOST_SS_AON_DPU_ACTIVE, DPU_ACTIVE, val);
494
503
495
504
REGV_WR32(MTL_VPU_HOST_SS_AON_DPU_ACTIVE, val);
496
-
}
497
-
498
-
static int ivpu_boot_pwr_domain_disable(struct ivpu_device *vdev)
499
-
{
500
-
ivpu_boot_dpu_active_drive(vdev, false);
501
-
ivpu_boot_pwr_island_isolation_drive(vdev, true);
502
-
ivpu_boot_pwr_island_trickle_drive(vdev, false);
503
-
ivpu_boot_pwr_island_drive(vdev, false);
504
-
505
-
return ivpu_boot_wait_for_pwr_island_status(vdev, 0x0);
506
505
}
507
506
508
507
static int ivpu_boot_pwr_domain_enable(struct ivpu_device *vdev)
···
610
629
static int ivpu_hw_mtl_info_init(struct ivpu_device *vdev)
611
630
{
612
631
struct ivpu_hw_info *hw = vdev->hw;
613
-
u32 tile_fuse;
614
632
615
-
tile_fuse = REGB_RD32(MTL_BUTTRESS_TILE_FUSE);
616
-
if (!REG_TEST_FLD(MTL_BUTTRESS_TILE_FUSE, VALID, tile_fuse))
617
-
ivpu_warn(vdev, "Tile Fuse: Invalid (0x%x)\n", tile_fuse);
618
-
619
-
hw->tile_fuse = REG_GET_FLD(MTL_BUTTRESS_TILE_FUSE, SKU, tile_fuse);
620
-
switch (hw->tile_fuse) {
621
-
case TILE_FUSE_ENABLE_LOWER:
622
-
hw->sku = TILE_SKU_LOWER_MTL;
623
-
hw->config = WP_CONFIG_1_TILE_5_3_RATIO;
624
-
ivpu_dbg(vdev, MISC, "Tile Fuse: Enable Lower\n");
625
-
break;
626
-
case TILE_FUSE_ENABLE_UPPER:
627
-
hw->sku = TILE_SKU_UPPER_MTL;
628
-
hw->config = WP_CONFIG_1_TILE_4_3_RATIO;
629
-
ivpu_dbg(vdev, MISC, "Tile Fuse: Enable Upper\n");
630
-
break;
631
-
case TILE_FUSE_ENABLE_BOTH:
632
-
hw->sku = TILE_SKU_BOTH_MTL;
633
-
hw->config = WP_CONFIG_2_TILE_5_3_RATIO;
634
-
ivpu_dbg(vdev, MISC, "Tile Fuse: Enable Both\n");
635
-
break;
636
-
default:
637
-
hw->config = WP_CONFIG_0_TILE_PLL_OFF;
638
-
ivpu_dbg(vdev, MISC, "Tile Fuse: Disable\n");
639
-
break;
640
-
}
633
+
hw->tile_fuse = TILE_FUSE_ENABLE_BOTH;
634
+
hw->sku = TILE_SKU_BOTH_MTL;
635
+
hw->config = WP_CONFIG_2_TILE_4_3_RATIO;
641
636
642
637
ivpu_pll_init_frequency_ratios(vdev);
643
638
···
754
797
{
755
798
int ret = 0;
756
799
757
-
/* FPGA requires manual clearing of IP_Reset bit by enabling quiescent state */
758
-
if (ivpu_is_fpga(vdev)) {
759
-
if (ivpu_boot_host_ss_top_noc_disable(vdev)) {
760
-
ivpu_err(vdev, "Failed to disable TOP NOC\n");
761
-
ret = -EIO;
762
-
}
763
-
764
-
if (ivpu_boot_host_ss_axi_disable(vdev)) {
765
-
ivpu_err(vdev, "Failed to disable AXI\n");
766
-
ret = -EIO;
767
-
}
768
-
}
769
-
770
-
if (ivpu_boot_pwr_domain_disable(vdev)) {
771
-
ivpu_err(vdev, "Failed to disable power domain\n");
800
+
if (ivpu_hw_mtl_reset(vdev)) {
801
+
ivpu_err(vdev, "Failed to reset the VPU\n");
772
802
ret = -EIO;
773
803
}
774
804
···
788
844
REGV_WR32(MTL_VPU_CPU_SS_TIM_GEN_CONFIG, val);
789
845
}
790
846
847
+
static u32 ivpu_hw_mtl_pll_to_freq(u32 ratio, u32 config)
848
+
{
849
+
u32 pll_clock = PLL_REF_CLK_FREQ * ratio;
850
+
u32 cpu_clock;
851
+
852
+
if ((config & 0xff) == PLL_RATIO_4_3)
853
+
cpu_clock = pll_clock * 2 / 4;
854
+
else
855
+
cpu_clock = pll_clock * 2 / 5;
856
+
857
+
return cpu_clock;
858
+
}
859
+
791
860
/* Register indirect accesses */
792
861
static u32 ivpu_hw_mtl_reg_pll_freq_get(struct ivpu_device *vdev)
793
862
{
···
812
855
if (!ivpu_is_silicon(vdev))
813
856
return PLL_SIMULATION_FREQ;
814
857
815
-
return PLL_RATIO_TO_FREQ(pll_curr_ratio);
858
+
return ivpu_hw_mtl_pll_to_freq(pll_curr_ratio, vdev->hw->config);
816
859
}
817
860
818
861
static u32 ivpu_hw_mtl_reg_telemetry_offset_get(struct ivpu_device *vdev)
+1
-1
drivers/accel/ivpu/ivpu_ipc.h
+1
-1
drivers/accel/ivpu/ivpu_ipc.h
+9
-2
drivers/accel/ivpu/ivpu_job.c
+9
-2
drivers/accel/ivpu/ivpu_job.c
···
489
489
490
490
int ivpu_submit_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
491
491
{
492
-
int ret = 0;
493
492
struct ivpu_file_priv *file_priv = file->driver_priv;
494
493
struct ivpu_device *vdev = file_priv->vdev;
495
494
struct drm_ivpu_submit *params = data;
496
495
struct ivpu_job *job;
497
496
u32 *buf_handles;
497
+
int idx, ret;
498
498
499
499
if (params->engine > DRM_IVPU_ENGINE_COPY)
500
500
return -EINVAL;
···
523
523
goto free_handles;
524
524
}
525
525
526
+
if (!drm_dev_enter(&vdev->drm, &idx)) {
527
+
ret = -ENODEV;
528
+
goto free_handles;
529
+
}
530
+
526
531
ivpu_dbg(vdev, JOB, "Submit ioctl: ctx %u buf_count %u\n",
527
532
file_priv->ctx.id, params->buffer_count);
528
533
···
535
530
if (!job) {
536
531
ivpu_err(vdev, "Failed to create job\n");
537
532
ret = -ENOMEM;
538
-
goto free_handles;
533
+
goto dev_exit;
539
534
}
540
535
541
536
ret = ivpu_job_prepare_bos_for_submit(file, job, buf_handles, params->buffer_count,
···
553
548
554
549
job_put:
555
550
job_put(job);
551
+
dev_exit:
552
+
drm_dev_exit(idx);
556
553
free_handles:
557
554
kfree(buf_handles);
558
555
+14
-3
drivers/accel/ivpu/ivpu_pm.c
+14
-3
drivers/accel/ivpu/ivpu_pm.c
···
98
98
static void ivpu_pm_recovery_work(struct work_struct *work)
99
99
{
100
100
struct ivpu_pm_info *pm = container_of(work, struct ivpu_pm_info, recovery_work);
101
-
struct ivpu_device *vdev = pm->vdev;
101
+
struct ivpu_device *vdev = pm->vdev;
102
102
char *evt[2] = {"IVPU_PM_EVENT=IVPU_RECOVER", NULL};
103
103
int ret;
104
104
105
-
ret = pci_reset_function(to_pci_dev(vdev->drm.dev));
106
-
if (ret)
105
+
retry:
106
+
ret = pci_try_reset_function(to_pci_dev(vdev->drm.dev));
107
+
if (ret == -EAGAIN && !drm_dev_is_unplugged(&vdev->drm)) {
108
+
cond_resched();
109
+
goto retry;
110
+
}
111
+
112
+
if (ret && ret != -EAGAIN)
107
113
ivpu_err(vdev, "Failed to reset VPU: %d\n", ret);
108
114
109
115
kobject_uevent_env(&vdev->drm.dev->kobj, KOBJ_CHANGE, evt);
···
310
304
pm_runtime_set_autosuspend_delay(dev, 60000);
311
305
312
306
return 0;
307
+
}
308
+
309
+
void ivpu_pm_cancel_recovery(struct ivpu_device *vdev)
310
+
{
311
+
cancel_work_sync(&vdev->pm->recovery_work);
313
312
}
314
313
315
314
void ivpu_pm_enable(struct ivpu_device *vdev)
+1
drivers/accel/ivpu/ivpu_pm.h
+1
drivers/accel/ivpu/ivpu_pm.h
···
21
21
int ivpu_pm_init(struct ivpu_device *vdev);
22
22
void ivpu_pm_enable(struct ivpu_device *vdev);
23
23
void ivpu_pm_disable(struct ivpu_device *vdev);
24
+
void ivpu_pm_cancel_recovery(struct ivpu_device *vdev);
24
25
25
26
int ivpu_pm_suspend_cb(struct device *dev);
26
27
int ivpu_pm_resume_cb(struct device *dev);
+6
-6
drivers/acpi/processor_driver.c
+6
-6
drivers/acpi/processor_driver.c
···
263
263
if (acpi_disabled)
264
264
return 0;
265
265
266
+
if (!cpufreq_register_notifier(&acpi_processor_notifier_block,
267
+
CPUFREQ_POLICY_NOTIFIER)) {
268
+
acpi_processor_cpufreq_init = true;
269
+
acpi_processor_ignore_ppc_init();
270
+
}
271
+
266
272
result = driver_register(&acpi_processor_driver);
267
273
if (result < 0)
268
274
return result;
···
281
275
hp_online = result;
282
276
cpuhp_setup_state_nocalls(CPUHP_ACPI_CPUDRV_DEAD, "acpi/cpu-drv:dead",
283
277
NULL, acpi_soft_cpu_dead);
284
-
285
-
if (!cpufreq_register_notifier(&acpi_processor_notifier_block,
286
-
CPUFREQ_POLICY_NOTIFIER)) {
287
-
acpi_processor_cpufreq_init = true;
288
-
acpi_processor_ignore_ppc_init();
289
-
}
290
278
291
279
acpi_processor_throttling_init();
292
280
return 0;
+11
-3
drivers/acpi/processor_thermal.c
+11
-3
drivers/acpi/processor_thermal.c
···
140
140
ret = freq_qos_add_request(&policy->constraints,
141
141
&pr->thermal_req,
142
142
FREQ_QOS_MAX, INT_MAX);
143
-
if (ret < 0)
143
+
if (ret < 0) {
144
144
pr_err("Failed to add freq constraint for CPU%d (%d)\n",
145
145
cpu, ret);
146
+
continue;
147
+
}
148
+
149
+
thermal_cooling_device_update(pr->cdev);
146
150
}
147
151
}
148
152
···
157
153
for_each_cpu(cpu, policy->related_cpus) {
158
154
struct acpi_processor *pr = per_cpu(processors, cpu);
159
155
160
-
if (pr)
161
-
freq_qos_remove_request(&pr->thermal_req);
156
+
if (!pr)
157
+
continue;
158
+
159
+
freq_qos_remove_request(&pr->thermal_req);
160
+
161
+
thermal_cooling_device_update(pr->cdev);
162
162
}
163
163
}
164
164
#else /* ! CONFIG_CPU_FREQ */
+7
drivers/acpi/resource.c
+7
drivers/acpi/resource.c
+8
drivers/acpi/video_detect.c
+8
drivers/acpi/video_detect.c
···
497
497
},
498
498
{
499
499
.callback = video_detect_force_native,
500
+
/* Acer Aspire 3830TG */
501
+
.matches = {
502
+
DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
503
+
DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 3830TG"),
504
+
},
505
+
},
506
+
{
507
+
.callback = video_detect_force_native,
500
508
/* Acer Aspire 4810T */
501
509
.matches = {
502
510
DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
+20
-14
drivers/block/ublk_drv.c
+20
-14
drivers/block/ublk_drv.c
···
715
715
}
716
716
}
717
717
718
-
static void ubq_complete_io_cmd(struct ublk_io *io, int res)
718
+
static void ubq_complete_io_cmd(struct ublk_io *io, int res,
719
+
unsigned issue_flags)
719
720
{
720
721
/* mark this cmd owned by ublksrv */
721
722
io->flags |= UBLK_IO_FLAG_OWNED_BY_SRV;
···
728
727
io->flags &= ~UBLK_IO_FLAG_ACTIVE;
729
728
730
729
/* tell ublksrv one io request is coming */
731
-
io_uring_cmd_done(io->cmd, res, 0);
730
+
io_uring_cmd_done(io->cmd, res, 0, issue_flags);
732
731
}
733
732
734
733
#define UBLK_REQUEUE_DELAY_MS 3
···
745
744
mod_delayed_work(system_wq, &ubq->dev->monitor_work, 0);
746
745
}
747
746
748
-
static inline void __ublk_rq_task_work(struct request *req)
747
+
static inline void __ublk_rq_task_work(struct request *req,
748
+
unsigned issue_flags)
749
749
{
750
750
struct ublk_queue *ubq = req->mq_hctx->driver_data;
751
751
int tag = req->tag;
···
784
782
pr_devel("%s: need get data. op %d, qid %d tag %d io_flags %x\n",
785
783
__func__, io->cmd->cmd_op, ubq->q_id,
786
784
req->tag, io->flags);
787
-
ubq_complete_io_cmd(io, UBLK_IO_RES_NEED_GET_DATA);
785
+
ubq_complete_io_cmd(io, UBLK_IO_RES_NEED_GET_DATA, issue_flags);
788
786
return;
789
787
}
790
788
/*
···
822
820
mapped_bytes >> 9;
823
821
}
824
822
825
-
ubq_complete_io_cmd(io, UBLK_IO_RES_OK);
823
+
ubq_complete_io_cmd(io, UBLK_IO_RES_OK, issue_flags);
826
824
}
827
825
828
-
static inline void ublk_forward_io_cmds(struct ublk_queue *ubq)
826
+
static inline void ublk_forward_io_cmds(struct ublk_queue *ubq,
827
+
unsigned issue_flags)
829
828
{
830
829
struct llist_node *io_cmds = llist_del_all(&ubq->io_cmds);
831
830
struct ublk_rq_data *data, *tmp;
832
831
833
832
io_cmds = llist_reverse_order(io_cmds);
834
833
llist_for_each_entry_safe(data, tmp, io_cmds, node)
835
-
__ublk_rq_task_work(blk_mq_rq_from_pdu(data));
834
+
__ublk_rq_task_work(blk_mq_rq_from_pdu(data), issue_flags);
836
835
}
837
836
838
837
static inline void ublk_abort_io_cmds(struct ublk_queue *ubq)
···
845
842
__ublk_abort_rq(ubq, blk_mq_rq_from_pdu(data));
846
843
}
847
844
848
-
static void ublk_rq_task_work_cb(struct io_uring_cmd *cmd)
845
+
static void ublk_rq_task_work_cb(struct io_uring_cmd *cmd, unsigned issue_flags)
849
846
{
850
847
struct ublk_uring_cmd_pdu *pdu = ublk_get_uring_cmd_pdu(cmd);
851
848
struct ublk_queue *ubq = pdu->ubq;
852
849
853
-
ublk_forward_io_cmds(ubq);
850
+
ublk_forward_io_cmds(ubq, issue_flags);
854
851
}
855
852
856
853
static void ublk_rq_task_work_fn(struct callback_head *work)
···
859
856
struct ublk_rq_data, work);
860
857
struct request *req = blk_mq_rq_from_pdu(data);
861
858
struct ublk_queue *ubq = req->mq_hctx->driver_data;
859
+
unsigned issue_flags = IO_URING_F_UNLOCKED;
862
860
863
-
ublk_forward_io_cmds(ubq);
861
+
ublk_forward_io_cmds(ubq, issue_flags);
864
862
}
865
863
866
864
static void ublk_queue_cmd(struct ublk_queue *ubq, struct request *rq)
···
1115
1111
struct ublk_io *io = &ubq->ios[i];
1116
1112
1117
1113
if (io->flags & UBLK_IO_FLAG_ACTIVE)
1118
-
io_uring_cmd_done(io->cmd, UBLK_IO_RES_ABORT, 0);
1114
+
io_uring_cmd_done(io->cmd, UBLK_IO_RES_ABORT, 0,
1115
+
IO_URING_F_UNLOCKED);
1119
1116
}
1120
1117
1121
1118
/* all io commands are canceled */
···
1356
1351
return -EIOCBQUEUED;
1357
1352
1358
1353
out:
1359
-
io_uring_cmd_done(cmd, ret, 0);
1354
+
io_uring_cmd_done(cmd, ret, 0, issue_flags);
1360
1355
pr_devel("%s: complete: cmd op %d, tag %d ret %x io_flags %x\n",
1361
1356
__func__, cmd_op, tag, ret, io->flags);
1362
1357
return -EIOCBQUEUED;
···
1607
1602
set_bit(GD_SUPPRESS_PART_SCAN, &disk->state);
1608
1603
1609
1604
get_device(&ub->cdev_dev);
1605
+
ub->dev_info.state = UBLK_S_DEV_LIVE;
1610
1606
ret = add_disk(disk);
1611
1607
if (ret) {
1612
1608
/*
1613
1609
* Has to drop the reference since ->free_disk won't be
1614
1610
* called in case of add_disk failure.
1615
1611
*/
1612
+
ub->dev_info.state = UBLK_S_DEV_DEAD;
1616
1613
ublk_put_device(ub);
1617
1614
goto out_put_disk;
1618
1615
}
1619
1616
set_bit(UB_STATE_USED, &ub->state);
1620
-
ub->dev_info.state = UBLK_S_DEV_LIVE;
1621
1617
out_put_disk:
1622
1618
if (ret)
1623
1619
put_disk(disk);
···
2239
2233
if (ub)
2240
2234
ublk_put_device(ub);
2241
2235
out:
2242
-
io_uring_cmd_done(cmd, ret, 0);
2236
+
io_uring_cmd_done(cmd, ret, 0, issue_flags);
2243
2237
pr_devel("%s: cmd done ret %d cmd_op %x, dev id %d qid %d\n",
2244
2238
__func__, ret, cmd->cmd_op, header->dev_id, header->queue_id);
2245
2239
return -EIOCBQUEUED;
+1
-1
drivers/bus/imx-weim.c
+1
-1
drivers/bus/imx-weim.c
···
204
204
const struct of_device_id *of_id = of_match_device(weim_id_table,
205
205
&pdev->dev);
206
206
const struct imx_weim_devtype *devtype = of_id->data;
207
+
int ret = 0, have_child = 0;
207
208
struct device_node *child;
208
-
int ret, have_child = 0;
209
209
struct weim_priv *priv;
210
210
void __iomem *base;
211
211
u32 reg;
+1
-2
drivers/firmware/arm_scmi/bus.c
+1
-2
drivers/firmware/arm_scmi/bus.c
···
14
14
#include <linux/kernel.h>
15
15
#include <linux/slab.h>
16
16
#include <linux/device.h>
17
-
#include <linux/of.h>
18
17
19
18
#include "common.h"
20
19
···
435
436
/* Nothing to do. */
436
437
if (!phead) {
437
438
mutex_unlock(&scmi_requested_devices_mtx);
438
-
return scmi_dev;
439
+
return NULL;
439
440
}
440
441
441
442
/* Walk the list of requested devices for protocol and create them */
+7
-7
drivers/firmware/arm_scmi/driver.c
+7
-7
drivers/firmware/arm_scmi/driver.c
···
2221
2221
hash_init(info->pending_xfers);
2222
2222
2223
2223
/* Allocate a bitmask sized to hold MSG_TOKEN_MAX tokens */
2224
-
info->xfer_alloc_table = devm_kcalloc(dev, BITS_TO_LONGS(MSG_TOKEN_MAX),
2225
-
sizeof(long), GFP_KERNEL);
2224
+
info->xfer_alloc_table = devm_bitmap_zalloc(dev, MSG_TOKEN_MAX,
2225
+
GFP_KERNEL);
2226
2226
if (!info->xfer_alloc_table)
2227
2227
return -ENOMEM;
2228
2228
···
2657
2657
struct scmi_handle *handle;
2658
2658
const struct scmi_desc *desc;
2659
2659
struct scmi_info *info;
2660
+
bool coex = IS_ENABLED(CONFIG_ARM_SCMI_RAW_MODE_SUPPORT_COEX);
2660
2661
struct device *dev = &pdev->dev;
2661
2662
struct device_node *child, *np = dev->of_node;
2662
2663
···
2732
2731
dev_warn(dev, "Failed to setup SCMI debugfs.\n");
2733
2732
2734
2733
if (IS_ENABLED(CONFIG_ARM_SCMI_RAW_MODE_SUPPORT)) {
2735
-
bool coex =
2736
-
IS_ENABLED(CONFIG_ARM_SCMI_RAW_MODE_SUPPORT_COEX);
2737
-
2738
2734
ret = scmi_debugfs_raw_mode_setup(info);
2739
2735
if (!coex) {
2740
2736
if (ret)
2741
2737
goto clear_dev_req_notifier;
2742
2738
2743
-
/* Bail out anyway when coex enabled */
2744
-
return ret;
2739
+
/* Bail out anyway when coex disabled. */
2740
+
return 0;
2745
2741
}
2746
2742
2747
2743
/* Coex enabled, carry on in any case. */
···
2762
2764
ret = scmi_protocol_acquire(handle, SCMI_PROTOCOL_BASE);
2763
2765
if (ret) {
2764
2766
dev_err(dev, "unable to communicate with SCMI\n");
2767
+
if (coex)
2768
+
return 0;
2765
2769
goto notification_exit;
2766
2770
}
2767
2771
+37
drivers/firmware/arm_scmi/mailbox.c
+37
drivers/firmware/arm_scmi/mailbox.c
···
52
52
"#mbox-cells", idx, NULL);
53
53
}
54
54
55
+
static int mailbox_chan_validate(struct device *cdev)
56
+
{
57
+
int num_mb, num_sh, ret = 0;
58
+
struct device_node *np = cdev->of_node;
59
+
60
+
num_mb = of_count_phandle_with_args(np, "mboxes", "#mbox-cells");
61
+
num_sh = of_count_phandle_with_args(np, "shmem", NULL);
62
+
/* Bail out if mboxes and shmem descriptors are inconsistent */
63
+
if (num_mb <= 0 || num_sh > 2 || num_mb != num_sh) {
64
+
dev_warn(cdev, "Invalid channel descriptor for '%s'\n",
65
+
of_node_full_name(np));
66
+
return -EINVAL;
67
+
}
68
+
69
+
if (num_sh > 1) {
70
+
struct device_node *np_tx, *np_rx;
71
+
72
+
np_tx = of_parse_phandle(np, "shmem", 0);
73
+
np_rx = of_parse_phandle(np, "shmem", 1);
74
+
/* SCMI Tx and Rx shared mem areas have to be distinct */
75
+
if (!np_tx || !np_rx || np_tx == np_rx) {
76
+
dev_warn(cdev, "Invalid shmem descriptor for '%s'\n",
77
+
of_node_full_name(np));
78
+
ret = -EINVAL;
79
+
}
80
+
81
+
of_node_put(np_tx);
82
+
of_node_put(np_rx);
83
+
}
84
+
85
+
return ret;
86
+
}
87
+
55
88
static int mailbox_chan_setup(struct scmi_chan_info *cinfo, struct device *dev,
56
89
bool tx)
57
90
{
···
96
63
struct mbox_client *cl;
97
64
resource_size_t size;
98
65
struct resource res;
66
+
67
+
ret = mailbox_chan_validate(cdev);
68
+
if (ret)
69
+
return ret;
99
70
100
71
smbox = devm_kzalloc(dev, sizeof(*smbox), GFP_KERNEL);
101
72
if (!smbox)
+13
-3
drivers/firmware/efi/earlycon.c
+13
-3
drivers/firmware/efi/earlycon.c
···
215
215
}
216
216
}
217
217
218
+
static bool __initdata fb_probed;
219
+
220
+
void __init efi_earlycon_reprobe(void)
221
+
{
222
+
if (fb_probed)
223
+
setup_earlycon("efifb");
224
+
}
225
+
218
226
static int __init efi_earlycon_setup(struct earlycon_device *device,
219
227
const char *opt)
220
228
{
···
230
222
u16 xres, yres;
231
223
u32 i;
232
224
233
-
if (screen_info.orig_video_isVGA != VIDEO_TYPE_EFI)
225
+
fb_wb = opt && !strcmp(opt, "ram");
226
+
227
+
if (screen_info.orig_video_isVGA != VIDEO_TYPE_EFI) {
228
+
fb_probed = true;
234
229
return -ENODEV;
230
+
}
235
231
236
232
fb_base = screen_info.lfb_base;
237
233
if (screen_info.capabilities & VIDEO_CAPABILITY_64BIT_BASE)
238
234
fb_base |= (u64)screen_info.ext_lfb_base << 32;
239
-
240
-
fb_wb = opt && !strcmp(opt, "ram");
241
235
242
236
si = &screen_info;
243
237
xres = si->lfb_width;
+3
drivers/firmware/efi/efi-init.c
+3
drivers/firmware/efi/efi-init.c
+1
-1
drivers/firmware/efi/libstub/Makefile.zboot
+1
-1
drivers/firmware/efi/libstub/Makefile.zboot
+4
-1
drivers/firmware/efi/libstub/arm64-stub.c
+4
-1
drivers/firmware/efi/libstub/arm64-stub.c
···
85
85
}
86
86
}
87
87
88
-
if (image->image_base != _text)
88
+
if (image->image_base != _text) {
89
89
efi_err("FIRMWARE BUG: efi_loaded_image_t::image_base has bogus value\n");
90
+
image->image_base = _text;
91
+
}
90
92
91
93
if (!IS_ALIGNED((u64)_text, SEGMENT_ALIGN))
92
94
efi_err("FIRMWARE BUG: kernel image not aligned on %dk boundary\n",
···
141
139
*image_addr = *reserve_addr;
142
140
memcpy((void *)*image_addr, _text, kernel_size);
143
141
caches_clean_inval_pou(*image_addr, *image_addr + kernel_codesize);
142
+
efi_remap_image(*image_addr, *reserve_size, kernel_codesize);
144
143
145
144
return EFI_SUCCESS;
146
145
}
+31
-8
drivers/firmware/efi/libstub/arm64.c
+31
-8
drivers/firmware/efi/libstub/arm64.c
···
16
16
17
17
static bool system_needs_vamap(void)
18
18
{
19
-
const u8 *type1_family = efi_get_smbios_string(1, family);
19
+
const struct efi_smbios_type4_record *record;
20
+
const u32 __aligned(1) *socid;
21
+
const u8 *version;
20
22
21
23
/*
22
24
* Ampere eMAG, Altra, and Altra Max machines crash in SetTime() if
23
-
* SetVirtualAddressMap() has not been called prior.
25
+
* SetVirtualAddressMap() has not been called prior. Most Altra systems
26
+
* can be identified by the SMCCC soc ID, which is conveniently exposed
27
+
* via the type 4 SMBIOS records. Otherwise, test the processor version
28
+
* field. eMAG systems all appear to have the processor version field
29
+
* set to "eMAG".
24
30
*/
25
-
if (!type1_family || (
26
-
strcmp(type1_family, "eMAG") &&
27
-
strcmp(type1_family, "Altra") &&
28
-
strcmp(type1_family, "Altra Max")))
31
+
record = (struct efi_smbios_type4_record *)efi_get_smbios_record(4);
32
+
if (!record)
29
33
return false;
30
34
31
-
efi_warn("Working around broken SetVirtualAddressMap()\n");
32
-
return true;
35
+
socid = (u32 *)record->processor_id;
36
+
switch (*socid & 0xffff000f) {
37
+
static char const altra[] = "Ampere(TM) Altra(TM) Processor";
38
+
static char const emag[] = "eMAG";
39
+
40
+
default:
41
+
version = efi_get_smbios_string(&record->header, 4,
42
+
processor_version);
43
+
if (!version || (strncmp(version, altra, sizeof(altra) - 1) &&
44
+
strncmp(version, emag, sizeof(emag) - 1)))
45
+
break;
46
+
47
+
fallthrough;
48
+
49
+
case 0x0a160001: // Altra
50
+
case 0x0a160002: // Altra Max
51
+
efi_warn("Working around broken SetVirtualAddressMap()\n");
52
+
return true;
53
+
}
54
+
55
+
return false;
33
56
}
34
57
35
58
efi_status_t check_platform_features(void)
+11
drivers/firmware/efi/libstub/efi-stub-entry.c
+11
drivers/firmware/efi/libstub/efi-stub-entry.c
···
5
5
6
6
#include "efistub.h"
7
7
8
+
static unsigned long screen_info_offset;
9
+
10
+
struct screen_info *alloc_screen_info(void)
11
+
{
12
+
if (IS_ENABLED(CONFIG_ARM))
13
+
return __alloc_screen_info();
14
+
return (void *)&screen_info + screen_info_offset;
15
+
}
16
+
8
17
/*
9
18
* EFI entry point for the generic EFI stub used by ARM, arm64, RISC-V and
10
19
* LoongArch. This is the entrypoint that is described in the PE/COFF header
···
64
55
efi_err("Failed to relocate kernel\n");
65
56
return status;
66
57
}
58
+
59
+
screen_info_offset = image_addr - (unsigned long)image->image_base;
67
60
68
61
status = efi_stub_common(handle, image, image_addr, cmdline_ptr);
69
62
-5
drivers/firmware/efi/libstub/efi-stub.c
-5
drivers/firmware/efi/libstub/efi-stub.c
···
47
47
static u64 virtmap_base = EFI_RT_VIRTUAL_BASE;
48
48
static bool flat_va_mapping = (EFI_RT_VIRTUAL_OFFSET != 0);
49
49
50
-
struct screen_info * __weak alloc_screen_info(void)
51
-
{
52
-
return &screen_info;
53
-
}
54
-
55
50
void __weak free_screen_info(struct screen_info *si)
56
51
{
57
52
}
+39
-4
drivers/firmware/efi/libstub/efistub.h
+39
-4
drivers/firmware/efi/libstub/efistub.h
···
1062
1062
void efi_retrieve_tpm2_eventlog(void);
1063
1063
1064
1064
struct screen_info *alloc_screen_info(void);
1065
+
struct screen_info *__alloc_screen_info(void);
1065
1066
void free_screen_info(struct screen_info *si);
1066
1067
1067
1068
void efi_cache_sync_image(unsigned long image_base,
···
1074
1073
u8 length;
1075
1074
u16 handle;
1076
1075
};
1076
+
1077
+
const struct efi_smbios_record *efi_get_smbios_record(u8 type);
1077
1078
1078
1079
struct efi_smbios_type1_record {
1079
1080
struct efi_smbios_record header;
···
1090
1087
u8 family;
1091
1088
};
1092
1089
1093
-
#define efi_get_smbios_string(__type, __name) ({ \
1094
-
int size = sizeof(struct efi_smbios_type ## __type ## _record); \
1090
+
struct efi_smbios_type4_record {
1091
+
struct efi_smbios_record header;
1092
+
1093
+
u8 socket;
1094
+
u8 processor_type;
1095
+
u8 processor_family;
1096
+
u8 processor_manufacturer;
1097
+
u8 processor_id[8];
1098
+
u8 processor_version;
1099
+
u8 voltage;
1100
+
u16 external_clock;
1101
+
u16 max_speed;
1102
+
u16 current_speed;
1103
+
u8 status;
1104
+
u8 processor_upgrade;
1105
+
u16 l1_cache_handle;
1106
+
u16 l2_cache_handle;
1107
+
u16 l3_cache_handle;
1108
+
u8 serial_number;
1109
+
u8 asset_tag;
1110
+
u8 part_number;
1111
+
u8 core_count;
1112
+
u8 enabled_core_count;
1113
+
u8 thread_count;
1114
+
u16 processor_characteristics;
1115
+
u16 processor_family2;
1116
+
u16 core_count2;
1117
+
u16 enabled_core_count2;
1118
+
u16 thread_count2;
1119
+
u16 thread_enabled;
1120
+
};
1121
+
1122
+
#define efi_get_smbios_string(__record, __type, __name) ({ \
1095
1123
int off = offsetof(struct efi_smbios_type ## __type ## _record, \
1096
1124
__name); \
1097
-
__efi_get_smbios_string(__type, off, size); \
1125
+
__efi_get_smbios_string((__record), __type, off); \
1098
1126
})
1099
1127
1100
-
const u8 *__efi_get_smbios_string(u8 type, int offset, int recsize);
1128
+
const u8 *__efi_get_smbios_string(const struct efi_smbios_record *record,
1129
+
u8 type, int offset);
1101
1130
1102
1131
void efi_remap_image(unsigned long image_base, unsigned alloc_size,
1103
1132
unsigned long code_size);
+1
drivers/firmware/efi/libstub/randomalloc.c
+1
drivers/firmware/efi/libstub/randomalloc.c
···
101
101
* to calculate the randomly chosen address, and allocate it directly
102
102
* using EFI_ALLOCATE_ADDRESS.
103
103
*/
104
+
status = EFI_OUT_OF_RESOURCES;
104
105
for (map_offset = 0; map_offset < map->map_size; map_offset += map->desc_size) {
105
106
efi_memory_desc_t *md = (void *)map->map + map_offset;
106
107
efi_physical_addr_t target;
+1
-8
drivers/firmware/efi/libstub/screen_info.c
+1
-8
drivers/firmware/efi/libstub/screen_info.c
···
15
15
* early, but it only works if the EFI stub is part of the core kernel image
16
16
* itself. The zboot decompressor can only use the configuration table
17
17
* approach.
18
-
*
19
-
* In order to support both methods from the same build of the EFI stub
20
-
* library, provide this dummy global definition of struct screen_info. If it
21
-
* is required to satisfy a link dependency, it means we need to override the
22
-
* __weak alloc and free methods with the ones below, and those will be pulled
23
-
* in as well.
24
18
*/
25
-
struct screen_info screen_info;
26
19
27
20
static efi_guid_t screen_info_guid = LINUX_EFI_SCREEN_INFO_TABLE_GUID;
28
21
29
-
struct screen_info *alloc_screen_info(void)
22
+
struct screen_info *__alloc_screen_info(void)
30
23
{
31
24
struct screen_info *si;
32
25
efi_status_t status;
+12
-3
drivers/firmware/efi/libstub/smbios.c
+12
-3
drivers/firmware/efi/libstub/smbios.c
···
22
22
u8 minor_version;
23
23
};
24
24
25
-
const u8 *__efi_get_smbios_string(u8 type, int offset, int recsize)
25
+
const struct efi_smbios_record *efi_get_smbios_record(u8 type)
26
26
{
27
27
struct efi_smbios_record *record;
28
28
efi_smbios_protocol_t *smbios;
29
29
efi_status_t status;
30
30
u16 handle = 0xfffe;
31
-
const u8 *strtable;
32
31
33
32
status = efi_bs_call(locate_protocol, &EFI_SMBIOS_PROTOCOL_GUID, NULL,
34
33
(void **)&smbios) ?:
35
34
efi_call_proto(smbios, get_next, &handle, &type, &record, NULL);
36
35
if (status != EFI_SUCCESS)
37
36
return NULL;
37
+
return record;
38
+
}
38
39
39
-
strtable = (u8 *)record + recsize;
40
+
const u8 *__efi_get_smbios_string(const struct efi_smbios_record *record,
41
+
u8 type, int offset)
42
+
{
43
+
const u8 *strtable;
44
+
45
+
if (!record)
46
+
return NULL;
47
+
48
+
strtable = (u8 *)record + record->length;
40
49
for (int i = 1; i < ((u8 *)record)[offset]; i++) {
41
50
int len = strlen(strtable);
42
51
+1
-1
drivers/firmware/efi/libstub/zboot-header.S
+1
-1
drivers/firmware/efi/libstub/zboot-header.S
+5
drivers/firmware/efi/libstub/zboot.c
+5
drivers/firmware/efi/libstub/zboot.c
···
57
57
// executable code loaded into memory to be safe for execution.
58
58
}
59
59
60
+
struct screen_info *alloc_screen_info(void)
61
+
{
62
+
return __alloc_screen_info();
63
+
}
64
+
60
65
asmlinkage efi_status_t __efiapi
61
66
efi_zboot_entry(efi_handle_t handle, efi_system_table_t *systab)
62
67
{
+12
-1
drivers/firmware/efi/sysfb_efi.c
+12
-1
drivers/firmware/efi/sysfb_efi.c
···
272
272
"IdeaPad Duet 3 10IGL5"),
273
273
},
274
274
},
275
+
{
276
+
/* Lenovo Yoga Book X91F / X91L */
277
+
.matches = {
278
+
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"),
279
+
/* Non exact match to match F + L versions */
280
+
DMI_MATCH(DMI_PRODUCT_NAME, "Lenovo YB1-X91"),
281
+
},
282
+
},
275
283
{},
276
284
};
277
285
···
349
341
#ifdef CONFIG_EFI
350
342
static struct fwnode_handle efifb_fwnode;
351
343
352
-
__init void sysfb_apply_efi_quirks(struct platform_device *pd)
344
+
__init void sysfb_apply_efi_quirks(void)
353
345
{
354
346
if (screen_info.orig_video_isVGA != VIDEO_TYPE_EFI ||
355
347
!(screen_info.capabilities & VIDEO_CAPABILITY_SKIP_QUIRKS))
···
363
355
screen_info.lfb_height = temp;
364
356
screen_info.lfb_linelength = 4 * screen_info.lfb_width;
365
357
}
358
+
}
366
359
360
+
__init void sysfb_set_efifb_fwnode(struct platform_device *pd)
361
+
{
367
362
if (screen_info.orig_video_isVGA == VIDEO_TYPE_EFI && IS_ENABLED(CONFIG_PCI)) {
368
363
fwnode_init(&efifb_fwnode, &efifb_fwnode_ops);
369
364
pd->dev.fwnode = &efifb_fwnode;
+1
-1
drivers/firmware/qcom_scm.c
+1
-1
drivers/firmware/qcom_scm.c
+3
-1
drivers/firmware/sysfb.c
+3
-1
drivers/firmware/sysfb.c
···
81
81
if (disabled)
82
82
goto unlock_mutex;
83
83
84
+
sysfb_apply_efi_quirks();
85
+
84
86
/* try to create a simple-framebuffer device */
85
87
compatible = sysfb_parse_mode(si, &mode);
86
88
if (compatible) {
···
109
107
goto unlock_mutex;
110
108
}
111
109
112
-
sysfb_apply_efi_quirks(pd);
110
+
sysfb_set_efifb_fwnode(pd);
113
111
114
112
ret = platform_device_add_data(pd, si, sizeof(*si));
115
113
if (ret)
+1
-1
drivers/firmware/sysfb_simplefb.c
+1
-1
drivers/firmware/sysfb_simplefb.c
+3
-2
drivers/gpu/drm/amd/amdgpu/amdgpu.h
+3
-2
drivers/gpu/drm/amd/amdgpu/amdgpu.h
···
1272
1272
int amdgpu_device_pci_reset(struct amdgpu_device *adev);
1273
1273
bool amdgpu_device_need_post(struct amdgpu_device *adev);
1274
1274
bool amdgpu_device_should_use_aspm(struct amdgpu_device *adev);
1275
+
bool amdgpu_device_aspm_support_quirk(void);
1275
1276
1276
1277
void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes,
1277
1278
u64 num_vis_bytes);
···
1392
1391
int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);
1393
1392
1394
1393
void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_backlight_caps *caps);
1394
+
bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev);
1395
1395
void amdgpu_acpi_detect(void);
1396
1396
#else
1397
1397
static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }
1398
1398
static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }
1399
+
static inline bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev) { return false; }
1399
1400
static inline void amdgpu_acpi_detect(void) { }
1400
1401
static inline bool amdgpu_acpi_is_power_shift_control_supported(void) { return false; }
1401
1402
static inline int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,
···
1408
1405
1409
1406
#if defined(CONFIG_ACPI) && defined(CONFIG_SUSPEND)
1410
1407
bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
1411
-
bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev);
1412
1408
bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
1413
1409
#else
1414
1410
static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { return false; }
1415
-
static inline bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev) { return false; }
1416
1411
static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { return false; }
1417
1412
#endif
1418
1413
+28
-18
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+28
-18
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
···
971
971
return true;
972
972
}
973
973
974
+
975
+
/**
976
+
* amdgpu_acpi_should_gpu_reset
977
+
*
978
+
* @adev: amdgpu_device_pointer
979
+
*
980
+
* returns true if should reset GPU, false if not
981
+
*/
982
+
bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev)
983
+
{
984
+
if ((adev->flags & AMD_IS_APU) &&
985
+
adev->gfx.imu.funcs) /* Not need to do mode2 reset for IMU enabled APUs */
986
+
return false;
987
+
988
+
if ((adev->flags & AMD_IS_APU) &&
989
+
amdgpu_acpi_is_s3_active(adev))
990
+
return false;
991
+
992
+
if (amdgpu_sriov_vf(adev))
993
+
return false;
994
+
995
+
#if IS_ENABLED(CONFIG_SUSPEND)
996
+
return pm_suspend_target_state != PM_SUSPEND_TO_IDLE;
997
+
#else
998
+
return true;
999
+
#endif
1000
+
}
1001
+
974
1002
/*
975
1003
* amdgpu_acpi_detect - detect ACPI ATIF/ATCS methods
976
1004
*
···
1068
1040
{
1069
1041
return !(adev->flags & AMD_IS_APU) ||
1070
1042
(pm_suspend_target_state == PM_SUSPEND_MEM);
1071
-
}
1072
-
1073
-
/**
1074
-
* amdgpu_acpi_should_gpu_reset
1075
-
*
1076
-
* @adev: amdgpu_device_pointer
1077
-
*
1078
-
* returns true if should reset GPU, false if not
1079
-
*/
1080
-
bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev)
1081
-
{
1082
-
if (adev->flags & AMD_IS_APU)
1083
-
return false;
1084
-
1085
-
if (amdgpu_sriov_vf(adev))
1086
-
return false;
1087
-
1088
-
return pm_suspend_target_state != PM_SUSPEND_TO_IDLE;
1089
1043
}
1090
1044
1091
1045
/**
+15
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+15
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
···
80
80
81
81
#include <drm/drm_drv.h>
82
82
83
+
#if IS_ENABLED(CONFIG_X86)
84
+
#include <asm/intel-family.h>
85
+
#endif
86
+
83
87
MODULE_FIRMWARE("amdgpu/vega10_gpu_info.bin");
84
88
MODULE_FIRMWARE("amdgpu/vega12_gpu_info.bin");
85
89
MODULE_FIRMWARE("amdgpu/raven_gpu_info.bin");
···
1358
1354
return false;
1359
1355
}
1360
1356
return pcie_aspm_enabled(adev->pdev);
1357
+
}
1358
+
1359
+
bool amdgpu_device_aspm_support_quirk(void)
1360
+
{
1361
+
#if IS_ENABLED(CONFIG_X86)
1362
+
struct cpuinfo_x86 *c = &cpu_data(0);
1363
+
1364
+
return !(c->x86 == 6 && c->x86_model == INTEL_FAM6_ALDERLAKE);
1365
+
#else
1366
+
return true;
1367
+
#endif
1361
1368
}
1362
1369
1363
1370
/* if we get transitioned to only one device, take VGA back */
+4
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+4
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
···
2467
2467
adev->in_s4 = false;
2468
2468
if (r)
2469
2469
return r;
2470
-
return amdgpu_asic_reset(adev);
2470
+
2471
+
if (amdgpu_acpi_should_gpu_reset(adev))
2472
+
return amdgpu_asic_reset(adev);
2473
+
return 0;
2471
2474
}
2472
2475
2473
2476
static int amdgpu_pmops_thaw(struct device *dev)
+9
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+9
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
···
678
678
ptr = &ring->fence_drv.fences[i];
679
679
old = rcu_dereference_protected(*ptr, 1);
680
680
if (old && old->ops == &amdgpu_job_fence_ops) {
681
+
struct amdgpu_job *job;
682
+
683
+
/* For non-scheduler bad job, i.e. failed ib test, we need to signal
684
+
* it right here or we won't be able to track them in fence_drv
685
+
* and they will remain unsignaled during sa_bo free.
686
+
*/
687
+
job = container_of(old, struct amdgpu_job, hw_fence);
688
+
if (!job->base.s_fence && !dma_fence_is_signaled(old))
689
+
dma_fence_signal(old);
681
690
RCU_INIT_POINTER(*ptr, NULL);
682
691
dma_fence_put(old);
683
692
}
+14
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+14
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
···
1287
1287
break;
1288
1288
}
1289
1289
1290
+
/* Enable CG flag in one VF mode for enabling RLC safe mode enter/exit */
1291
+
if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(11, 0, 3) &&
1292
+
amdgpu_sriov_is_pp_one_vf(adev))
1293
+
adev->cg_flags = AMD_CG_SUPPORT_GFX_CGCG;
1294
+
1290
1295
/* EOP Event */
1291
1296
r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_GRBM_CP,
1292
1297
GFX_11_0_0__SRCID__CP_EOP_INTERRUPT,
···
4660
4655
return false;
4661
4656
}
4662
4657
4658
+
static int gfx_v11_0_post_soft_reset(void *handle)
4659
+
{
4660
+
/**
4661
+
* GFX soft reset will impact MES, need resume MES when do GFX soft reset
4662
+
*/
4663
+
return amdgpu_mes_resume((struct amdgpu_device *)handle);
4664
+
}
4665
+
4663
4666
static uint64_t gfx_v11_0_get_gpu_clock_counter(struct amdgpu_device *adev)
4664
4667
{
4665
4668
uint64_t clock;
···
6179
6166
.wait_for_idle = gfx_v11_0_wait_for_idle,
6180
6167
.soft_reset = gfx_v11_0_soft_reset,
6181
6168
.check_soft_reset = gfx_v11_0_check_soft_reset,
6169
+
.post_soft_reset = gfx_v11_0_post_soft_reset,
6182
6170
.set_clockgating_state = gfx_v11_0_set_clockgating_state,
6183
6171
.set_powergating_state = gfx_v11_0_set_powergating_state,
6184
6172
.get_clockgating_state = gfx_v11_0_get_clockgating_state,
+1
-1
drivers/gpu/drm/amd/amdgpu/nv.c
+1
-1
drivers/gpu/drm/amd/amdgpu/nv.c
+1
-16
drivers/gpu/drm/amd/amdgpu/vi.c
+1
-16
drivers/gpu/drm/amd/amdgpu/vi.c
···
81
81
#include "mxgpu_vi.h"
82
82
#include "amdgpu_dm.h"
83
83
84
-
#if IS_ENABLED(CONFIG_X86)
85
-
#include <asm/intel-family.h>
86
-
#endif
87
-
88
84
#define ixPCIE_LC_L1_PM_SUBSTATE 0x100100C6
89
85
#define PCIE_LC_L1_PM_SUBSTATE__LC_L1_SUBSTATES_OVERRIDE_EN_MASK 0x00000001L
90
86
#define PCIE_LC_L1_PM_SUBSTATE__LC_PCI_PM_L1_2_OVERRIDE_MASK 0x00000002L
···
1134
1138
WREG32_PCIE(ixPCIE_LC_CNTL, data);
1135
1139
}
1136
1140
1137
-
static bool aspm_support_quirk_check(void)
1138
-
{
1139
-
#if IS_ENABLED(CONFIG_X86)
1140
-
struct cpuinfo_x86 *c = &cpu_data(0);
1141
-
1142
-
return !(c->x86 == 6 && c->x86_model == INTEL_FAM6_ALDERLAKE);
1143
-
#else
1144
-
return true;
1145
-
#endif
1146
-
}
1147
-
1148
1141
static void vi_program_aspm(struct amdgpu_device *adev)
1149
1142
{
1150
1143
u32 data, data1, orig;
1151
1144
bool bL1SS = false;
1152
1145
bool bClkReqSupport = true;
1153
1146
1154
-
if (!amdgpu_device_should_use_aspm(adev) || !aspm_support_quirk_check())
1147
+
if (!amdgpu_device_should_use_aspm(adev) || !amdgpu_device_aspm_support_quirk())
1155
1148
return;
1156
1149
1157
1150
if (adev->flags & AMD_IS_APU ||
-1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
-1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
···
7244
7244
if (!aconnector->mst_root)
7245
7245
drm_connector_attach_max_bpc_property(&aconnector->base, 8, 16);
7246
7246
7247
-
/* This defaults to the max in the range, but we want 8bpc for non-edp. */
7248
7247
aconnector->base.state->max_bpc = 16;
7249
7248
aconnector->base.state->max_requested_bpc = aconnector->base.state->max_bpc;
7250
7249
+43
-8
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+43
-8
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
···
212
212
return false;
213
213
}
214
214
215
+
bool is_synaptics_cascaded_panamera(struct dc_link *link, struct drm_dp_mst_port *port)
216
+
{
217
+
u8 branch_vendor_data[4] = { 0 }; // Vendor data 0x50C ~ 0x50F
218
+
219
+
if (drm_dp_dpcd_read(port->mgr->aux, DP_BRANCH_VENDOR_SPECIFIC_START, &branch_vendor_data, 4) == 4) {
220
+
if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 &&
221
+
IS_SYNAPTICS_CASCADED_PANAMERA(link->dpcd_caps.branch_dev_name, branch_vendor_data)) {
222
+
DRM_INFO("Synaptics Cascaded MST hub\n");
223
+
return true;
224
+
}
225
+
}
226
+
227
+
return false;
228
+
}
229
+
215
230
static bool validate_dsc_caps_on_connector(struct amdgpu_dm_connector *aconnector)
216
231
{
217
232
struct dc_sink *dc_sink = aconnector->dc_sink;
···
249
234
if (!aconnector->dsc_aux && !port->parent->port_parent &&
250
235
needs_dsc_aux_workaround(aconnector->dc_link))
251
236
aconnector->dsc_aux = &aconnector->mst_root->dm_dp_aux.aux;
237
+
238
+
/* synaptics cascaded MST hub case */
239
+
if (!aconnector->dsc_aux && is_synaptics_cascaded_panamera(aconnector->dc_link, port))
240
+
aconnector->dsc_aux = port->mgr->aux;
252
241
253
242
if (!aconnector->dsc_aux)
254
243
return false;
···
681
662
struct amdgpu_dm_connector *aconnector;
682
663
};
683
664
684
-
static int kbps_to_peak_pbn(int kbps)
665
+
static uint16_t get_fec_overhead_multiplier(struct dc_link *dc_link)
666
+
{
667
+
u8 link_coding_cap;
668
+
uint16_t fec_overhead_multiplier_x1000 = PBN_FEC_OVERHEAD_MULTIPLIER_8B_10B;
669
+
670
+
link_coding_cap = dc_link_dp_mst_decide_link_encoding_format(dc_link);
671
+
if (link_coding_cap == DP_128b_132b_ENCODING)
672
+
fec_overhead_multiplier_x1000 = PBN_FEC_OVERHEAD_MULTIPLIER_128B_132B;
673
+
674
+
return fec_overhead_multiplier_x1000;
675
+
}
676
+
677
+
static int kbps_to_peak_pbn(int kbps, uint16_t fec_overhead_multiplier_x1000)
685
678
{
686
679
u64 peak_kbps = kbps;
687
680
688
681
peak_kbps *= 1006;
689
-
peak_kbps = div_u64(peak_kbps, 1000);
682
+
peak_kbps *= fec_overhead_multiplier_x1000;
683
+
peak_kbps = div_u64(peak_kbps, 1000 * 1000);
690
684
return (int) DIV64_U64_ROUND_UP(peak_kbps * 64, (54 * 8 * 1000));
691
685
}
692
686
···
793
761
int link_timeslots_used;
794
762
int fair_pbn_alloc;
795
763
int ret = 0;
764
+
uint16_t fec_overhead_multiplier_x1000 = get_fec_overhead_multiplier(dc_link);
796
765
797
766
for (i = 0; i < count; i++) {
798
767
if (vars[i + k].dsc_enabled) {
799
768
initial_slack[i] =
800
-
kbps_to_peak_pbn(params[i].bw_range.max_kbps) - vars[i + k].pbn;
769
+
kbps_to_peak_pbn(params[i].bw_range.max_kbps, fec_overhead_multiplier_x1000) - vars[i + k].pbn;
801
770
bpp_increased[i] = false;
802
771
remaining_to_increase += 1;
803
772
} else {
···
894
861
int next_index;
895
862
int remaining_to_try = 0;
896
863
int ret;
864
+
uint16_t fec_overhead_multiplier_x1000 = get_fec_overhead_multiplier(dc_link);
897
865
898
866
for (i = 0; i < count; i++) {
899
867
if (vars[i + k].dsc_enabled
···
924
890
if (next_index == -1)
925
891
break;
926
892
927
-
vars[next_index].pbn = kbps_to_peak_pbn(params[next_index].bw_range.stream_kbps);
893
+
vars[next_index].pbn = kbps_to_peak_pbn(params[next_index].bw_range.stream_kbps, fec_overhead_multiplier_x1000);
928
894
ret = drm_dp_atomic_find_time_slots(state,
929
895
params[next_index].port->mgr,
930
896
params[next_index].port,
···
937
903
vars[next_index].dsc_enabled = false;
938
904
vars[next_index].bpp_x16 = 0;
939
905
} else {
940
-
vars[next_index].pbn = kbps_to_peak_pbn(params[next_index].bw_range.max_kbps);
906
+
vars[next_index].pbn = kbps_to_peak_pbn(params[next_index].bw_range.max_kbps, fec_overhead_multiplier_x1000);
941
907
ret = drm_dp_atomic_find_time_slots(state,
942
908
params[next_index].port->mgr,
943
909
params[next_index].port,
···
966
932
int count = 0;
967
933
int i, k, ret;
968
934
bool debugfs_overwrite = false;
935
+
uint16_t fec_overhead_multiplier_x1000 = get_fec_overhead_multiplier(dc_link);
969
936
970
937
memset(params, 0, sizeof(params));
971
938
···
1028
993
/* Try no compression */
1029
994
for (i = 0; i < count; i++) {
1030
995
vars[i + k].aconnector = params[i].aconnector;
1031
-
vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.stream_kbps);
996
+
vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.stream_kbps, fec_overhead_multiplier_x1000);
1032
997
vars[i + k].dsc_enabled = false;
1033
998
vars[i + k].bpp_x16 = 0;
1034
999
ret = drm_dp_atomic_find_time_slots(state, params[i].port->mgr, params[i].port,
···
1047
1012
/* Try max compression */
1048
1013
for (i = 0; i < count; i++) {
1049
1014
if (params[i].compression_possible && params[i].clock_force_enable != DSC_CLK_FORCE_DISABLE) {
1050
-
vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.min_kbps);
1015
+
vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.min_kbps, fec_overhead_multiplier_x1000);
1051
1016
vars[i + k].dsc_enabled = true;
1052
1017
vars[i + k].bpp_x16 = params[i].bw_range.min_target_bpp_x16;
1053
1018
ret = drm_dp_atomic_find_time_slots(state, params[i].port->mgr,
···
1055
1020
if (ret < 0)
1056
1021
return ret;
1057
1022
} else {
1058
-
vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.stream_kbps);
1023
+
vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.stream_kbps, fec_overhead_multiplier_x1000);
1059
1024
vars[i + k].dsc_enabled = false;
1060
1025
vars[i + k].bpp_x16 = 0;
1061
1026
ret = drm_dp_atomic_find_time_slots(state, params[i].port->mgr,
+15
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h
+15
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h
···
34
34
#define SYNAPTICS_RC_OFFSET 0x4BC
35
35
#define SYNAPTICS_RC_DATA 0x4C0
36
36
37
+
#define DP_BRANCH_VENDOR_SPECIFIC_START 0x50C
38
+
39
+
/**
40
+
* Panamera MST Hub detection
41
+
* Offset DPCD 050Eh == 0x5A indicates cascaded MST hub case
42
+
* Check from beginning of branch device vendor specific field (050Ch)
43
+
*/
44
+
#define IS_SYNAPTICS_PANAMERA(branchDevName) (((int)branchDevName[4] & 0xF0) == 0x50 ? 1 : 0)
45
+
#define BRANCH_HW_REVISION_PANAMERA_A2 0x10
46
+
#define SYNAPTICS_CASCADED_HUB_ID 0x5A
47
+
#define IS_SYNAPTICS_CASCADED_PANAMERA(devName, data) ((IS_SYNAPTICS_PANAMERA(devName) && ((int)data[2] == SYNAPTICS_CASCADED_HUB_ID)) ? 1 : 0)
48
+
49
+
#define PBN_FEC_OVERHEAD_MULTIPLIER_8B_10B 1031
50
+
#define PBN_FEC_OVERHEAD_MULTIPLIER_128B_132B 1000
51
+
37
52
struct amdgpu_display_manager;
38
53
struct amdgpu_dm_connector;
39
54
+1
-2
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c
+1
-2
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c
+1
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
+1
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
+2
-2
drivers/gpu/drm/bridge/lontium-lt8912b.c
+2
-2
drivers/gpu/drm/bridge/lontium-lt8912b.c
···
676
676
677
677
lt->hdmi_port = of_drm_find_bridge(port_node);
678
678
if (!lt->hdmi_port) {
679
-
dev_err(lt->dev, "%s: Failed to get hdmi port\n", __func__);
680
-
ret = -ENODEV;
679
+
ret = -EPROBE_DEFER;
680
+
dev_err_probe(lt->dev, ret, "%s: Failed to get hdmi port\n", __func__);
681
681
goto err_free_host_node;
682
682
}
683
683
+2
-2
drivers/gpu/drm/drm_buddy.c
+2
-2
drivers/gpu/drm/drm_buddy.c
···
146
146
unsigned int order;
147
147
u64 root_size;
148
148
149
-
root_size = rounddown_pow_of_two(size);
150
-
order = ilog2(root_size) - ilog2(chunk_size);
149
+
order = ilog2(size) - ilog2(chunk_size);
150
+
root_size = chunk_size << order;
151
151
152
152
root = drm_block_alloc(mm, NULL, order, offset);
153
153
if (!root)
+10
-3
drivers/gpu/drm/drm_panel_orientation_quirks.c
+10
-3
drivers/gpu/drm/drm_panel_orientation_quirks.c
···
328
328
DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "IdeaPad Duet 3 10IGL5"),
329
329
},
330
330
.driver_data = (void *)&lcd1200x1920_rightside_up,
331
-
}, { /* Lenovo Yoga Book X90F / X91F / X91L */
331
+
}, { /* Lenovo Yoga Book X90F / X90L */
332
332
.matches = {
333
-
/* Non exact match to match all versions */
334
-
DMI_MATCH(DMI_PRODUCT_NAME, "Lenovo YB1-X9"),
333
+
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
334
+
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "CHERRYVIEW D1 PLATFORM"),
335
+
DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "YETI-11"),
336
+
},
337
+
.driver_data = (void *)&lcd1200x1920_rightside_up,
338
+
}, { /* Lenovo Yoga Book X91F / X91L */
339
+
.matches = {
340
+
/* Non exact match to match F + L versions */
341
+
DMI_MATCH(DMI_PRODUCT_NAME, "Lenovo YB1-X91"),
335
342
},
336
343
.driver_data = (void *)&lcd1200x1920_rightside_up,
337
344
}, { /* Lenovo Yoga Tablet 2 830F / 830L */
+97
-4
drivers/gpu/drm/i915/display/intel_color.c
+97
-4
drivers/gpu/drm/i915/display/intel_color.c
···
47
47
*/
48
48
void (*color_commit_arm)(const struct intel_crtc_state *crtc_state);
49
49
/*
50
+
* Perform any extra tasks needed after all the
51
+
* double buffered registers have been latched.
52
+
*/
53
+
void (*color_post_update)(const struct intel_crtc_state *crtc_state);
54
+
/*
50
55
* Load LUTs (and other single buffered color management
51
56
* registers). Will (hopefully) be called during the vblank
52
57
* following the latching of any double buffered registers
···
619
614
620
615
static void icl_color_commit_noarm(const struct intel_crtc_state *crtc_state)
621
616
{
617
+
/*
618
+
* Despite Wa_1406463849, ICL no longer suffers from the SKL
619
+
* DC5/PSR CSC black screen issue (see skl_color_commit_noarm()).
620
+
* Possibly due to the extra sticky CSC arming
621
+
* (see icl_color_post_update()).
622
+
*
623
+
* On TGL+ all CSC arming issues have been properly fixed.
624
+
*/
622
625
icl_load_csc_matrix(crtc_state);
626
+
}
627
+
628
+
static void skl_color_commit_noarm(const struct intel_crtc_state *crtc_state)
629
+
{
630
+
/*
631
+
* Possibly related to display WA #1184, SKL CSC loses the latched
632
+
* CSC coeff/offset register values if the CSC registers are disarmed
633
+
* between DC5 exit and PSR exit. This will cause the plane(s) to
634
+
* output all black (until CSC_MODE is rearmed and properly latched).
635
+
* Once PSR exit (and proper register latching) has occurred the
636
+
* danger is over. Thus when PSR is enabled the CSC coeff/offset
637
+
* register programming will be peformed from skl_color_commit_arm()
638
+
* which is called after PSR exit.
639
+
*/
640
+
if (!crtc_state->has_psr)
641
+
ilk_load_csc_matrix(crtc_state);
623
642
}
624
643
625
644
static void ilk_color_commit_noarm(const struct intel_crtc_state *crtc_state)
···
688
659
enum pipe pipe = crtc->pipe;
689
660
u32 val = 0;
690
661
662
+
if (crtc_state->has_psr)
663
+
ilk_load_csc_matrix(crtc_state);
664
+
691
665
/*
692
666
* We don't (yet) allow userspace to control the pipe background color,
693
667
* so force it to black, but apply pipe gamma and CSC appropriately
···
707
675
708
676
intel_de_write_fw(i915, PIPE_CSC_MODE(crtc->pipe),
709
677
crtc_state->csc_mode);
678
+
}
679
+
680
+
static void icl_color_commit_arm(const struct intel_crtc_state *crtc_state)
681
+
{
682
+
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
683
+
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
684
+
enum pipe pipe = crtc->pipe;
685
+
686
+
/*
687
+
* We don't (yet) allow userspace to control the pipe background color,
688
+
* so force it to black.
689
+
*/
690
+
intel_de_write(i915, SKL_BOTTOM_COLOR(pipe), 0);
691
+
692
+
intel_de_write(i915, GAMMA_MODE(crtc->pipe),
693
+
crtc_state->gamma_mode);
694
+
695
+
intel_de_write_fw(i915, PIPE_CSC_MODE(crtc->pipe),
696
+
crtc_state->csc_mode);
697
+
}
698
+
699
+
static void icl_color_post_update(const struct intel_crtc_state *crtc_state)
700
+
{
701
+
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
702
+
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
703
+
704
+
/*
705
+
* Despite Wa_1406463849, ICL CSC is no longer disarmed by
706
+
* coeff/offset register *writes*. Instead, once CSC_MODE
707
+
* is armed it stays armed, even after it has been latched.
708
+
* Afterwards the coeff/offset registers become effectively
709
+
* self-arming. That self-arming must be disabled before the
710
+
* next icl_color_commit_noarm() tries to write the next set
711
+
* of coeff/offset registers. Fortunately register *reads*
712
+
* do still disarm the CSC. Naturally this must not be done
713
+
* until the previously written CSC registers have actually
714
+
* been latched.
715
+
*
716
+
* TGL+ no longer need this workaround.
717
+
*/
718
+
intel_de_read_fw(i915, PIPE_CSC_PREOFF_HI(crtc->pipe));
710
719
}
711
720
712
721
static struct drm_property_blob *
···
1444
1371
struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
1445
1372
1446
1373
i915->display.funcs.color->color_commit_arm(crtc_state);
1374
+
}
1375
+
1376
+
void intel_color_post_update(const struct intel_crtc_state *crtc_state)
1377
+
{
1378
+
struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
1379
+
1380
+
if (i915->display.funcs.color->color_post_update)
1381
+
i915->display.funcs.color->color_post_update(crtc_state);
1447
1382
}
1448
1383
1449
1384
void intel_color_prepare_commit(struct intel_crtc_state *crtc_state)
···
3145
3064
.lut_equal = i9xx_lut_equal,
3146
3065
};
3147
3066
3067
+
static const struct intel_color_funcs tgl_color_funcs = {
3068
+
.color_check = icl_color_check,
3069
+
.color_commit_noarm = icl_color_commit_noarm,
3070
+
.color_commit_arm = icl_color_commit_arm,
3071
+
.load_luts = icl_load_luts,
3072
+
.read_luts = icl_read_luts,
3073
+
.lut_equal = icl_lut_equal,
3074
+
};
3075
+
3148
3076
static const struct intel_color_funcs icl_color_funcs = {
3149
3077
.color_check = icl_color_check,
3150
3078
.color_commit_noarm = icl_color_commit_noarm,
3151
-
.color_commit_arm = skl_color_commit_arm,
3079
+
.color_commit_arm = icl_color_commit_arm,
3080
+
.color_post_update = icl_color_post_update,
3152
3081
.load_luts = icl_load_luts,
3153
3082
.read_luts = icl_read_luts,
3154
3083
.lut_equal = icl_lut_equal,
···
3166
3075
3167
3076
static const struct intel_color_funcs glk_color_funcs = {
3168
3077
.color_check = glk_color_check,
3169
-
.color_commit_noarm = ilk_color_commit_noarm,
3078
+
.color_commit_noarm = skl_color_commit_noarm,
3170
3079
.color_commit_arm = skl_color_commit_arm,
3171
3080
.load_luts = glk_load_luts,
3172
3081
.read_luts = glk_read_luts,
···
3175
3084
3176
3085
static const struct intel_color_funcs skl_color_funcs = {
3177
3086
.color_check = ivb_color_check,
3178
-
.color_commit_noarm = ilk_color_commit_noarm,
3087
+
.color_commit_noarm = skl_color_commit_noarm,
3179
3088
.color_commit_arm = skl_color_commit_arm,
3180
3089
.load_luts = bdw_load_luts,
3181
3090
.read_luts = bdw_read_luts,
···
3271
3180
else
3272
3181
i915->display.funcs.color = &i9xx_color_funcs;
3273
3182
} else {
3274
-
if (DISPLAY_VER(i915) >= 11)
3183
+
if (DISPLAY_VER(i915) >= 12)
3184
+
i915->display.funcs.color = &tgl_color_funcs;
3185
+
else if (DISPLAY_VER(i915) == 11)
3275
3186
i915->display.funcs.color = &icl_color_funcs;
3276
3187
else if (DISPLAY_VER(i915) == 10)
3277
3188
i915->display.funcs.color = &glk_color_funcs;
+1
drivers/gpu/drm/i915/display/intel_color.h
+1
drivers/gpu/drm/i915/display/intel_color.h
···
21
21
void intel_color_cleanup_commit(struct intel_crtc_state *crtc_state);
22
22
void intel_color_commit_noarm(const struct intel_crtc_state *crtc_state);
23
23
void intel_color_commit_arm(const struct intel_crtc_state *crtc_state);
24
+
void intel_color_post_update(const struct intel_crtc_state *crtc_state);
24
25
void intel_color_load_luts(const struct intel_crtc_state *crtc_state);
25
26
void intel_color_get_config(struct intel_crtc_state *crtc_state);
26
27
bool intel_color_lut_equal(const struct intel_crtc_state *crtc_state,
+8
drivers/gpu/drm/i915/display/intel_crtc.c
+8
drivers/gpu/drm/i915/display/intel_crtc.c
···
683
683
*/
684
684
intel_vrr_send_push(new_crtc_state);
685
685
686
+
/*
687
+
* Seamless M/N update may need to update frame timings.
688
+
*
689
+
* FIXME Should be synchronized with the start of vblank somehow...
690
+
*/
691
+
if (new_crtc_state->seamless_m_n && intel_crtc_needs_fastset(new_crtc_state))
692
+
intel_crtc_update_active_timings(new_crtc_state);
693
+
686
694
local_irq_enable();
687
695
688
696
if (intel_vgpu_active(dev_priv))
+29
-3
drivers/gpu/drm/i915/display/intel_display.c
+29
-3
drivers/gpu/drm/i915/display/intel_display.c
···
1209
1209
if (needs_cursorclk_wa(old_crtc_state) &&
1210
1210
!needs_cursorclk_wa(new_crtc_state))
1211
1211
icl_wa_cursorclkgating(dev_priv, pipe, false);
1212
+
1213
+
if (intel_crtc_needs_color_update(new_crtc_state))
1214
+
intel_color_post_update(new_crtc_state);
1212
1215
}
1213
1216
1214
1217
static void intel_crtc_enable_flip_done(struct intel_atomic_state *state,
···
5148
5145
* only fields that are know to not cause problems are preserved. */
5149
5146
5150
5147
saved_state->uapi = crtc_state->uapi;
5148
+
saved_state->inherited = crtc_state->inherited;
5151
5149
saved_state->scaler_state = crtc_state->scaler_state;
5152
5150
saved_state->shared_dpll = crtc_state->shared_dpll;
5153
5151
saved_state->dpll_hw_state = crtc_state->dpll_hw_state;
···
7094
7090
7095
7091
intel_fbc_update(state, crtc);
7096
7092
7093
+
drm_WARN_ON(&i915->drm, !intel_display_power_is_enabled(i915, POWER_DOMAIN_DC_OFF));
7094
+
7097
7095
if (!modeset &&
7098
7096
intel_crtc_needs_color_update(new_crtc_state))
7099
7097
intel_color_commit_noarm(new_crtc_state);
···
7463
7457
drm_atomic_helper_wait_for_dependencies(&state->base);
7464
7458
drm_dp_mst_atomic_wait_for_dependencies(&state->base);
7465
7459
7466
-
if (state->modeset)
7467
-
wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_MODESET);
7460
+
/*
7461
+
* During full modesets we write a lot of registers, wait
7462
+
* for PLLs, etc. Doing that while DC states are enabled
7463
+
* is not a good idea.
7464
+
*
7465
+
* During fastsets and other updates we also need to
7466
+
* disable DC states due to the following scenario:
7467
+
* 1. DC5 exit and PSR exit happen
7468
+
* 2. Some or all _noarm() registers are written
7469
+
* 3. Due to some long delay PSR is re-entered
7470
+
* 4. DC5 entry -> DMC saves the already written new
7471
+
* _noarm() registers and the old not yet written
7472
+
* _arm() registers
7473
+
* 5. DC5 exit -> DMC restores a mixture of old and
7474
+
* new register values and arms the update
7475
+
* 6. PSR exit -> hardware latches a mixture of old and
7476
+
* new register values -> corrupted frame, or worse
7477
+
* 7. New _arm() registers are finally written
7478
+
* 8. Hardware finally latches a complete set of new
7479
+
* register values, and subsequent frames will be OK again
7480
+
*/
7481
+
wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DC_OFF);
7468
7482
7469
7483
intel_atomic_prepare_plane_clear_colors(state);
7470
7484
···
7633
7607
* the culprit.
7634
7608
*/
7635
7609
intel_uncore_arm_unclaimed_mmio_detection(&dev_priv->uncore);
7636
-
intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET, wakeref);
7637
7610
}
7611
+
intel_display_power_put(dev_priv, POWER_DOMAIN_DC_OFF, wakeref);
7638
7612
intel_runtime_pm_put(&dev_priv->runtime_pm, state->wakeref);
7639
7613
7640
7614
/*
+21
-5
drivers/gpu/drm/i915/display/intel_dmc.c
+21
-5
drivers/gpu/drm/i915/display/intel_dmc.c
···
384
384
}
385
385
}
386
386
387
-
static void pipedmc_clock_gating_wa(struct drm_i915_private *i915, bool enable)
387
+
static void adlp_pipedmc_clock_gating_wa(struct drm_i915_private *i915, bool enable)
388
388
{
389
389
enum pipe pipe;
390
390
391
-
if (DISPLAY_VER(i915) < 13)
392
-
return;
393
-
394
391
/*
395
-
* Wa_16015201720:adl-p,dg2, mtl
392
+
* Wa_16015201720:adl-p,dg2
396
393
* The WA requires clock gating to be disabled all the time
397
394
* for pipe A and B.
398
395
* For pipe C and D clock gating needs to be disabled only
···
403
406
for (pipe = PIPE_C; pipe <= PIPE_D; pipe++)
404
407
intel_de_rmw(i915, CLKGATE_DIS_PSL_EXT(pipe),
405
408
PIPEDMC_GATING_DIS, 0);
409
+
}
410
+
411
+
static void mtl_pipedmc_clock_gating_wa(struct drm_i915_private *i915)
412
+
{
413
+
/*
414
+
* Wa_16015201720
415
+
* The WA requires clock gating to be disabled all the time
416
+
* for pipe A and B.
417
+
*/
418
+
intel_de_rmw(i915, GEN9_CLKGATE_DIS_0, 0,
419
+
MTL_PIPEDMC_GATING_DIS_A | MTL_PIPEDMC_GATING_DIS_B);
420
+
}
421
+
422
+
static void pipedmc_clock_gating_wa(struct drm_i915_private *i915, bool enable)
423
+
{
424
+
if (DISPLAY_VER(i915) >= 14 && enable)
425
+
mtl_pipedmc_clock_gating_wa(i915);
426
+
else if (DISPLAY_VER(i915) == 13)
427
+
adlp_pipedmc_clock_gating_wa(i915, enable);
406
428
}
407
429
408
430
void intel_dmc_enable_pipe(struct drm_i915_private *i915, enum pipe pipe)
+2
drivers/gpu/drm/i915/display/intel_dpt.c
+2
drivers/gpu/drm/i915/display/intel_dpt.c
···
301
301
vm->pte_encode = gen8_ggtt_pte_encode;
302
302
303
303
dpt->obj = dpt_obj;
304
+
dpt->obj->is_dpt = true;
304
305
305
306
return &dpt->vm;
306
307
}
···
310
309
{
311
310
struct i915_dpt *dpt = i915_vm_to_dpt(vm);
312
311
312
+
dpt->obj->is_dpt = false;
313
313
i915_vm_put(&dpt->vm);
314
314
}
+18
-6
drivers/gpu/drm/i915/display/intel_fbdev.c
+18
-6
drivers/gpu/drm/i915/display/intel_fbdev.c
···
210
210
bool prealloc = false;
211
211
void __iomem *vaddr;
212
212
struct drm_i915_gem_object *obj;
213
+
struct i915_gem_ww_ctx ww;
213
214
int ret;
214
215
215
216
mutex_lock(&ifbdev->hpd_lock);
···
284
283
info->fix.smem_len = vma->size;
285
284
}
286
285
287
-
vaddr = i915_vma_pin_iomap(vma);
288
-
if (IS_ERR(vaddr)) {
289
-
drm_err(&dev_priv->drm,
290
-
"Failed to remap framebuffer into virtual memory (%pe)\n", vaddr);
291
-
ret = PTR_ERR(vaddr);
292
-
goto out_unpin;
286
+
for_i915_gem_ww(&ww, ret, false) {
287
+
ret = i915_gem_object_lock(vma->obj, &ww);
288
+
289
+
if (ret)
290
+
continue;
291
+
292
+
vaddr = i915_vma_pin_iomap(vma);
293
+
if (IS_ERR(vaddr)) {
294
+
drm_err(&dev_priv->drm,
295
+
"Failed to remap framebuffer into virtual memory (%pe)\n", vaddr);
296
+
ret = PTR_ERR(vaddr);
297
+
continue;
298
+
}
293
299
}
300
+
301
+
if (ret)
302
+
goto out_unpin;
303
+
294
304
info->screen_base = vaddr;
295
305
info->screen_size = vma->size;
296
306
+2
-2
drivers/gpu/drm/i915/display/intel_tc.c
+2
-2
drivers/gpu/drm/i915/display/intel_tc.c
···
418
418
val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
419
419
if (val == 0xffffffff) {
420
420
drm_dbg_kms(&i915->drm,
421
-
"Port %s: PHY in TCCOLD, assume safe mode\n",
421
+
"Port %s: PHY in TCCOLD, assume not owned\n",
422
422
dig_port->tc_port_name);
423
-
return true;
423
+
return false;
424
424
}
425
425
426
426
return val & DP_PHY_MODE_STATUS_NOT_SAFE(dig_port->tc_phy_fia_idx);
+2
-1
drivers/gpu/drm/i915/gem/i915_gem_lmem.c
+2
-1
drivers/gpu/drm/i915/gem/i915_gem_lmem.c
+1
-1
drivers/gpu/drm/i915/gem/i915_gem_object.h
+1
-1
drivers/gpu/drm/i915/gem/i915_gem_object.h
+3
drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+3
drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+2
-2
drivers/gpu/drm/i915/gt/intel_gt.c
+2
-2
drivers/gpu/drm/i915/gt/intel_gt.c
-27
drivers/gpu/drm/i915/gt/intel_gt_pm.c
-27
drivers/gpu/drm/i915/gt/intel_gt_pm.c
···
21
21
#include "intel_rc6.h"
22
22
#include "intel_rps.h"
23
23
#include "intel_wakeref.h"
24
-
#include "intel_pcode.h"
25
24
#include "pxp/intel_pxp_pm.h"
26
25
27
26
#define I915_GT_SUSPEND_IDLE_TIMEOUT (HZ / 2)
28
-
29
-
static void mtl_media_busy(struct intel_gt *gt)
30
-
{
31
-
/* Wa_14017073508: mtl */
32
-
if (IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0) &&
33
-
gt->type == GT_MEDIA)
34
-
snb_pcode_write_p(gt->uncore, PCODE_MBOX_GT_STATE,
35
-
PCODE_MBOX_GT_STATE_MEDIA_BUSY,
36
-
PCODE_MBOX_GT_STATE_DOMAIN_MEDIA, 0);
37
-
}
38
-
39
-
static void mtl_media_idle(struct intel_gt *gt)
40
-
{
41
-
/* Wa_14017073508: mtl */
42
-
if (IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0) &&
43
-
gt->type == GT_MEDIA)
44
-
snb_pcode_write_p(gt->uncore, PCODE_MBOX_GT_STATE,
45
-
PCODE_MBOX_GT_STATE_MEDIA_NOT_BUSY,
46
-
PCODE_MBOX_GT_STATE_DOMAIN_MEDIA, 0);
47
-
}
48
27
49
28
static void user_forcewake(struct intel_gt *gt, bool suspend)
50
29
{
···
71
92
struct drm_i915_private *i915 = gt->i915;
72
93
73
94
GT_TRACE(gt, "\n");
74
-
75
-
/* Wa_14017073508: mtl */
76
-
mtl_media_busy(gt);
77
95
78
96
/*
79
97
* It seems that the DMC likes to transition between the DC states a lot
···
120
144
/* Defer dropping the display power well for 100ms, it's slow! */
121
145
GEM_BUG_ON(!wakeref);
122
146
intel_display_power_put_async(i915, POWER_DOMAIN_GT_IRQ, wakeref);
123
-
124
-
/* Wa_14017073508: mtl */
125
-
mtl_media_idle(gt);
126
147
127
148
return 0;
128
149
}
+1
-1
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
+1
-1
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
+8
drivers/gpu/drm/i915/gt/intel_rc6.c
+8
drivers/gpu/drm/i915/gt/intel_rc6.c
···
486
486
static bool rc6_supported(struct intel_rc6 *rc6)
487
487
{
488
488
struct drm_i915_private *i915 = rc6_to_i915(rc6);
489
+
struct intel_gt *gt = rc6_to_gt(rc6);
489
490
490
491
if (!HAS_RC6(i915))
491
492
return false;
···
500
499
if (IS_GEN9_LP(i915) && !bxt_check_bios_rc6_setup(rc6)) {
501
500
drm_notice(&i915->drm,
502
501
"RC6 and powersaving disabled by BIOS\n");
502
+
return false;
503
+
}
504
+
505
+
if (IS_MTL_MEDIA_STEP(gt->i915, STEP_A0, STEP_B0) &&
506
+
gt->type == GT_MEDIA) {
507
+
drm_notice(&i915->drm,
508
+
"Media RC6 disabled on A step\n");
503
509
return false;
504
510
}
505
511
+21
-17
drivers/gpu/drm/i915/gt/intel_rps.c
+21
-17
drivers/gpu/drm/i915/gt/intel_rps.c
···
2075
2075
rps_disable_interrupts(rps);
2076
2076
}
2077
2077
2078
-
u32 intel_rps_read_rpstat_fw(struct intel_rps *rps)
2079
-
{
2080
-
struct drm_i915_private *i915 = rps_to_i915(rps);
2081
-
i915_reg_t rpstat;
2082
-
2083
-
rpstat = (GRAPHICS_VER(i915) >= 12) ? GEN12_RPSTAT1 : GEN6_RPSTAT1;
2084
-
2085
-
return intel_uncore_read_fw(rps_to_gt(rps)->uncore, rpstat);
2086
-
}
2087
-
2088
2078
u32 intel_rps_read_rpstat(struct intel_rps *rps)
2089
2079
{
2090
2080
struct drm_i915_private *i915 = rps_to_i915(rps);
···
2085
2095
return intel_uncore_read(rps_to_gt(rps)->uncore, rpstat);
2086
2096
}
2087
2097
2088
-
u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat)
2098
+
static u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat)
2089
2099
{
2090
2100
struct drm_i915_private *i915 = rps_to_i915(rps);
2091
2101
u32 cagf;
···
2108
2118
return cagf;
2109
2119
}
2110
2120
2111
-
static u32 read_cagf(struct intel_rps *rps)
2121
+
static u32 __read_cagf(struct intel_rps *rps, bool take_fw)
2112
2122
{
2113
2123
struct drm_i915_private *i915 = rps_to_i915(rps);
2114
2124
struct intel_uncore *uncore = rps_to_uncore(rps);
2125
+
i915_reg_t r = INVALID_MMIO_REG;
2115
2126
u32 freq;
2116
2127
2117
2128
/*
···
2120
2129
* registers will return 0 freq when GT is in RC6
2121
2130
*/
2122
2131
if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) {
2123
-
freq = intel_uncore_read(uncore, MTL_MIRROR_TARGET_WP1);
2132
+
r = MTL_MIRROR_TARGET_WP1;
2124
2133
} else if (GRAPHICS_VER(i915) >= 12) {
2125
-
freq = intel_uncore_read(uncore, GEN12_RPSTAT1);
2134
+
r = GEN12_RPSTAT1;
2126
2135
} else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
2127
2136
vlv_punit_get(i915);
2128
2137
freq = vlv_punit_read(i915, PUNIT_REG_GPU_FREQ_STS);
2129
2138
vlv_punit_put(i915);
2130
2139
} else if (GRAPHICS_VER(i915) >= 6) {
2131
-
freq = intel_uncore_read(uncore, GEN6_RPSTAT1);
2140
+
r = GEN6_RPSTAT1;
2132
2141
} else {
2133
-
freq = intel_uncore_read(uncore, MEMSTAT_ILK);
2142
+
r = MEMSTAT_ILK;
2134
2143
}
2135
2144
2145
+
if (i915_mmio_reg_valid(r))
2146
+
freq = take_fw ? intel_uncore_read(uncore, r) : intel_uncore_read_fw(uncore, r);
2147
+
2136
2148
return intel_rps_get_cagf(rps, freq);
2149
+
}
2150
+
2151
+
static u32 read_cagf(struct intel_rps *rps)
2152
+
{
2153
+
return __read_cagf(rps, true);
2137
2154
}
2138
2155
2139
2156
u32 intel_rps_read_actual_frequency(struct intel_rps *rps)
···
2156
2157
return freq;
2157
2158
}
2158
2159
2159
-
u32 intel_rps_read_punit_req(struct intel_rps *rps)
2160
+
u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps)
2161
+
{
2162
+
return intel_gpu_freq(rps, __read_cagf(rps, false));
2163
+
}
2164
+
2165
+
static u32 intel_rps_read_punit_req(struct intel_rps *rps)
2160
2166
{
2161
2167
struct intel_uncore *uncore = rps_to_uncore(rps);
2162
2168
struct intel_runtime_pm *rpm = rps_to_uncore(rps)->rpm;
+1
-3
drivers/gpu/drm/i915/gt/intel_rps.h
+1
-3
drivers/gpu/drm/i915/gt/intel_rps.h
···
37
37
38
38
int intel_gpu_freq(struct intel_rps *rps, int val);
39
39
int intel_freq_opcode(struct intel_rps *rps, int val);
40
-
u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat1);
41
40
u32 intel_rps_read_actual_frequency(struct intel_rps *rps);
41
+
u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps);
42
42
u32 intel_rps_get_requested_frequency(struct intel_rps *rps);
43
43
u32 intel_rps_get_min_frequency(struct intel_rps *rps);
44
44
u32 intel_rps_get_min_raw_freq(struct intel_rps *rps);
···
49
49
u32 intel_rps_get_rp0_frequency(struct intel_rps *rps);
50
50
u32 intel_rps_get_rp1_frequency(struct intel_rps *rps);
51
51
u32 intel_rps_get_rpn_frequency(struct intel_rps *rps);
52
-
u32 intel_rps_read_punit_req(struct intel_rps *rps);
53
52
u32 intel_rps_read_punit_req_frequency(struct intel_rps *rps);
54
53
u32 intel_rps_read_rpstat(struct intel_rps *rps);
55
-
u32 intel_rps_read_rpstat_fw(struct intel_rps *rps);
56
54
void gen6_rps_get_freq_caps(struct intel_rps *rps, struct intel_rps_freq_caps *caps);
57
55
void intel_rps_raise_unslice(struct intel_rps *rps);
58
56
void intel_rps_lower_unslice(struct intel_rps *rps);
+22
drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+22
drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
···
1571
1571
1572
1572
#endif //CONFIG_DRM_I915_CAPTURE_ERROR
1573
1573
1574
+
static void guc_capture_find_ecode(struct intel_engine_coredump *ee)
1575
+
{
1576
+
struct gcap_reg_list_info *reginfo;
1577
+
struct guc_mmio_reg *regs;
1578
+
i915_reg_t reg_ipehr = RING_IPEHR(0);
1579
+
i915_reg_t reg_instdone = RING_INSTDONE(0);
1580
+
int i;
1581
+
1582
+
if (!ee->guc_capture_node)
1583
+
return;
1584
+
1585
+
reginfo = ee->guc_capture_node->reginfo + GUC_CAPTURE_LIST_TYPE_ENGINE_INSTANCE;
1586
+
regs = reginfo->regs;
1587
+
for (i = 0; i < reginfo->num_regs; i++) {
1588
+
if (regs[i].offset == reg_ipehr.reg)
1589
+
ee->ipehr = regs[i].value;
1590
+
else if (regs[i].offset == reg_instdone.reg)
1591
+
ee->instdone.instdone = regs[i].value;
1592
+
}
1593
+
}
1594
+
1574
1595
void intel_guc_capture_free_node(struct intel_engine_coredump *ee)
1575
1596
{
1576
1597
if (!ee || !ee->guc_capture_node)
···
1633
1612
list_del(&n->link);
1634
1613
ee->guc_capture_node = n;
1635
1614
ee->guc_capture = guc->capture;
1615
+
guc_capture_find_ecode(ee);
1636
1616
return;
1637
1617
}
1638
1618
}
+1
-12
drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c
+1
-12
drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c
···
11
11
12
12
static bool __guc_rc_supported(struct intel_guc *guc)
13
13
{
14
-
struct intel_gt *gt = guc_to_gt(guc);
15
-
16
-
/*
17
-
* Wa_14017073508: mtl
18
-
* Do not enable gucrc to avoid additional interrupts which
19
-
* may disrupt pcode wa.
20
-
*/
21
-
if (IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0) &&
22
-
gt->type == GT_MEDIA)
23
-
return false;
24
-
25
14
/* GuC RC is unavailable for pre-Gen12 */
26
15
return guc->submission_supported &&
27
-
GRAPHICS_VER(gt->i915) >= 12;
16
+
GRAPHICS_VER(guc_to_gt(guc)->i915) >= 12;
28
17
}
29
18
30
19
static bool __guc_rc_selected(struct intel_guc *guc)
+1
-2
drivers/gpu/drm/i915/i915_active.c
+1
-2
drivers/gpu/drm/i915/i915_active.c
···
92
92
static void debug_active_activate(struct i915_active *ref)
93
93
{
94
94
lockdep_assert_held(&ref->tree_lock);
95
-
if (!atomic_read(&ref->count)) /* before the first inc */
96
-
debug_object_activate(ref, &active_debug_desc);
95
+
debug_object_activate(ref, &active_debug_desc);
97
96
}
98
97
99
98
static void debug_active_deactivate(struct i915_active *ref)
-5
drivers/gpu/drm/i915/i915_hwmon.c
-5
drivers/gpu/drm/i915/i915_hwmon.c
···
687
687
for_each_gt(gt, i915, i)
688
688
hwm_energy(&hwmon->ddat_gt[i], &energy);
689
689
}
690
-
691
-
/* Enable PL1 power limit */
692
-
if (i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit))
693
-
hwm_locked_with_pm_intel_uncore_rmw(ddat, hwmon->rg.pkg_rapl_limit,
694
-
PKG_PWR_LIM_1_EN, PKG_PWR_LIM_1_EN);
695
690
}
696
691
697
692
void i915_hwmon_register(struct drm_i915_private *i915)
+9
-5
drivers/gpu/drm/i915/i915_perf.c
+9
-5
drivers/gpu/drm/i915/i915_perf.c
···
1592
1592
/*
1593
1593
* Wa_16011777198:dg2: Unset the override of GUCRC mode to enable rc6.
1594
1594
*/
1595
-
if (intel_uc_uses_guc_rc(>->uc) &&
1596
-
(IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) ||
1597
-
IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_B0)))
1595
+
if (stream->override_gucrc)
1598
1596
drm_WARN_ON(>->i915->drm,
1599
1597
intel_guc_slpc_unset_gucrc_mode(>->uc.guc.slpc));
1600
1598
···
3303
3305
if (ret) {
3304
3306
drm_dbg(&stream->perf->i915->drm,
3305
3307
"Unable to override gucrc mode\n");
3306
-
goto err_config;
3308
+
goto err_gucrc;
3307
3309
}
3310
+
3311
+
stream->override_gucrc = true;
3308
3312
}
3309
3313
3310
3314
ret = alloc_oa_buffer(stream);
···
3345
3345
free_oa_buffer(stream);
3346
3346
3347
3347
err_oa_buf_alloc:
3348
-
free_oa_configs(stream);
3348
+
if (stream->override_gucrc)
3349
+
intel_guc_slpc_unset_gucrc_mode(>->uc.guc.slpc);
3349
3350
3351
+
err_gucrc:
3350
3352
intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL);
3351
3353
intel_engine_pm_put(stream->engine);
3354
+
3355
+
free_oa_configs(stream);
3352
3356
3353
3357
err_config:
3354
3358
free_noa_wait(stream);
+6
drivers/gpu/drm/i915/i915_perf_types.h
+6
drivers/gpu/drm/i915/i915_perf_types.h
···
316
316
* buffer should be checked for available data.
317
317
*/
318
318
u64 poll_oa_period;
319
+
320
+
/**
321
+
* @override_gucrc: GuC RC has been overridden for the perf stream,
322
+
* and we need to restore the default configuration on release.
323
+
*/
324
+
bool override_gucrc;
319
325
};
320
326
321
327
/**
+4
-6
drivers/gpu/drm/i915/i915_pmu.c
+4
-6
drivers/gpu/drm/i915/i915_pmu.c
···
393
393
* case we assume the system is running at the intended
394
394
* frequency. Fortunately, the read should rarely fail!
395
395
*/
396
-
val = intel_rps_read_rpstat_fw(rps);
397
-
if (val)
398
-
val = intel_rps_get_cagf(rps, val);
399
-
else
400
-
val = rps->cur_freq;
396
+
val = intel_rps_read_actual_frequency_fw(rps);
397
+
if (!val)
398
+
val = intel_gpu_freq(rps, rps->cur_freq);
401
399
402
400
add_sample_mult(&pmu->sample[__I915_SAMPLE_FREQ_ACT],
403
-
intel_gpu_freq(rps, val), period_ns / 1000);
401
+
val, period_ns / 1000);
404
402
}
405
403
406
404
if (pmu->enable & config_mask(I915_PMU_REQUESTED_FREQUENCY)) {
+5
-12
drivers/gpu/drm/i915/i915_reg.h
+5
-12
drivers/gpu/drm/i915/i915_reg.h
···
1786
1786
* GEN9 clock gating regs
1787
1787
*/
1788
1788
#define GEN9_CLKGATE_DIS_0 _MMIO(0x46530)
1789
-
#define DARBF_GATING_DIS (1 << 27)
1790
-
#define PWM2_GATING_DIS (1 << 14)
1791
-
#define PWM1_GATING_DIS (1 << 13)
1789
+
#define DARBF_GATING_DIS REG_BIT(27)
1790
+
#define MTL_PIPEDMC_GATING_DIS_A REG_BIT(15)
1791
+
#define MTL_PIPEDMC_GATING_DIS_B REG_BIT(14)
1792
+
#define PWM2_GATING_DIS REG_BIT(14)
1793
+
#define PWM1_GATING_DIS REG_BIT(13)
1792
1794
1793
1795
#define GEN9_CLKGATE_DIS_3 _MMIO(0x46538)
1794
1796
#define TGL_VRH_GATING_DIS REG_BIT(31)
···
6598
6596
/* XEHP_PCODE_FREQUENCY_CONFIG param2 */
6599
6597
#define PCODE_MBOX_DOMAIN_NONE 0x0
6600
6598
#define PCODE_MBOX_DOMAIN_MEDIAFF 0x3
6601
-
6602
-
/* Wa_14017210380: mtl */
6603
-
#define PCODE_MBOX_GT_STATE 0x50
6604
-
/* sub-commands (param1) */
6605
-
#define PCODE_MBOX_GT_STATE_MEDIA_BUSY 0x1
6606
-
#define PCODE_MBOX_GT_STATE_MEDIA_NOT_BUSY 0x2
6607
-
/* param2 */
6608
-
#define PCODE_MBOX_GT_STATE_DOMAIN_MEDIA 0x1
6609
-
6610
6599
#define GEN6_PCODE_DATA _MMIO(0x138128)
6611
6600
#define GEN6_PCODE_FREQ_IA_RATIO_SHIFT 8
6612
6601
#define GEN6_PCODE_FREQ_RING_RATIO_SHIFT 16
+8
-5
drivers/gpu/drm/meson/meson_drv.c
+8
-5
drivers/gpu/drm/meson/meson_drv.c
···
325
325
326
326
ret = meson_encoder_hdmi_init(priv);
327
327
if (ret)
328
-
goto exit_afbcd;
328
+
goto unbind_all;
329
329
330
330
ret = meson_plane_create(priv);
331
331
if (ret)
332
-
goto exit_afbcd;
332
+
goto unbind_all;
333
333
334
334
ret = meson_overlay_create(priv);
335
335
if (ret)
336
-
goto exit_afbcd;
336
+
goto unbind_all;
337
337
338
338
ret = meson_crtc_create(priv);
339
339
if (ret)
340
-
goto exit_afbcd;
340
+
goto unbind_all;
341
341
342
342
ret = request_irq(priv->vsync_irq, meson_irq, 0, drm->driver->name, drm);
343
343
if (ret)
344
-
goto exit_afbcd;
344
+
goto unbind_all;
345
345
346
346
drm_mode_config_reset(drm);
347
347
···
359
359
360
360
uninstall_irq:
361
361
free_irq(priv->vsync_irq, drm);
362
+
unbind_all:
363
+
if (has_components)
364
+
component_unbind_all(drm->dev, drm);
362
365
exit_afbcd:
363
366
if (priv->afbcd.ops)
364
367
priv->afbcd.ops->exit(priv);
+6
-1
drivers/gpu/drm/nouveau/nouveau_backlight.c
+6
-1
drivers/gpu/drm/nouveau/nouveau_backlight.c
···
33
33
#include <linux/apple-gmux.h>
34
34
#include <linux/backlight.h>
35
35
#include <linux/idr.h>
36
+
#include <drm/drm_probe_helper.h>
36
37
37
38
#include "nouveau_drv.h"
38
39
#include "nouveau_reg.h"
···
300
299
struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev);
301
300
struct nvif_object *device = &drm->client.device.object;
302
301
302
+
/*
303
+
* Note when this runs the connectors have not been probed yet,
304
+
* so nv_conn->base.status is not set yet.
305
+
*/
303
306
if (!nvif_rd32(device, NV50_PDISP_SOR_PWM_CTL(ffs(nv_encoder->dcb->or) - 1)) ||
304
-
nv_conn->base.status != connector_status_connected)
307
+
drm_helper_probe_detect(&nv_conn->base, NULL, false) != connector_status_connected)
305
308
return -ENODEV;
306
309
307
310
if (nv_conn->type == DCB_CONNECTOR_eDP) {
-6
drivers/gpu/drm/scheduler/sched_main.c
-6
drivers/gpu/drm/scheduler/sched_main.c
+2
-1
drivers/gpu/drm/tests/drm_buddy_test.c
+2
-1
drivers/gpu/drm/tests/drm_buddy_test.c
+5
-2
drivers/hwmon/hwmon.c
+5
-2
drivers/hwmon/hwmon.c
···
757
757
struct hwmon_device *hwdev;
758
758
const char *label;
759
759
struct device *hdev;
760
+
struct device *tdev = dev;
760
761
int i, err, id;
761
762
762
763
/* Complain about invalid characters in hwmon name attribute */
···
827
826
hwdev->name = name;
828
827
hdev->class = &hwmon_class;
829
828
hdev->parent = dev;
830
-
hdev->of_node = dev ? dev->of_node : NULL;
829
+
while (tdev && !tdev->of_node)
830
+
tdev = tdev->parent;
831
+
hdev->of_node = tdev ? tdev->of_node : NULL;
831
832
hwdev->chip = chip;
832
833
dev_set_drvdata(hdev, drvdata);
833
834
dev_set_name(hdev, HWMON_ID_FORMAT, id);
···
841
838
842
839
INIT_LIST_HEAD(&hwdev->tzdata);
843
840
844
-
if (dev && dev->of_node && chip && chip->ops->read &&
841
+
if (hdev->of_node && chip && chip->ops->read &&
845
842
chip->info[0]->type == hwmon_chip &&
846
843
(chip->info[0]->config[0] & HWMON_C_REGISTER_TZ)) {
847
844
err = hwmon_thermal_register_sensors(hdev);
+3
-1
drivers/hwmon/it87.c
+3
-1
drivers/hwmon/it87.c
···
515
515
#define has_six_temp(data) ((data)->features & FEAT_SIX_TEMP)
516
516
#define has_vin3_5v(data) ((data)->features & FEAT_VIN3_5V)
517
517
#define has_conf_noexit(data) ((data)->features & FEAT_CONF_NOEXIT)
518
+
#define has_scaling(data) ((data)->features & (FEAT_12MV_ADC | \
519
+
FEAT_10_9MV_ADC))
518
520
519
521
struct it87_sio_data {
520
522
int sioaddr;
···
3136
3134
"Detected broken BIOS defaults, disabling PWM interface\n");
3137
3135
3138
3136
/* Starting with IT8721F, we handle scaling of internal voltages */
3139
-
if (has_12mv_adc(data)) {
3137
+
if (has_scaling(data)) {
3140
3138
if (sio_data->internal & BIT(0))
3141
3139
data->in_scaled |= BIT(3); /* in3 is AVCC */
3142
3140
if (sio_data->internal & BIT(1))
+7
-1
drivers/hwmon/peci/cputemp.c
+7
-1
drivers/hwmon/peci/cputemp.c
···
537
537
.thermal_margin_to_millidegree = &dts_eight_dot_eight_to_millidegree,
538
538
};
539
539
540
+
static const struct cpu_info cpu_skx = {
541
+
.reg = &resolved_cores_reg_hsx,
542
+
.min_peci_revision = 0x33,
543
+
.thermal_margin_to_millidegree = &dts_ten_dot_six_to_millidegree,
544
+
};
545
+
540
546
static const struct cpu_info cpu_icx = {
541
547
.reg = &resolved_cores_reg_icx,
542
548
.min_peci_revision = 0x40,
···
564
558
},
565
559
{
566
560
.name = "peci_cpu.cputemp.skx",
567
-
.driver_data = (kernel_ulong_t)&cpu_hsx,
561
+
.driver_data = (kernel_ulong_t)&cpu_skx,
568
562
},
569
563
{
570
564
.name = "peci_cpu.cputemp.icx",
+7
-7
drivers/hwmon/xgene-hwmon.c
+7
-7
drivers/hwmon/xgene-hwmon.c
···
698
698
ctx->comm_base_addr = pcc_chan->shmem_base_addr;
699
699
if (ctx->comm_base_addr) {
700
700
if (version == XGENE_HWMON_V2)
701
-
ctx->pcc_comm_addr = (void __force *)ioremap(
702
-
ctx->comm_base_addr,
703
-
pcc_chan->shmem_size);
701
+
ctx->pcc_comm_addr = (void __force *)devm_ioremap(&pdev->dev,
702
+
ctx->comm_base_addr,
703
+
pcc_chan->shmem_size);
704
704
else
705
-
ctx->pcc_comm_addr = memremap(
706
-
ctx->comm_base_addr,
707
-
pcc_chan->shmem_size,
708
-
MEMREMAP_WB);
705
+
ctx->pcc_comm_addr = devm_memremap(&pdev->dev,
706
+
ctx->comm_base_addr,
707
+
pcc_chan->shmem_size,
708
+
MEMREMAP_WB);
709
709
} else {
710
710
dev_err(&pdev->dev, "Failed to get PCC comm region\n");
711
711
rc = -ENODEV;
+12
-1
drivers/i2c/busses/i2c-hisi.c
+12
-1
drivers/i2c/busses/i2c-hisi.c
···
316
316
max_write == 0)
317
317
break;
318
318
}
319
+
320
+
/*
321
+
* Disable the TX_EMPTY interrupt after finishing all the messages to
322
+
* avoid overwhelming the CPU.
323
+
*/
324
+
if (ctlr->msg_tx_idx == ctlr->msg_num)
325
+
hisi_i2c_disable_int(ctlr, HISI_I2C_INT_TX_EMPTY);
319
326
}
320
327
321
328
static irqreturn_t hisi_i2c_irq(int irq, void *context)
···
348
341
hisi_i2c_read_rx_fifo(ctlr);
349
342
350
343
out:
351
-
if (int_stat & HISI_I2C_INT_TRANS_CPLT || ctlr->xfer_err) {
344
+
/*
345
+
* Only use TRANS_CPLT to indicate the completion. On error cases we'll
346
+
* get two interrupts, INT_ERR first then TRANS_CPLT.
347
+
*/
348
+
if (int_stat & HISI_I2C_INT_TRANS_CPLT) {
352
349
hisi_i2c_disable_int(ctlr, HISI_I2C_INT_ALL);
353
350
hisi_i2c_clear_int(ctlr, HISI_I2C_INT_ALL);
354
351
complete(ctlr->completion);
+6
drivers/i2c/busses/i2c-imx-lpi2c.c
+6
drivers/i2c/busses/i2c-imx-lpi2c.c
···
463
463
if (num == 1 && msgs[0].len == 0)
464
464
goto stop;
465
465
466
+
lpi2c_imx->rx_buf = NULL;
467
+
lpi2c_imx->tx_buf = NULL;
466
468
lpi2c_imx->delivered = 0;
467
469
lpi2c_imx->msglen = msgs[i].len;
468
470
init_completion(&lpi2c_imx->complete);
···
505
503
static irqreturn_t lpi2c_imx_isr(int irq, void *dev_id)
506
504
{
507
505
struct lpi2c_imx_struct *lpi2c_imx = dev_id;
506
+
unsigned int enabled;
508
507
unsigned int temp;
508
+
509
+
enabled = readl(lpi2c_imx->base + LPI2C_MIER);
509
510
510
511
lpi2c_imx_intctrl(lpi2c_imx, 0);
511
512
temp = readl(lpi2c_imx->base + LPI2C_MSR);
513
+
temp &= enabled;
512
514
513
515
if (temp & MSR_RDF)
514
516
lpi2c_imx_read_rxfifo(lpi2c_imx);
+13
-5
drivers/i2c/busses/i2c-mxs.c
+13
-5
drivers/i2c/busses/i2c-mxs.c
···
171
171
}
172
172
173
173
static int mxs_i2c_dma_setup_xfer(struct i2c_adapter *adap,
174
-
struct i2c_msg *msg, uint32_t flags)
174
+
struct i2c_msg *msg, u8 *buf, uint32_t flags)
175
175
{
176
176
struct dma_async_tx_descriptor *desc;
177
177
struct mxs_i2c_dev *i2c = i2c_get_adapdata(adap);
···
226
226
}
227
227
228
228
/* Queue the DMA data transfer. */
229
-
sg_init_one(&i2c->sg_io[1], msg->buf, msg->len);
229
+
sg_init_one(&i2c->sg_io[1], buf, msg->len);
230
230
dma_map_sg(i2c->dev, &i2c->sg_io[1], 1, DMA_FROM_DEVICE);
231
231
desc = dmaengine_prep_slave_sg(i2c->dmach, &i2c->sg_io[1], 1,
232
232
DMA_DEV_TO_MEM,
···
259
259
/* Queue the DMA data transfer. */
260
260
sg_init_table(i2c->sg_io, 2);
261
261
sg_set_buf(&i2c->sg_io[0], &i2c->addr_data, 1);
262
-
sg_set_buf(&i2c->sg_io[1], msg->buf, msg->len);
262
+
sg_set_buf(&i2c->sg_io[1], buf, msg->len);
263
263
dma_map_sg(i2c->dev, i2c->sg_io, 2, DMA_TO_DEVICE);
264
264
desc = dmaengine_prep_slave_sg(i2c->dmach, i2c->sg_io, 2,
265
265
DMA_MEM_TO_DEV,
···
563
563
struct mxs_i2c_dev *i2c = i2c_get_adapdata(adap);
564
564
int ret;
565
565
int flags;
566
+
u8 *dma_buf;
566
567
int use_pio = 0;
567
568
unsigned long time_left;
568
569
···
589
588
if (ret && (ret != -ENXIO))
590
589
mxs_i2c_reset(i2c);
591
590
} else {
591
+
dma_buf = i2c_get_dma_safe_msg_buf(msg, 1);
592
+
if (!dma_buf)
593
+
return -ENOMEM;
594
+
592
595
reinit_completion(&i2c->cmd_complete);
593
-
ret = mxs_i2c_dma_setup_xfer(adap, msg, flags);
594
-
if (ret)
596
+
ret = mxs_i2c_dma_setup_xfer(adap, msg, dma_buf, flags);
597
+
if (ret) {
598
+
i2c_put_dma_safe_msg_buf(dma_buf, msg, false);
595
599
return ret;
600
+
}
596
601
597
602
time_left = wait_for_completion_timeout(&i2c->cmd_complete,
598
603
msecs_to_jiffies(1000));
604
+
i2c_put_dma_safe_msg_buf(dma_buf, msg, true);
599
605
if (!time_left)
600
606
goto timeout;
601
607
+3
drivers/i2c/busses/i2c-xgene-slimpro.c
+3
drivers/i2c/busses/i2c-xgene-slimpro.c
+10
-6
drivers/md/dm-crypt.c
+10
-6
drivers/md/dm-crypt.c
···
72
72
struct crypt_config *cc;
73
73
struct bio *base_bio;
74
74
u8 *integrity_metadata;
75
-
bool integrity_metadata_from_pool;
75
+
bool integrity_metadata_from_pool:1;
76
+
bool in_tasklet:1;
77
+
76
78
struct work_struct work;
77
79
struct tasklet_struct tasklet;
78
80
···
1732
1730
io->ctx.r.req = NULL;
1733
1731
io->integrity_metadata = NULL;
1734
1732
io->integrity_metadata_from_pool = false;
1733
+
io->in_tasklet = false;
1735
1734
atomic_set(&io->io_pending, 0);
1736
1735
}
1737
1736
···
1779
1776
* our tasklet. In this case we need to delay bio_endio()
1780
1777
* execution to after the tasklet is done and dequeued.
1781
1778
*/
1782
-
if (tasklet_trylock(&io->tasklet)) {
1783
-
tasklet_unlock(&io->tasklet);
1784
-
bio_endio(base_bio);
1779
+
if (io->in_tasklet) {
1780
+
INIT_WORK(&io->work, kcryptd_io_bio_endio);
1781
+
queue_work(cc->io_queue, &io->work);
1785
1782
return;
1786
1783
}
1787
1784
1788
-
INIT_WORK(&io->work, kcryptd_io_bio_endio);
1789
-
queue_work(cc->io_queue, &io->work);
1785
+
bio_endio(base_bio);
1790
1786
}
1791
1787
1792
1788
/*
···
1938
1936
io = crypt_io_from_node(rb_first(&write_tree));
1939
1937
rb_erase(&io->rb_node, &write_tree);
1940
1938
kcryptd_io_write(io);
1939
+
cond_resched();
1941
1940
} while (!RB_EMPTY_ROOT(&write_tree));
1942
1941
blk_finish_plug(&plug);
1943
1942
}
···
2233
2230
* it is being executed with irqs disabled.
2234
2231
*/
2235
2232
if (in_hardirq() || irqs_disabled()) {
2233
+
io->in_tasklet = true;
2236
2234
tasklet_init(&io->tasklet, kcryptd_crypt_tasklet, (unsigned long)&io->work);
2237
2235
tasklet_schedule(&io->tasklet);
2238
2236
return;
+6
-1
drivers/md/dm-stats.c
+6
-1
drivers/md/dm-stats.c
···
188
188
atomic_read(&shared->in_flight[WRITE]);
189
189
}
190
190
191
-
void dm_stats_init(struct dm_stats *stats)
191
+
int dm_stats_init(struct dm_stats *stats)
192
192
{
193
193
int cpu;
194
194
struct dm_stats_last_position *last;
···
197
197
INIT_LIST_HEAD(&stats->list);
198
198
stats->precise_timestamps = false;
199
199
stats->last = alloc_percpu(struct dm_stats_last_position);
200
+
if (!stats->last)
201
+
return -ENOMEM;
202
+
200
203
for_each_possible_cpu(cpu) {
201
204
last = per_cpu_ptr(stats->last, cpu);
202
205
last->last_sector = (sector_t)ULLONG_MAX;
203
206
last->last_rw = UINT_MAX;
204
207
}
208
+
209
+
return 0;
205
210
}
206
211
207
212
void dm_stats_cleanup(struct dm_stats *stats)
+1
-1
drivers/md/dm-stats.h
+1
-1
drivers/md/dm-stats.h
+2
drivers/md/dm-thin.c
+2
drivers/md/dm-thin.c
···
3369
3369
pt->low_water_blocks = low_water_blocks;
3370
3370
pt->adjusted_pf = pt->requested_pf = pf;
3371
3371
ti->num_flush_bios = 1;
3372
+
ti->limit_swap_bios = true;
3372
3373
3373
3374
/*
3374
3375
* Only need to enable discards if the pool should pass
···
4250
4249
goto bad;
4251
4250
4252
4251
ti->num_flush_bios = 1;
4252
+
ti->limit_swap_bios = true;
4253
4253
ti->flush_supported = true;
4254
4254
ti->accounts_remapped_io = true;
4255
4255
ti->per_io_data_size = sizeof(struct dm_thin_endio_hook);
+9
-4
drivers/md/dm.c
+9
-4
drivers/md/dm.c
···
1467
1467
}
1468
1468
1469
1469
static void alloc_multiple_bios(struct bio_list *blist, struct clone_info *ci,
1470
-
struct dm_target *ti, unsigned int num_bios)
1470
+
struct dm_target *ti, unsigned int num_bios,
1471
+
unsigned *len)
1471
1472
{
1472
1473
struct bio *bio;
1473
1474
int try;
···
1479
1478
if (try)
1480
1479
mutex_lock(&ci->io->md->table_devices_lock);
1481
1480
for (bio_nr = 0; bio_nr < num_bios; bio_nr++) {
1482
-
bio = alloc_tio(ci, ti, bio_nr, NULL,
1481
+
bio = alloc_tio(ci, ti, bio_nr, len,
1483
1482
try ? GFP_NOIO : GFP_NOWAIT);
1484
1483
if (!bio)
1485
1484
break;
···
1514
1513
ret = 1;
1515
1514
break;
1516
1515
default:
1516
+
if (len)
1517
+
setup_split_accounting(ci, *len);
1517
1518
/* dm_accept_partial_bio() is not supported with shared tio->len_ptr */
1518
-
alloc_multiple_bios(&blist, ci, ti, num_bios);
1519
+
alloc_multiple_bios(&blist, ci, ti, num_bios, len);
1519
1520
while ((clone = bio_list_pop(&blist))) {
1520
1521
dm_tio_set_flag(clone_to_tio(clone), DM_TIO_IS_DUPLICATE_BIO);
1521
1522
__map_bio(clone);
···
2100
2097
if (!md->pending_io)
2101
2098
goto bad;
2102
2099
2103
-
dm_stats_init(&md->stats);
2100
+
r = dm_stats_init(&md->stats);
2101
+
if (r < 0)
2102
+
goto bad;
2104
2103
2105
2104
/* Populate the mapping, nobody knows we exist yet */
2106
2105
spin_lock(&_minor_lock);
+1
drivers/mtd/nand/ecc-mxic.c
+1
drivers/mtd/nand/ecc-mxic.c
+8
-2
drivers/mtd/nand/raw/meson_nand.c
+8
-2
drivers/mtd/nand/raw/meson_nand.c
···
176
176
177
177
dma_addr_t daddr;
178
178
dma_addr_t iaddr;
179
+
u32 info_bytes;
179
180
180
181
unsigned long assigned_cs;
181
182
};
···
504
503
nfc->daddr, datalen, dir);
505
504
return ret;
506
505
}
506
+
nfc->info_bytes = infolen;
507
507
cmd = GENCMDIADDRL(NFC_CMD_AIL, nfc->iaddr);
508
508
writel(cmd, nfc->reg_base + NFC_REG_CMD);
509
509
···
522
520
struct meson_nfc *nfc = nand_get_controller_data(nand);
523
521
524
522
dma_unmap_single(nfc->dev, nfc->daddr, datalen, dir);
525
-
if (infolen)
523
+
if (infolen) {
526
524
dma_unmap_single(nfc->dev, nfc->iaddr, infolen, dir);
525
+
nfc->info_bytes = 0;
526
+
}
527
527
}
528
528
529
529
static int meson_nfc_read_buf(struct nand_chip *nand, u8 *buf, int len)
···
714
710
usleep_range(10, 15);
715
711
/* info is updated by nfc dma engine*/
716
712
smp_rmb();
713
+
dma_sync_single_for_cpu(nfc->dev, nfc->iaddr, nfc->info_bytes,
714
+
DMA_FROM_DEVICE);
717
715
ret = *info & ECC_COMPLETE;
718
716
} while (!ret);
719
717
}
···
997
991
998
992
static int meson_nfc_clk_init(struct meson_nfc *nfc)
999
993
{
1000
-
struct clk_parent_data nfc_divider_parent_data[1];
994
+
struct clk_parent_data nfc_divider_parent_data[1] = {0};
1001
995
struct clk_init_data init = {0};
1002
996
int ret;
1003
997
+16
-1
drivers/mtd/nand/raw/nandsim.c
+16
-1
drivers/mtd/nand/raw/nandsim.c
···
2160
2160
const struct nand_op_instr *instr = NULL;
2161
2161
struct nandsim *ns = nand_get_controller_data(chip);
2162
2162
2163
-
if (check_only)
2163
+
if (check_only) {
2164
+
/* The current implementation of nandsim needs to know the
2165
+
* ongoing operation when performing the address cycles. This
2166
+
* means it cannot make the difference between a regular read
2167
+
* and a continuous read. Hence, this hack to manually refuse
2168
+
* supporting sequential cached operations.
2169
+
*/
2170
+
for (op_id = 0; op_id < op->ninstrs; op_id++) {
2171
+
instr = &op->instrs[op_id];
2172
+
if (instr->type == NAND_OP_CMD_INSTR &&
2173
+
(instr->ctx.cmd.opcode == NAND_CMD_READCACHEEND ||
2174
+
instr->ctx.cmd.opcode == NAND_CMD_READCACHESEQ))
2175
+
return -EOPNOTSUPP;
2176
+
}
2177
+
2164
2178
return 0;
2179
+
}
2165
2180
2166
2181
ns->lines.ce = 1;
2167
2182
+14
drivers/net/dsa/b53/b53_mmap.c
+14
drivers/net/dsa/b53/b53_mmap.c
···
216
216
return 0;
217
217
}
218
218
219
+
static int b53_mmap_phy_read16(struct b53_device *dev, int addr, int reg,
220
+
u16 *value)
221
+
{
222
+
return -EIO;
223
+
}
224
+
225
+
static int b53_mmap_phy_write16(struct b53_device *dev, int addr, int reg,
226
+
u16 value)
227
+
{
228
+
return -EIO;
229
+
}
230
+
219
231
static const struct b53_io_ops b53_mmap_ops = {
220
232
.read8 = b53_mmap_read8,
221
233
.read16 = b53_mmap_read16,
···
239
227
.write32 = b53_mmap_write32,
240
228
.write48 = b53_mmap_write48,
241
229
.write64 = b53_mmap_write64,
230
+
.phy_read16 = b53_mmap_phy_read16,
231
+
.phy_write16 = b53_mmap_phy_write16,
242
232
};
243
233
244
234
static int b53_mmap_probe_of(struct platform_device *pdev,
+5
-6
drivers/net/dsa/microchip/ksz8795.c
+5
-6
drivers/net/dsa/microchip/ksz8795.c
···
958
958
u16 entries = 0;
959
959
u8 timestamp = 0;
960
960
u8 fid;
961
-
u8 member;
962
-
struct alu_struct alu;
961
+
u8 src_port;
962
+
u8 mac[ETH_ALEN];
963
963
964
964
do {
965
-
alu.is_static = false;
966
-
ret = ksz8_r_dyn_mac_table(dev, i, alu.mac, &fid, &member,
965
+
ret = ksz8_r_dyn_mac_table(dev, i, mac, &fid, &src_port,
967
966
×tamp, &entries);
968
-
if (!ret && (member & BIT(port))) {
969
-
ret = cb(alu.mac, alu.fid, alu.is_static, data);
967
+
if (!ret && port == src_port) {
968
+
ret = cb(mac, fid, false, data);
970
969
if (ret)
971
970
break;
972
971
}
-9
drivers/net/dsa/microchip/ksz8863_smi.c
-9
drivers/net/dsa/microchip/ksz8863_smi.c
···
82
82
{
83
83
.read = ksz8863_mdio_read,
84
84
.write = ksz8863_mdio_write,
85
-
.max_raw_read = 1,
86
-
.max_raw_write = 1,
87
85
},
88
86
{
89
87
.read = ksz8863_mdio_read,
90
88
.write = ksz8863_mdio_write,
91
89
.val_format_endian_default = REGMAP_ENDIAN_BIG,
92
-
.max_raw_read = 2,
93
-
.max_raw_write = 2,
94
90
},
95
91
{
96
92
.read = ksz8863_mdio_read,
97
93
.write = ksz8863_mdio_write,
98
94
.val_format_endian_default = REGMAP_ENDIAN_BIG,
99
-
.max_raw_read = 4,
100
-
.max_raw_write = 4,
101
95
}
102
96
};
103
97
···
102
108
.pad_bits = 24,
103
109
.val_bits = 8,
104
110
.cache_type = REGCACHE_NONE,
105
-
.use_single_read = 1,
106
111
.lock = ksz_regmap_lock,
107
112
.unlock = ksz_regmap_unlock,
108
113
},
···
111
118
.pad_bits = 24,
112
119
.val_bits = 16,
113
120
.cache_type = REGCACHE_NONE,
114
-
.use_single_read = 1,
115
121
.lock = ksz_regmap_lock,
116
122
.unlock = ksz_regmap_unlock,
117
123
},
···
120
128
.pad_bits = 24,
121
129
.val_bits = 32,
122
130
.cache_type = REGCACHE_NONE,
123
-
.use_single_read = 1,
124
131
.lock = ksz_regmap_lock,
125
132
.unlock = ksz_regmap_unlock,
126
133
}
+6
-6
drivers/net/dsa/microchip/ksz_common.c
+6
-6
drivers/net/dsa/microchip/ksz_common.c
···
400
400
[VLAN_TABLE_VALID] = BIT(19),
401
401
[STATIC_MAC_TABLE_VALID] = BIT(19),
402
402
[STATIC_MAC_TABLE_USE_FID] = BIT(21),
403
-
[STATIC_MAC_TABLE_FID] = GENMASK(29, 26),
403
+
[STATIC_MAC_TABLE_FID] = GENMASK(25, 22),
404
404
[STATIC_MAC_TABLE_OVERRIDE] = BIT(20),
405
405
[STATIC_MAC_TABLE_FWD_PORTS] = GENMASK(18, 16),
406
-
[DYNAMIC_MAC_TABLE_ENTRIES_H] = GENMASK(5, 0),
407
-
[DYNAMIC_MAC_TABLE_MAC_EMPTY] = BIT(7),
406
+
[DYNAMIC_MAC_TABLE_ENTRIES_H] = GENMASK(1, 0),
407
+
[DYNAMIC_MAC_TABLE_MAC_EMPTY] = BIT(2),
408
408
[DYNAMIC_MAC_TABLE_NOT_READY] = BIT(7),
409
-
[DYNAMIC_MAC_TABLE_ENTRIES] = GENMASK(31, 28),
409
+
[DYNAMIC_MAC_TABLE_ENTRIES] = GENMASK(31, 24),
410
410
[DYNAMIC_MAC_TABLE_FID] = GENMASK(19, 16),
411
411
[DYNAMIC_MAC_TABLE_SRC_PORT] = GENMASK(21, 20),
412
412
[DYNAMIC_MAC_TABLE_TIMESTAMP] = GENMASK(23, 22),
···
416
416
[VLAN_TABLE_MEMBERSHIP_S] = 16,
417
417
[STATIC_MAC_FWD_PORTS] = 16,
418
418
[STATIC_MAC_FID] = 22,
419
-
[DYNAMIC_MAC_ENTRIES_H] = 3,
419
+
[DYNAMIC_MAC_ENTRIES_H] = 8,
420
420
[DYNAMIC_MAC_ENTRIES] = 24,
421
421
[DYNAMIC_MAC_FID] = 16,
422
-
[DYNAMIC_MAC_TIMESTAMP] = 24,
422
+
[DYNAMIC_MAC_TIMESTAMP] = 22,
423
423
[DYNAMIC_MAC_SRC_PORT] = 20,
424
424
};
425
425
+7
-2
drivers/net/dsa/mv88e6xxx/chip.c
+7
-2
drivers/net/dsa/mv88e6xxx/chip.c
···
3354
3354
* If this is the upstream port for this switch, enable
3355
3355
* forwarding of unknown unicasts and multicasts.
3356
3356
*/
3357
-
reg = MV88E6XXX_PORT_CTL0_IGMP_MLD_SNOOP |
3358
-
MV88E6185_PORT_CTL0_USE_TAG | MV88E6185_PORT_CTL0_USE_IP |
3357
+
reg = MV88E6185_PORT_CTL0_USE_TAG | MV88E6185_PORT_CTL0_USE_IP |
3359
3358
MV88E6XXX_PORT_CTL0_STATE_FORWARDING;
3359
+
/* Forward any IPv4 IGMP or IPv6 MLD frames received
3360
+
* by a USER port to the CPU port to allow snooping.
3361
+
*/
3362
+
if (dsa_is_user_port(ds, port))
3363
+
reg |= MV88E6XXX_PORT_CTL0_IGMP_MLD_SNOOP;
3364
+
3360
3365
err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);
3361
3366
if (err)
3362
3367
return err;
+4
-1
drivers/net/dsa/realtek/realtek-mdio.c
+4
-1
drivers/net/dsa/realtek/realtek-mdio.c
···
21
21
22
22
#include <linux/module.h>
23
23
#include <linux/of_device.h>
24
+
#include <linux/overflow.h>
24
25
#include <linux/regmap.h>
25
26
26
27
#include "realtek.h"
···
153
152
if (!var)
154
153
return -EINVAL;
155
154
156
-
priv = devm_kzalloc(&mdiodev->dev, sizeof(*priv), GFP_KERNEL);
155
+
priv = devm_kzalloc(&mdiodev->dev,
156
+
size_add(sizeof(*priv), var->chip_data_sz),
157
+
GFP_KERNEL);
157
158
if (!priv)
158
159
return -ENOMEM;
159
160
+14
-2
drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
+14
-2
drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
···
672
672
return 0;
673
673
}
674
674
675
+
static struct sk_buff *
676
+
bnx2x_build_skb(const struct bnx2x_fastpath *fp, void *data)
677
+
{
678
+
struct sk_buff *skb;
679
+
680
+
if (fp->rx_frag_size)
681
+
skb = build_skb(data, fp->rx_frag_size);
682
+
else
683
+
skb = slab_build_skb(data);
684
+
return skb;
685
+
}
686
+
675
687
static void bnx2x_frag_free(const struct bnx2x_fastpath *fp, void *data)
676
688
{
677
689
if (fp->rx_frag_size)
···
791
779
dma_unmap_single(&bp->pdev->dev, dma_unmap_addr(rx_buf, mapping),
792
780
fp->rx_buf_size, DMA_FROM_DEVICE);
793
781
if (likely(new_data))
794
-
skb = build_skb(data, fp->rx_frag_size);
782
+
skb = bnx2x_build_skb(fp, data);
795
783
796
784
if (likely(skb)) {
797
785
#ifdef BNX2X_STOP_ON_ERROR
···
1058
1046
dma_unmap_addr(rx_buf, mapping),
1059
1047
fp->rx_buf_size,
1060
1048
DMA_FROM_DEVICE);
1061
-
skb = build_skb(data, fp->rx_frag_size);
1049
+
skb = bnx2x_build_skb(fp, data);
1062
1050
if (unlikely(!skb)) {
1063
1051
bnx2x_frag_free(fp, data);
1064
1052
bnx2x_fp_qstats(bp, fp)->
+4
-4
drivers/net/ethernet/broadcom/bnxt/bnxt.c
+4
-4
drivers/net/ethernet/broadcom/bnxt/bnxt.c
···
174
174
{ PCI_VDEVICE(BROADCOM, 0x1750), .driver_data = BCM57508 },
175
175
{ PCI_VDEVICE(BROADCOM, 0x1751), .driver_data = BCM57504 },
176
176
{ PCI_VDEVICE(BROADCOM, 0x1752), .driver_data = BCM57502 },
177
-
{ PCI_VDEVICE(BROADCOM, 0x1800), .driver_data = BCM57508_NPAR },
177
+
{ PCI_VDEVICE(BROADCOM, 0x1800), .driver_data = BCM57502_NPAR },
178
178
{ PCI_VDEVICE(BROADCOM, 0x1801), .driver_data = BCM57504_NPAR },
179
-
{ PCI_VDEVICE(BROADCOM, 0x1802), .driver_data = BCM57502_NPAR },
180
-
{ PCI_VDEVICE(BROADCOM, 0x1803), .driver_data = BCM57508_NPAR },
179
+
{ PCI_VDEVICE(BROADCOM, 0x1802), .driver_data = BCM57508_NPAR },
180
+
{ PCI_VDEVICE(BROADCOM, 0x1803), .driver_data = BCM57502_NPAR },
181
181
{ PCI_VDEVICE(BROADCOM, 0x1804), .driver_data = BCM57504_NPAR },
182
-
{ PCI_VDEVICE(BROADCOM, 0x1805), .driver_data = BCM57502_NPAR },
182
+
{ PCI_VDEVICE(BROADCOM, 0x1805), .driver_data = BCM57508_NPAR },
183
183
{ PCI_VDEVICE(BROADCOM, 0xd802), .driver_data = BCM58802 },
184
184
{ PCI_VDEVICE(BROADCOM, 0xd804), .driver_data = BCM58804 },
185
185
#ifdef CONFIG_BNXT_SRIOV
+1
drivers/net/ethernet/broadcom/bnxt/bnxt.h
+1
drivers/net/ethernet/broadcom/bnxt/bnxt.h
···
1226
1226
#define BNXT_LINK_SPEED_40GB PORT_PHY_QCFG_RESP_LINK_SPEED_40GB
1227
1227
#define BNXT_LINK_SPEED_50GB PORT_PHY_QCFG_RESP_LINK_SPEED_50GB
1228
1228
#define BNXT_LINK_SPEED_100GB PORT_PHY_QCFG_RESP_LINK_SPEED_100GB
1229
+
#define BNXT_LINK_SPEED_200GB PORT_PHY_QCFG_RESP_LINK_SPEED_200GB
1229
1230
u16 support_speeds;
1230
1231
u16 support_pam4_speeds;
1231
1232
u16 auto_link_speeds; /* fw adv setting */
+3
drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c
+3
drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c
···
1714
1714
return SPEED_50000;
1715
1715
case BNXT_LINK_SPEED_100GB:
1716
1716
return SPEED_100000;
1717
+
case BNXT_LINK_SPEED_200GB:
1718
+
return SPEED_200000;
1717
1719
default:
1718
1720
return SPEED_UNKNOWN;
1719
1721
}
···
3740
3738
bnxt_ulp_stop(bp);
3741
3739
rc = bnxt_close_nic(bp, true, false);
3742
3740
if (rc) {
3741
+
etest->flags |= ETH_TEST_FL_FAILED;
3743
3742
bnxt_ulp_start(bp, rc);
3744
3743
return;
3745
3744
}
+6
-5
drivers/net/ethernet/intel/i40e/i40e_diag.c
+6
-5
drivers/net/ethernet/intel/i40e/i40e_diag.c
···
44
44
return 0;
45
45
}
46
46
47
-
struct i40e_diag_reg_test_info i40e_reg_list[] = {
47
+
const struct i40e_diag_reg_test_info i40e_reg_list[] = {
48
48
/* offset mask elements stride */
49
49
{I40E_QTX_CTL(0), 0x0000FFBF, 1,
50
50
I40E_QTX_CTL(1) - I40E_QTX_CTL(0)},
···
78
78
{
79
79
int ret_code = 0;
80
80
u32 reg, mask;
81
+
u32 elements;
81
82
u32 i, j;
82
83
83
84
for (i = 0; i40e_reg_list[i].offset != 0 &&
84
85
!ret_code; i++) {
85
86
87
+
elements = i40e_reg_list[i].elements;
86
88
/* set actual reg range for dynamically allocated resources */
87
89
if (i40e_reg_list[i].offset == I40E_QTX_CTL(0) &&
88
90
hw->func_caps.num_tx_qp != 0)
89
-
i40e_reg_list[i].elements = hw->func_caps.num_tx_qp;
91
+
elements = hw->func_caps.num_tx_qp;
90
92
if ((i40e_reg_list[i].offset == I40E_PFINT_ITRN(0, 0) ||
91
93
i40e_reg_list[i].offset == I40E_PFINT_ITRN(1, 0) ||
92
94
i40e_reg_list[i].offset == I40E_PFINT_ITRN(2, 0) ||
93
95
i40e_reg_list[i].offset == I40E_QINT_TQCTL(0) ||
94
96
i40e_reg_list[i].offset == I40E_QINT_RQCTL(0)) &&
95
97
hw->func_caps.num_msix_vectors != 0)
96
-
i40e_reg_list[i].elements =
97
-
hw->func_caps.num_msix_vectors - 1;
98
+
elements = hw->func_caps.num_msix_vectors - 1;
98
99
99
100
/* test register access */
100
101
mask = i40e_reg_list[i].mask;
101
-
for (j = 0; j < i40e_reg_list[i].elements && !ret_code; j++) {
102
+
for (j = 0; j < elements && !ret_code; j++) {
102
103
reg = i40e_reg_list[i].offset +
103
104
(j * i40e_reg_list[i].stride);
104
105
ret_code = i40e_diag_reg_pattern_test(hw, reg, mask);
+1
-1
drivers/net/ethernet/intel/i40e/i40e_diag.h
+1
-1
drivers/net/ethernet/intel/i40e/i40e_diag.h
···
20
20
u32 stride; /* bytes between each element */
21
21
};
22
22
23
-
extern struct i40e_diag_reg_test_info i40e_reg_list[];
23
+
extern const struct i40e_diag_reg_test_info i40e_reg_list[];
24
24
25
25
int i40e_diag_reg_test(struct i40e_hw *hw);
26
26
int i40e_diag_eeprom_test(struct i40e_hw *hw);
+5
-3
drivers/net/ethernet/intel/ice/ice_sched.c
+5
-3
drivers/net/ethernet/intel/ice/ice_sched.c
···
2788
2788
ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
2789
2789
u16 vsi_handle, unsigned long *tc_bitmap)
2790
2790
{
2791
-
struct ice_sched_agg_vsi_info *agg_vsi_info, *old_agg_vsi_info = NULL;
2791
+
struct ice_sched_agg_vsi_info *agg_vsi_info, *iter, *old_agg_vsi_info = NULL;
2792
2792
struct ice_sched_agg_info *agg_info, *old_agg_info;
2793
2793
struct ice_hw *hw = pi->hw;
2794
2794
int status = 0;
···
2806
2806
if (old_agg_info && old_agg_info != agg_info) {
2807
2807
struct ice_sched_agg_vsi_info *vtmp;
2808
2808
2809
-
list_for_each_entry_safe(old_agg_vsi_info, vtmp,
2809
+
list_for_each_entry_safe(iter, vtmp,
2810
2810
&old_agg_info->agg_vsi_list,
2811
2811
list_entry)
2812
-
if (old_agg_vsi_info->vsi_handle == vsi_handle)
2812
+
if (iter->vsi_handle == vsi_handle) {
2813
+
old_agg_vsi_info = iter;
2813
2814
break;
2815
+
}
2814
2816
}
2815
2817
2816
2818
/* check if entry already exist */
+22
-4
drivers/net/ethernet/intel/ice/ice_switch.c
+22
-4
drivers/net/ethernet/intel/ice/ice_switch.c
···
1780
1780
int
1781
1781
ice_cfg_rdma_fltr(struct ice_hw *hw, u16 vsi_handle, bool enable)
1782
1782
{
1783
-
struct ice_vsi_ctx *ctx;
1783
+
struct ice_vsi_ctx *ctx, *cached_ctx;
1784
+
int status;
1784
1785
1785
-
ctx = ice_get_vsi_ctx(hw, vsi_handle);
1786
+
cached_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1787
+
if (!cached_ctx)
1788
+
return -ENOENT;
1789
+
1790
+
ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1786
1791
if (!ctx)
1787
-
return -EIO;
1792
+
return -ENOMEM;
1793
+
1794
+
ctx->info.q_opt_rss = cached_ctx->info.q_opt_rss;
1795
+
ctx->info.q_opt_tc = cached_ctx->info.q_opt_tc;
1796
+
ctx->info.q_opt_flags = cached_ctx->info.q_opt_flags;
1797
+
1798
+
ctx->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_Q_OPT_VALID);
1788
1799
1789
1800
if (enable)
1790
1801
ctx->info.q_opt_flags |= ICE_AQ_VSI_Q_OPT_PE_FLTR_EN;
1791
1802
else
1792
1803
ctx->info.q_opt_flags &= ~ICE_AQ_VSI_Q_OPT_PE_FLTR_EN;
1793
1804
1794
-
return ice_update_vsi(hw, vsi_handle, ctx, NULL);
1805
+
status = ice_update_vsi(hw, vsi_handle, ctx, NULL);
1806
+
if (!status) {
1807
+
cached_ctx->info.q_opt_flags = ctx->info.q_opt_flags;
1808
+
cached_ctx->info.valid_sections |= ctx->info.valid_sections;
1809
+
}
1810
+
1811
+
kfree(ctx);
1812
+
return status;
1795
1813
}
1796
1814
1797
1815
/**
+1
-1
drivers/net/ethernet/intel/ice/ice_txrx.c
+1
-1
drivers/net/ethernet/intel/ice/ice_txrx.c
···
938
938
* ice_get_rx_buf - Fetch Rx buffer and synchronize data for use
939
939
* @rx_ring: Rx descriptor ring to transact packets on
940
940
* @size: size of buffer to add to skb
941
+
* @ntc: index of next to clean element
941
942
*
942
943
* This function will pull an Rx buffer from the ring and synchronize it
943
944
* for use by the CPU.
···
1027
1026
/**
1028
1027
* ice_construct_skb - Allocate skb and populate it
1029
1028
* @rx_ring: Rx descriptor ring to transact packets on
1030
-
* @rx_buf: Rx buffer to pull data from
1031
1029
* @xdp: xdp_buff pointing to the data
1032
1030
*
1033
1031
* This function allocates an skb. It then populates it with the page
+1
drivers/net/ethernet/intel/ice/ice_txrx_lib.c
+1
drivers/net/ethernet/intel/ice/ice_txrx_lib.c
···
438
438
* ice_finalize_xdp_rx - Bump XDP Tx tail and/or flush redirect map
439
439
* @xdp_ring: XDP ring
440
440
* @xdp_res: Result of the receive batch
441
+
* @first_idx: index to write from caller
441
442
*
442
443
* This function bumps XDP Tx tail and/or flush redirect map, and
443
444
* should be called when a batch of packets has been processed in the
+73
drivers/net/ethernet/intel/ice/ice_virtchnl_fdir.c
+73
drivers/net/ethernet/intel/ice/ice_virtchnl_fdir.c
···
542
542
}
543
543
544
544
/**
545
+
* ice_vc_fdir_has_prof_conflict
546
+
* @vf: pointer to the VF structure
547
+
* @conf: FDIR configuration for each filter
548
+
*
549
+
* Check if @conf has conflicting profile with existing profiles
550
+
*
551
+
* Return: true on success, and false on error.
552
+
*/
553
+
static bool
554
+
ice_vc_fdir_has_prof_conflict(struct ice_vf *vf,
555
+
struct virtchnl_fdir_fltr_conf *conf)
556
+
{
557
+
struct ice_fdir_fltr *desc;
558
+
559
+
list_for_each_entry(desc, &vf->fdir.fdir_rule_list, fltr_node) {
560
+
struct virtchnl_fdir_fltr_conf *existing_conf;
561
+
enum ice_fltr_ptype flow_type_a, flow_type_b;
562
+
struct ice_fdir_fltr *a, *b;
563
+
564
+
existing_conf = to_fltr_conf_from_desc(desc);
565
+
a = &existing_conf->input;
566
+
b = &conf->input;
567
+
flow_type_a = a->flow_type;
568
+
flow_type_b = b->flow_type;
569
+
570
+
/* No need to compare two rules with different tunnel types or
571
+
* with the same protocol type.
572
+
*/
573
+
if (existing_conf->ttype != conf->ttype ||
574
+
flow_type_a == flow_type_b)
575
+
continue;
576
+
577
+
switch (flow_type_a) {
578
+
case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
579
+
case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
580
+
case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
581
+
if (flow_type_b == ICE_FLTR_PTYPE_NONF_IPV4_OTHER)
582
+
return true;
583
+
break;
584
+
case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
585
+
if (flow_type_b == ICE_FLTR_PTYPE_NONF_IPV4_UDP ||
586
+
flow_type_b == ICE_FLTR_PTYPE_NONF_IPV4_TCP ||
587
+
flow_type_b == ICE_FLTR_PTYPE_NONF_IPV4_SCTP)
588
+
return true;
589
+
break;
590
+
case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
591
+
case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
592
+
case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
593
+
if (flow_type_b == ICE_FLTR_PTYPE_NONF_IPV6_OTHER)
594
+
return true;
595
+
break;
596
+
case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
597
+
if (flow_type_b == ICE_FLTR_PTYPE_NONF_IPV6_UDP ||
598
+
flow_type_b == ICE_FLTR_PTYPE_NONF_IPV6_TCP ||
599
+
flow_type_b == ICE_FLTR_PTYPE_NONF_IPV6_SCTP)
600
+
return true;
601
+
break;
602
+
default:
603
+
break;
604
+
}
605
+
}
606
+
607
+
return false;
608
+
}
609
+
610
+
/**
545
611
* ice_vc_fdir_write_flow_prof
546
612
* @vf: pointer to the VF structure
547
613
* @flow: filter flow type
···
742
676
struct ice_flow_seg_info *seg;
743
677
enum ice_fltr_ptype flow;
744
678
int ret;
679
+
680
+
ret = ice_vc_fdir_has_prof_conflict(vf, conf);
681
+
if (ret) {
682
+
dev_dbg(dev, "Found flow profile conflict for VF %d\n",
683
+
vf->vf_id);
684
+
return ret;
685
+
}
745
686
746
687
flow = input->flow_type;
747
688
ret = ice_vc_fdir_alloc_prof(vf, flow);
+2
drivers/net/ethernet/marvell/mvneta.c
+2
drivers/net/ethernet/marvell/mvneta.c
+18
-12
drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c
+18
-12
drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c
···
62
62
MVPP2_DEF_FLOW(MVPP22_FLOW_TCP4, MVPP2_FL_IP4_TCP_FRAG_UNTAG,
63
63
MVPP22_CLS_HEK_IP4_2T,
64
64
MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4 |
65
-
MVPP2_PRS_RI_L4_TCP,
65
+
MVPP2_PRS_RI_IP_FRAG_TRUE | MVPP2_PRS_RI_L4_TCP,
66
66
MVPP2_PRS_IP_MASK | MVPP2_PRS_RI_VLAN_MASK),
67
67
68
68
MVPP2_DEF_FLOW(MVPP22_FLOW_TCP4, MVPP2_FL_IP4_TCP_FRAG_UNTAG,
69
69
MVPP22_CLS_HEK_IP4_2T,
70
70
MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4_OPT |
71
-
MVPP2_PRS_RI_L4_TCP,
71
+
MVPP2_PRS_RI_IP_FRAG_TRUE | MVPP2_PRS_RI_L4_TCP,
72
72
MVPP2_PRS_IP_MASK | MVPP2_PRS_RI_VLAN_MASK),
73
73
74
74
MVPP2_DEF_FLOW(MVPP22_FLOW_TCP4, MVPP2_FL_IP4_TCP_FRAG_UNTAG,
75
75
MVPP22_CLS_HEK_IP4_2T,
76
76
MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4_OTHER |
77
-
MVPP2_PRS_RI_L4_TCP,
77
+
MVPP2_PRS_RI_IP_FRAG_TRUE | MVPP2_PRS_RI_L4_TCP,
78
78
MVPP2_PRS_IP_MASK | MVPP2_PRS_RI_VLAN_MASK),
79
79
80
80
/* TCP over IPv4 flows, fragmented, with vlan tag */
81
81
MVPP2_DEF_FLOW(MVPP22_FLOW_TCP4, MVPP2_FL_IP4_TCP_FRAG_TAG,
82
82
MVPP22_CLS_HEK_IP4_2T | MVPP22_CLS_HEK_TAGGED,
83
-
MVPP2_PRS_RI_L3_IP4 | MVPP2_PRS_RI_L4_TCP,
83
+
MVPP2_PRS_RI_L3_IP4 | MVPP2_PRS_RI_IP_FRAG_TRUE |
84
+
MVPP2_PRS_RI_L4_TCP,
84
85
MVPP2_PRS_IP_MASK),
85
86
86
87
MVPP2_DEF_FLOW(MVPP22_FLOW_TCP4, MVPP2_FL_IP4_TCP_FRAG_TAG,
87
88
MVPP22_CLS_HEK_IP4_2T | MVPP22_CLS_HEK_TAGGED,
88
-
MVPP2_PRS_RI_L3_IP4_OPT | MVPP2_PRS_RI_L4_TCP,
89
+
MVPP2_PRS_RI_L3_IP4_OPT | MVPP2_PRS_RI_IP_FRAG_TRUE |
90
+
MVPP2_PRS_RI_L4_TCP,
89
91
MVPP2_PRS_IP_MASK),
90
92
91
93
MVPP2_DEF_FLOW(MVPP22_FLOW_TCP4, MVPP2_FL_IP4_TCP_FRAG_TAG,
92
94
MVPP22_CLS_HEK_IP4_2T | MVPP22_CLS_HEK_TAGGED,
93
-
MVPP2_PRS_RI_L3_IP4_OTHER | MVPP2_PRS_RI_L4_TCP,
95
+
MVPP2_PRS_RI_L3_IP4_OTHER | MVPP2_PRS_RI_IP_FRAG_TRUE |
96
+
MVPP2_PRS_RI_L4_TCP,
94
97
MVPP2_PRS_IP_MASK),
95
98
96
99
/* UDP over IPv4 flows, Not fragmented, no vlan tag */
···
135
132
MVPP2_DEF_FLOW(MVPP22_FLOW_UDP4, MVPP2_FL_IP4_UDP_FRAG_UNTAG,
136
133
MVPP22_CLS_HEK_IP4_2T,
137
134
MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4 |
138
-
MVPP2_PRS_RI_L4_UDP,
135
+
MVPP2_PRS_RI_IP_FRAG_TRUE | MVPP2_PRS_RI_L4_UDP,
139
136
MVPP2_PRS_IP_MASK | MVPP2_PRS_RI_VLAN_MASK),
140
137
141
138
MVPP2_DEF_FLOW(MVPP22_FLOW_UDP4, MVPP2_FL_IP4_UDP_FRAG_UNTAG,
142
139
MVPP22_CLS_HEK_IP4_2T,
143
140
MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4_OPT |
144
-
MVPP2_PRS_RI_L4_UDP,
141
+
MVPP2_PRS_RI_IP_FRAG_TRUE | MVPP2_PRS_RI_L4_UDP,
145
142
MVPP2_PRS_IP_MASK | MVPP2_PRS_RI_VLAN_MASK),
146
143
147
144
MVPP2_DEF_FLOW(MVPP22_FLOW_UDP4, MVPP2_FL_IP4_UDP_FRAG_UNTAG,
148
145
MVPP22_CLS_HEK_IP4_2T,
149
146
MVPP2_PRS_RI_VLAN_NONE | MVPP2_PRS_RI_L3_IP4_OTHER |
150
-
MVPP2_PRS_RI_L4_UDP,
147
+
MVPP2_PRS_RI_IP_FRAG_TRUE | MVPP2_PRS_RI_L4_UDP,
151
148
MVPP2_PRS_IP_MASK | MVPP2_PRS_RI_VLAN_MASK),
152
149
153
150
/* UDP over IPv4 flows, fragmented, with vlan tag */
154
151
MVPP2_DEF_FLOW(MVPP22_FLOW_UDP4, MVPP2_FL_IP4_UDP_FRAG_TAG,
155
152
MVPP22_CLS_HEK_IP4_2T | MVPP22_CLS_HEK_TAGGED,
156
-
MVPP2_PRS_RI_L3_IP4 | MVPP2_PRS_RI_L4_UDP,
153
+
MVPP2_PRS_RI_L3_IP4 | MVPP2_PRS_RI_IP_FRAG_TRUE |
154
+
MVPP2_PRS_RI_L4_UDP,
157
155
MVPP2_PRS_IP_MASK),
158
156
159
157
MVPP2_DEF_FLOW(MVPP22_FLOW_UDP4, MVPP2_FL_IP4_UDP_FRAG_TAG,
160
158
MVPP22_CLS_HEK_IP4_2T | MVPP22_CLS_HEK_TAGGED,
161
-
MVPP2_PRS_RI_L3_IP4_OPT | MVPP2_PRS_RI_L4_UDP,
159
+
MVPP2_PRS_RI_L3_IP4_OPT | MVPP2_PRS_RI_IP_FRAG_TRUE |
160
+
MVPP2_PRS_RI_L4_UDP,
162
161
MVPP2_PRS_IP_MASK),
163
162
164
163
MVPP2_DEF_FLOW(MVPP22_FLOW_UDP4, MVPP2_FL_IP4_UDP_FRAG_TAG,
165
164
MVPP22_CLS_HEK_IP4_2T | MVPP22_CLS_HEK_TAGGED,
166
-
MVPP2_PRS_RI_L3_IP4_OTHER | MVPP2_PRS_RI_L4_UDP,
165
+
MVPP2_PRS_RI_L3_IP4_OTHER | MVPP2_PRS_RI_IP_FRAG_TRUE |
166
+
MVPP2_PRS_RI_L4_UDP,
167
167
MVPP2_PRS_IP_MASK),
168
168
169
169
/* TCP over IPv6 flows, not fragmented, no vlan tag */
+36
-50
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
+36
-50
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
···
1539
1539
if (!priv->prs_double_vlans)
1540
1540
return -ENOMEM;
1541
1541
1542
-
/* Double VLAN: 0x8100, 0x88A8 */
1543
-
err = mvpp2_prs_double_vlan_add(priv, ETH_P_8021Q, ETH_P_8021AD,
1542
+
/* Double VLAN: 0x88A8, 0x8100 */
1543
+
err = mvpp2_prs_double_vlan_add(priv, ETH_P_8021AD, ETH_P_8021Q,
1544
1544
MVPP2_PRS_PORT_MASK);
1545
1545
if (err)
1546
1546
return err;
···
1607
1607
static int mvpp2_prs_pppoe_init(struct mvpp2 *priv)
1608
1608
{
1609
1609
struct mvpp2_prs_entry pe;
1610
-
int tid;
1610
+
int tid, ihl;
1611
1611
1612
-
/* IPv4 over PPPoE with options */
1613
-
tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID,
1614
-
MVPP2_PE_LAST_FREE_TID);
1615
-
if (tid < 0)
1616
-
return tid;
1612
+
/* IPv4 over PPPoE with header length >= 5 */
1613
+
for (ihl = MVPP2_PRS_IPV4_IHL_MIN; ihl <= MVPP2_PRS_IPV4_IHL_MAX; ihl++) {
1614
+
tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID,
1615
+
MVPP2_PE_LAST_FREE_TID);
1616
+
if (tid < 0)
1617
+
return tid;
1617
1618
1618
-
memset(&pe, 0, sizeof(pe));
1619
-
mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_PPPOE);
1620
-
pe.index = tid;
1619
+
memset(&pe, 0, sizeof(pe));
1620
+
mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_PPPOE);
1621
+
pe.index = tid;
1621
1622
1622
-
mvpp2_prs_match_etype(&pe, 0, PPP_IP);
1623
+
mvpp2_prs_match_etype(&pe, 0, PPP_IP);
1624
+
mvpp2_prs_tcam_data_byte_set(&pe, MVPP2_ETH_TYPE_LEN,
1625
+
MVPP2_PRS_IPV4_HEAD | ihl,
1626
+
MVPP2_PRS_IPV4_HEAD_MASK |
1627
+
MVPP2_PRS_IPV4_IHL_MASK);
1623
1628
1624
-
mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_IP4);
1625
-
mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4_OPT,
1626
-
MVPP2_PRS_RI_L3_PROTO_MASK);
1627
-
/* goto ipv4 dest-address (skip eth_type + IP-header-size - 4) */
1628
-
mvpp2_prs_sram_shift_set(&pe, MVPP2_ETH_TYPE_LEN +
1629
-
sizeof(struct iphdr) - 4,
1630
-
MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD);
1631
-
/* Set L3 offset */
1632
-
mvpp2_prs_sram_offset_set(&pe, MVPP2_PRS_SRAM_UDF_TYPE_L3,
1633
-
MVPP2_ETH_TYPE_LEN,
1634
-
MVPP2_PRS_SRAM_OP_SEL_UDF_ADD);
1629
+
mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_IP4);
1630
+
mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4,
1631
+
MVPP2_PRS_RI_L3_PROTO_MASK);
1632
+
/* goto ipv4 dst-address (skip eth_type + IP-header-size - 4) */
1633
+
mvpp2_prs_sram_shift_set(&pe, MVPP2_ETH_TYPE_LEN +
1634
+
sizeof(struct iphdr) - 4,
1635
+
MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD);
1636
+
/* Set L3 offset */
1637
+
mvpp2_prs_sram_offset_set(&pe, MVPP2_PRS_SRAM_UDF_TYPE_L3,
1638
+
MVPP2_ETH_TYPE_LEN,
1639
+
MVPP2_PRS_SRAM_OP_SEL_UDF_ADD);
1640
+
/* Set L4 offset */
1641
+
mvpp2_prs_sram_offset_set(&pe, MVPP2_PRS_SRAM_UDF_TYPE_L4,
1642
+
MVPP2_ETH_TYPE_LEN + (ihl * 4),
1643
+
MVPP2_PRS_SRAM_OP_SEL_UDF_ADD);
1635
1644
1636
-
/* Update shadow table and hw entry */
1637
-
mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_PPPOE);
1638
-
mvpp2_prs_hw_write(priv, &pe);
1639
-
1640
-
/* IPv4 over PPPoE without options */
1641
-
tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID,
1642
-
MVPP2_PE_LAST_FREE_TID);
1643
-
if (tid < 0)
1644
-
return tid;
1645
-
1646
-
pe.index = tid;
1647
-
1648
-
mvpp2_prs_tcam_data_byte_set(&pe, MVPP2_ETH_TYPE_LEN,
1649
-
MVPP2_PRS_IPV4_HEAD |
1650
-
MVPP2_PRS_IPV4_IHL_MIN,
1651
-
MVPP2_PRS_IPV4_HEAD_MASK |
1652
-
MVPP2_PRS_IPV4_IHL_MASK);
1653
-
1654
-
/* Clear ri before updating */
1655
-
pe.sram[MVPP2_PRS_SRAM_RI_WORD] = 0x0;
1656
-
pe.sram[MVPP2_PRS_SRAM_RI_CTRL_WORD] = 0x0;
1657
-
mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP4,
1658
-
MVPP2_PRS_RI_L3_PROTO_MASK);
1659
-
1660
-
/* Update shadow table and hw entry */
1661
-
mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_PPPOE);
1662
-
mvpp2_prs_hw_write(priv, &pe);
1645
+
/* Update shadow table and hw entry */
1646
+
mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_PPPOE);
1647
+
mvpp2_prs_hw_write(priv, &pe);
1648
+
}
1663
1649
1664
1650
/* IPv6 over PPPoE */
1665
1651
tid = mvpp2_prs_tcam_first_free(priv, MVPP2_PE_FIRST_FREE_TID,
+3
-5
drivers/net/ethernet/mediatek/mtk_eth_soc.c
+3
-5
drivers/net/ethernet/mediatek/mtk_eth_soc.c
···
739
739
break;
740
740
}
741
741
742
-
mtk_set_queue_speed(mac->hw, mac->id, speed);
743
-
744
742
/* Configure duplex */
745
743
if (duplex == DUPLEX_FULL)
746
744
mcr |= MAC_MCR_FORCE_DPX;
···
2054
2056
skb_checksum_none_assert(skb);
2055
2057
skb->protocol = eth_type_trans(skb, netdev);
2056
2058
2057
-
if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED)
2058
-
mtk_ppe_check_skb(eth->ppe[0], skb, hash);
2059
-
2060
2059
if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2061
2060
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
2062
2061
if (trxd.rxd3 & RX_DMA_VTAG_V2) {
···
2080
2085
} else if (has_hwaccel_tag) {
2081
2086
__vlan_hwaccel_put_tag(skb, htons(vlan_proto), vlan_tci);
2082
2087
}
2088
+
2089
+
if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED)
2090
+
mtk_ppe_check_skb(eth->ppe[0], skb, hash);
2083
2091
2084
2092
skb_record_rx_queue(skb, 0);
2085
2093
napi_gro_receive(napi, skb);
+6
-1
drivers/net/ethernet/mediatek/mtk_ppe.c
+6
-1
drivers/net/ethernet/mediatek/mtk_ppe.c
···
8
8
#include <linux/platform_device.h>
9
9
#include <linux/if_ether.h>
10
10
#include <linux/if_vlan.h>
11
+
#include <net/dst_metadata.h>
11
12
#include <net/dsa.h>
12
13
#include "mtk_eth_soc.h"
13
14
#include "mtk_ppe.h"
···
501
500
hwe->ib1 &= ~MTK_FOE_IB1_STATE;
502
501
hwe->ib1 |= FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_INVALID);
503
502
dma_wmb();
503
+
mtk_ppe_cache_clear(ppe);
504
+
504
505
if (ppe->accounting) {
505
506
struct mtk_foe_accounting *acct;
506
507
···
754
751
skb->dev->dsa_ptr->tag_ops->proto != DSA_TAG_PROTO_MTK)
755
752
goto out;
756
753
757
-
tag += 4;
754
+
if (!skb_metadata_dst(skb))
755
+
tag += 4;
756
+
758
757
if (get_unaligned_be16(tag) != ETH_P_8021Q)
759
758
break;
760
759
+2
-1
drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+2
-1
drivers/net/ethernet/mediatek/mtk_ppe_offload.c
···
584
584
if (IS_ERR(block_cb))
585
585
return PTR_ERR(block_cb);
586
586
587
+
flow_block_cb_incref(block_cb);
587
588
flow_block_cb_add(block_cb, f);
588
589
list_add_tail(&block_cb->driver_list, &block_cb_list);
589
590
return 0;
···
593
592
if (!block_cb)
594
593
return -ENOENT;
595
594
596
-
if (flow_block_cb_decref(block_cb)) {
595
+
if (!flow_block_cb_decref(block_cb)) {
597
596
flow_block_cb_remove(block_cb, f);
598
597
list_del(&block_cb->driver_list);
599
598
}
+3
drivers/net/ethernet/realtek/r8169_phy_config.c
+3
drivers/net/ethernet/realtek/r8169_phy_config.c
+27
-13
drivers/net/ethernet/sfc/ef10.c
+27
-13
drivers/net/ethernet/sfc/ef10.c
···
1304
1304
static int efx_ef10_init_nic(struct efx_nic *efx)
1305
1305
{
1306
1306
struct efx_ef10_nic_data *nic_data = efx->nic_data;
1307
-
netdev_features_t hw_enc_features = 0;
1307
+
struct net_device *net_dev = efx->net_dev;
1308
+
netdev_features_t tun_feats, tso_feats;
1308
1309
int rc;
1309
1310
1310
1311
if (nic_data->must_check_datapath_caps) {
···
1350
1349
nic_data->must_restore_piobufs = false;
1351
1350
}
1352
1351
1353
-
/* add encapsulated checksum offload features */
1352
+
/* encap features might change during reset if fw variant changed */
1354
1353
if (efx_has_cap(efx, VXLAN_NVGRE) && !efx_ef10_is_vf(efx))
1355
-
hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1356
-
/* add encapsulated TSO features */
1354
+
net_dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1355
+
else
1356
+
net_dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
1357
+
1358
+
tun_feats = NETIF_F_GSO_UDP_TUNNEL | NETIF_F_GSO_GRE |
1359
+
NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_GSO_GRE_CSUM;
1360
+
tso_feats = NETIF_F_TSO | NETIF_F_TSO6;
1361
+
1357
1362
if (efx_has_cap(efx, TX_TSO_V2_ENCAP)) {
1358
-
netdev_features_t encap_tso_features;
1359
-
1360
-
encap_tso_features = NETIF_F_GSO_UDP_TUNNEL | NETIF_F_GSO_GRE |
1361
-
NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_GSO_GRE_CSUM;
1362
-
1363
-
hw_enc_features |= encap_tso_features | NETIF_F_TSO;
1364
-
efx->net_dev->features |= encap_tso_features;
1363
+
/* If this is first nic_init, or if it is a reset and a new fw
1364
+
* variant has added new features, enable them by default.
1365
+
* If the features are not new, maintain their current value.
1366
+
*/
1367
+
if (!(net_dev->hw_features & tun_feats))
1368
+
net_dev->features |= tun_feats;
1369
+
net_dev->hw_enc_features |= tun_feats | tso_feats;
1370
+
net_dev->hw_features |= tun_feats;
1371
+
} else {
1372
+
net_dev->hw_enc_features &= ~(tun_feats | tso_feats);
1373
+
net_dev->hw_features &= ~tun_feats;
1374
+
net_dev->features &= ~tun_feats;
1365
1375
}
1366
-
efx->net_dev->hw_enc_features = hw_enc_features;
1367
1376
1368
1377
/* don't fail init if RSS setup doesn't work */
1369
1378
rc = efx->type->rx_push_rss_config(efx, false,
···
4032
4021
NETIF_F_HW_VLAN_CTAG_FILTER | \
4033
4022
NETIF_F_IPV6_CSUM | \
4034
4023
NETIF_F_RXHASH | \
4035
-
NETIF_F_NTUPLE)
4024
+
NETIF_F_NTUPLE | \
4025
+
NETIF_F_SG | \
4026
+
NETIF_F_RXCSUM | \
4027
+
NETIF_F_RXALL)
4036
4028
4037
4029
const struct efx_nic_type efx_hunt_a0_vf_nic_type = {
4038
4030
.is_vf = true,
+7
-10
drivers/net/ethernet/sfc/efx.c
+7
-10
drivers/net/ethernet/sfc/efx.c
···
998
998
}
999
999
1000
1000
/* Determine netdevice features */
1001
-
net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
1002
-
NETIF_F_TSO | NETIF_F_RXCSUM | NETIF_F_RXALL);
1003
-
if (efx->type->offload_features & (NETIF_F_IPV6_CSUM | NETIF_F_HW_CSUM)) {
1004
-
net_dev->features |= NETIF_F_TSO6;
1005
-
if (efx_has_cap(efx, TX_TSO_V2_ENCAP))
1006
-
net_dev->hw_enc_features |= NETIF_F_TSO6;
1007
-
}
1008
-
/* Check whether device supports TSO */
1009
-
if (!efx->type->tso_versions || !efx->type->tso_versions(efx))
1010
-
net_dev->features &= ~NETIF_F_ALL_TSO;
1001
+
net_dev->features |= efx->type->offload_features;
1002
+
1003
+
/* Add TSO features */
1004
+
if (efx->type->tso_versions && efx->type->tso_versions(efx))
1005
+
net_dev->features |= NETIF_F_TSO | NETIF_F_TSO6;
1006
+
1011
1007
/* Mask for features that also apply to VLAN devices */
1012
1008
net_dev->vlan_features |= (NETIF_F_HW_CSUM | NETIF_F_SG |
1013
1009
NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
1014
1010
NETIF_F_RXCSUM);
1015
1011
1012
+
/* Determine user configurable features */
1016
1013
net_dev->hw_features |= net_dev->features & ~efx->fixed_features;
1017
1014
1018
1015
/* Disable receiving frames with bad FCS, by default. */
+5
-2
drivers/net/ethernet/smsc/smsc911x.c
+5
-2
drivers/net/ethernet/smsc/smsc911x.c
···
1037
1037
return ret;
1038
1038
}
1039
1039
1040
-
/* Indicate that the MAC is responsible for managing PHY PM */
1041
-
phydev->mac_managed_pm = true;
1042
1040
phy_attached_info(phydev);
1043
1041
1044
1042
phy_set_max_speed(phydev, SPEED_100);
···
1064
1066
struct net_device *dev)
1065
1067
{
1066
1068
struct smsc911x_data *pdata = netdev_priv(dev);
1069
+
struct phy_device *phydev;
1067
1070
int err = -ENXIO;
1068
1071
1069
1072
pdata->mii_bus = mdiobus_alloc();
···
1106
1107
SMSC_WARN(pdata, probe, "Error registering mii bus");
1107
1108
goto err_out_free_bus_2;
1108
1109
}
1110
+
1111
+
phydev = phy_find_first(pdata->mii_bus);
1112
+
if (phydev)
1113
+
phydev->mac_managed_pm = true;
1109
1114
1110
1115
return 0;
1111
1116
-1
drivers/net/ethernet/stmicro/stmmac/common.h
-1
drivers/net/ethernet/stmicro/stmmac/common.h
+3
-58
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+3
-58
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
···
472
472
if (vid > 4095)
473
473
return -EINVAL;
474
474
475
-
if (hw->promisc) {
476
-
netdev_err(dev,
477
-
"Adding VLAN in promisc mode not supported\n");
478
-
return -EPERM;
479
-
}
480
-
481
475
/* Single Rx VLAN Filter */
482
476
if (hw->num_vlan == 1) {
483
477
/* For single VLAN filter, VID 0 means VLAN promiscuous */
···
521
527
{
522
528
int i, ret = 0;
523
529
524
-
if (hw->promisc) {
525
-
netdev_err(dev,
526
-
"Deleting VLAN in promisc mode not supported\n");
527
-
return -EPERM;
528
-
}
529
-
530
530
/* Single Rx VLAN Filter */
531
531
if (hw->num_vlan == 1) {
532
532
if ((hw->vlan_filter[0] & GMAC_VLAN_TAG_VID) == vid) {
···
543
555
}
544
556
545
557
return ret;
546
-
}
547
-
548
-
static void dwmac4_vlan_promisc_enable(struct net_device *dev,
549
-
struct mac_device_info *hw)
550
-
{
551
-
void __iomem *ioaddr = hw->pcsr;
552
-
u32 value;
553
-
u32 hash;
554
-
u32 val;
555
-
int i;
556
-
557
-
/* Single Rx VLAN Filter */
558
-
if (hw->num_vlan == 1) {
559
-
dwmac4_write_single_vlan(dev, 0);
560
-
return;
561
-
}
562
-
563
-
/* Extended Rx VLAN Filter Enable */
564
-
for (i = 0; i < hw->num_vlan; i++) {
565
-
if (hw->vlan_filter[i] & GMAC_VLAN_TAG_DATA_VEN) {
566
-
val = hw->vlan_filter[i] & ~GMAC_VLAN_TAG_DATA_VEN;
567
-
dwmac4_write_vlan_filter(dev, hw, i, val);
568
-
}
569
-
}
570
-
571
-
hash = readl(ioaddr + GMAC_VLAN_HASH_TABLE);
572
-
if (hash & GMAC_VLAN_VLHT) {
573
-
value = readl(ioaddr + GMAC_VLAN_TAG);
574
-
if (value & GMAC_VLAN_VTHM) {
575
-
value &= ~GMAC_VLAN_VTHM;
576
-
writel(value, ioaddr + GMAC_VLAN_TAG);
577
-
}
578
-
}
579
558
}
580
559
581
560
static void dwmac4_restore_hw_vlan_rx_fltr(struct net_device *dev,
···
664
709
}
665
710
666
711
/* VLAN filtering */
667
-
if (dev->features & NETIF_F_HW_VLAN_CTAG_FILTER)
712
+
if (dev->flags & IFF_PROMISC && !hw->vlan_fail_q_en)
713
+
value &= ~GMAC_PACKET_FILTER_VTFE;
714
+
else if (dev->features & NETIF_F_HW_VLAN_CTAG_FILTER)
668
715
value |= GMAC_PACKET_FILTER_VTFE;
669
716
670
717
writel(value, ioaddr + GMAC_PACKET_FILTER);
671
-
672
-
if (dev->flags & IFF_PROMISC && !hw->vlan_fail_q_en) {
673
-
if (!hw->promisc) {
674
-
hw->promisc = 1;
675
-
dwmac4_vlan_promisc_enable(dev, hw);
676
-
}
677
-
} else {
678
-
if (hw->promisc) {
679
-
hw->promisc = 0;
680
-
dwmac4_restore_hw_vlan_rx_fltr(dev, hw);
681
-
}
682
-
}
683
718
}
684
719
685
720
static void dwmac4_flow_ctrl(struct mac_device_info *hw, unsigned int duplex,
+1
-1
drivers/net/ethernet/wangxun/libwx/wx_type.h
+1
-1
drivers/net/ethernet/wangxun/libwx/wx_type.h
···
217
217
#define WX_PX_INTA 0x110
218
218
#define WX_PX_GPIE 0x118
219
219
#define WX_PX_GPIE_MODEL BIT(0)
220
-
#define WX_PX_IC 0x120
220
+
#define WX_PX_IC(_i) (0x120 + (_i) * 4)
221
221
#define WX_PX_IMS(_i) (0x140 + (_i) * 4)
222
222
#define WX_PX_IMC(_i) (0x150 + (_i) * 4)
223
223
#define WX_PX_ISB_ADDR_L 0x160
+1
-1
drivers/net/ethernet/wangxun/ngbe/ngbe_main.c
+1
-1
drivers/net/ethernet/wangxun/ngbe/ngbe_main.c
+2
-1
drivers/net/ethernet/wangxun/txgbe/txgbe_main.c
+2
-1
drivers/net/ethernet/wangxun/txgbe/txgbe_main.c
+1
-2
drivers/net/ieee802154/ca8210.c
+1
-2
drivers/net/ieee802154/ca8210.c
+1
-1
drivers/net/ipa/gsi_trans.c
+1
-1
drivers/net/ipa/gsi_trans.c
···
156
156
* gsi_trans_pool_exit_dma() can assume the total allocated
157
157
* size is exactly (count * size).
158
158
*/
159
-
total_size = get_order(total_size) << PAGE_SHIFT;
159
+
total_size = PAGE_SIZE << get_order(total_size);
160
160
161
161
virt = dma_alloc_coherent(dev, total_size, &addr, GFP_KERNEL);
162
162
if (!virt)
+2
-6
drivers/net/net_failover.c
+2
-6
drivers/net/net_failover.c
···
130
130
txq = ops->ndo_select_queue(primary_dev, skb, sb_dev);
131
131
else
132
132
txq = netdev_pick_tx(primary_dev, skb, NULL);
133
-
134
-
qdisc_skb_cb(skb)->slave_dev_queue_mapping = skb->queue_mapping;
135
-
136
-
return txq;
133
+
} else {
134
+
txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) : 0;
137
135
}
138
-
139
-
txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) : 0;
140
136
141
137
/* Save the original txq to restore before passing to the driver */
142
138
qdisc_skb_cb(skb)->slave_dev_queue_mapping = skb->queue_mapping;
+2
-4
drivers/net/phy/dp83869.c
+2
-4
drivers/net/phy/dp83869.c
···
588
588
&dp83869_internal_delay[0],
589
589
delay_size, true);
590
590
if (dp83869->rx_int_delay < 0)
591
-
dp83869->rx_int_delay =
592
-
dp83869_internal_delay[DP83869_CLK_DELAY_DEF];
591
+
dp83869->rx_int_delay = DP83869_CLK_DELAY_DEF;
593
592
594
593
dp83869->tx_int_delay = phy_get_internal_delay(phydev, dev,
595
594
&dp83869_internal_delay[0],
596
595
delay_size, false);
597
596
if (dp83869->tx_int_delay < 0)
598
-
dp83869->tx_int_delay =
599
-
dp83869_internal_delay[DP83869_CLK_DELAY_DEF];
597
+
dp83869->tx_int_delay = DP83869_CLK_DELAY_DEF;
600
598
601
599
return ret;
602
600
}
+1
drivers/net/phy/micrel.c
+1
drivers/net/phy/micrel.c
···
4698
4698
.resume = kszphy_resume,
4699
4699
.cable_test_start = ksz9x31_cable_test_start,
4700
4700
.cable_test_get_status = ksz9x31_cable_test_get_status,
4701
+
.get_features = ksz9477_get_features,
4701
4702
}, {
4702
4703
.phy_id = PHY_ID_KSZ8873MLL,
4703
4704
.phy_id_mask = MICREL_PHY_ID_MASK,
+1
-1
drivers/net/phy/phy_device.c
+1
-1
drivers/net/phy/phy_device.c
···
3057
3057
* and "phy-device" are not supported in ACPI. DT supports all the three
3058
3058
* named references to the phy node.
3059
3059
*/
3060
-
struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode)
3060
+
struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode)
3061
3061
{
3062
3062
struct fwnode_handle *phy_node;
3063
3063
+3
-3
drivers/net/phy/sfp-bus.c
+3
-3
drivers/net/phy/sfp-bus.c
···
17
17
/* private: */
18
18
struct kref kref;
19
19
struct list_head node;
20
-
struct fwnode_handle *fwnode;
20
+
const struct fwnode_handle *fwnode;
21
21
22
22
const struct sfp_socket_ops *socket_ops;
23
23
struct device *sfp_dev;
···
390
390
return bus->registered ? bus->upstream_ops : NULL;
391
391
}
392
392
393
-
static struct sfp_bus *sfp_bus_get(struct fwnode_handle *fwnode)
393
+
static struct sfp_bus *sfp_bus_get(const struct fwnode_handle *fwnode)
394
394
{
395
395
struct sfp_bus *sfp, *new, *found = NULL;
396
396
···
593
593
* - %-ENOMEM if we failed to allocate the bus.
594
594
* - an error from the upstream's connect_phy() method.
595
595
*/
596
-
struct sfp_bus *sfp_bus_find_fwnode(struct fwnode_handle *fwnode)
596
+
struct sfp_bus *sfp_bus_find_fwnode(const struct fwnode_handle *fwnode)
597
597
{
598
598
struct fwnode_reference_args ref;
599
599
struct sfp_bus *bus;
+3
-1
drivers/net/vmxnet3/vmxnet3_drv.c
+3
-1
drivers/net/vmxnet3/vmxnet3_drv.c
···
1688
1688
if (unlikely(rcd->ts))
1689
1689
__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), rcd->tci);
1690
1690
1691
-
if (adapter->netdev->features & NETIF_F_LRO)
1691
+
/* Use GRO callback if UPT is enabled */
1692
+
if ((adapter->netdev->features & NETIF_F_LRO) &&
1693
+
!rq->shared->updateRxProd)
1692
1694
netif_receive_skb(skb);
1693
1695
else
1694
1696
napi_gro_receive(&rq->napi, skb);
+7
drivers/net/wwan/iosm/iosm_ipc_imem.c
+7
drivers/net/wwan/iosm/iosm_ipc_imem.c
···
587
587
while (ctrl_chl_idx < IPC_MEM_MAX_CHANNELS) {
588
588
if (!ipc_chnl_cfg_get(&chnl_cfg_port, ctrl_chl_idx)) {
589
589
ipc_imem->ipc_port[ctrl_chl_idx] = NULL;
590
+
591
+
if (ipc_imem->pcie->pci->device == INTEL_CP_DEVICE_7560_ID &&
592
+
chnl_cfg_port.wwan_port_type == WWAN_PORT_XMMRPC) {
593
+
ctrl_chl_idx++;
594
+
continue;
595
+
}
596
+
590
597
if (ipc_imem->pcie->pci->device == INTEL_CP_DEVICE_7360_ID &&
591
598
chnl_cfg_port.wwan_port_type == WWAN_PORT_MBIM) {
592
599
ctrl_chl_idx++;
+1
-1
drivers/net/xen-netback/common.h
+1
-1
drivers/net/xen-netback/common.h
···
166
166
struct pending_tx_info pending_tx_info[MAX_PENDING_REQS];
167
167
grant_handle_t grant_tx_handle[MAX_PENDING_REQS];
168
168
169
-
struct gnttab_copy tx_copy_ops[MAX_PENDING_REQS];
169
+
struct gnttab_copy tx_copy_ops[2 * MAX_PENDING_REQS];
170
170
struct gnttab_map_grant_ref tx_map_ops[MAX_PENDING_REQS];
171
171
struct gnttab_unmap_grant_ref tx_unmap_ops[MAX_PENDING_REQS];
172
172
/* passed to gnttab_[un]map_refs with pages under (un)mapping */
+25
-10
drivers/net/xen-netback/netback.c
+25
-10
drivers/net/xen-netback/netback.c
···
334
334
struct xenvif_tx_cb {
335
335
u16 copy_pending_idx[XEN_NETBK_LEGACY_SLOTS_MAX + 1];
336
336
u8 copy_count;
337
+
u32 split_mask;
337
338
};
338
339
339
340
#define XENVIF_TX_CB(skb) ((struct xenvif_tx_cb *)(skb)->cb)
···
362
361
struct sk_buff *skb =
363
362
alloc_skb(size + NET_SKB_PAD + NET_IP_ALIGN,
364
363
GFP_ATOMIC | __GFP_NOWARN);
364
+
365
+
BUILD_BUG_ON(sizeof(*XENVIF_TX_CB(skb)) > sizeof(skb->cb));
365
366
if (unlikely(skb == NULL))
366
367
return NULL;
367
368
···
399
396
nr_slots = shinfo->nr_frags + 1;
400
397
401
398
copy_count(skb) = 0;
399
+
XENVIF_TX_CB(skb)->split_mask = 0;
402
400
403
401
/* Create copy ops for exactly data_len bytes into the skb head. */
404
402
__skb_put(skb, data_len);
405
403
while (data_len > 0) {
406
404
int amount = data_len > txp->size ? txp->size : data_len;
405
+
bool split = false;
407
406
408
407
cop->source.u.ref = txp->gref;
409
408
cop->source.domid = queue->vif->domid;
···
418
413
cop->dest.u.gmfn = virt_to_gfn(skb->data + skb_headlen(skb)
419
414
- data_len);
420
415
416
+
/* Don't cross local page boundary! */
417
+
if (cop->dest.offset + amount > XEN_PAGE_SIZE) {
418
+
amount = XEN_PAGE_SIZE - cop->dest.offset;
419
+
XENVIF_TX_CB(skb)->split_mask |= 1U << copy_count(skb);
420
+
split = true;
421
+
}
422
+
421
423
cop->len = amount;
422
424
cop->flags = GNTCOPY_source_gref;
423
425
···
432
420
pending_idx = queue->pending_ring[index];
433
421
callback_param(queue, pending_idx).ctx = NULL;
434
422
copy_pending_idx(skb, copy_count(skb)) = pending_idx;
435
-
copy_count(skb)++;
423
+
if (!split)
424
+
copy_count(skb)++;
436
425
437
426
cop++;
438
427
data_len -= amount;
···
454
441
nr_slots--;
455
442
} else {
456
443
/* The copy op partially covered the tx_request.
457
-
* The remainder will be mapped.
444
+
* The remainder will be mapped or copied in the next
445
+
* iteration.
458
446
*/
459
447
txp->offset += amount;
460
448
txp->size -= amount;
···
553
539
pending_idx = copy_pending_idx(skb, i);
554
540
555
541
newerr = (*gopp_copy)->status;
542
+
543
+
/* Split copies need to be handled together. */
544
+
if (XENVIF_TX_CB(skb)->split_mask & (1U << i)) {
545
+
(*gopp_copy)++;
546
+
if (!newerr)
547
+
newerr = (*gopp_copy)->status;
548
+
}
556
549
if (likely(!newerr)) {
557
550
/* The first frag might still have this slot mapped */
558
551
if (i < copy_count(skb) - 1 || !sharedslot)
···
994
973
995
974
/* No crossing a page as the payload mustn't fragment. */
996
975
if (unlikely((txreq.offset + txreq.size) > XEN_PAGE_SIZE)) {
997
-
netdev_err(queue->vif->dev,
998
-
"txreq.offset: %u, size: %u, end: %lu\n",
999
-
txreq.offset, txreq.size,
1000
-
(unsigned long)(txreq.offset&~XEN_PAGE_MASK) + txreq.size);
976
+
netdev_err(queue->vif->dev, "Cross page boundary, txreq.offset: %u, size: %u\n",
977
+
txreq.offset, txreq.size);
1001
978
xenvif_fatal_tx_err(queue->vif);
1002
979
break;
1003
980
}
···
1080
1061
__skb_queue_tail(&queue->tx_queue, skb);
1081
1062
1082
1063
queue->tx.req_cons = idx;
1083
-
1084
-
if ((*map_ops >= ARRAY_SIZE(queue->tx_map_ops)) ||
1085
-
(*copy_ops >= ARRAY_SIZE(queue->tx_copy_ops)))
1086
-
break;
1087
1064
}
1088
1065
1089
1066
return;
+2
-1
drivers/nvme/host/core.c
+2
-1
drivers/nvme/host/core.c
+8
-6
drivers/nvme/host/ioctl.c
+8
-6
drivers/nvme/host/ioctl.c
···
464
464
return (struct nvme_uring_cmd_pdu *)&ioucmd->pdu;
465
465
}
466
466
467
-
static void nvme_uring_task_meta_cb(struct io_uring_cmd *ioucmd)
467
+
static void nvme_uring_task_meta_cb(struct io_uring_cmd *ioucmd,
468
+
unsigned issue_flags)
468
469
{
469
470
struct nvme_uring_cmd_pdu *pdu = nvme_uring_cmd_pdu(ioucmd);
470
471
struct request *req = pdu->req;
···
486
485
blk_rq_unmap_user(req->bio);
487
486
blk_mq_free_request(req);
488
487
489
-
io_uring_cmd_done(ioucmd, status, result);
488
+
io_uring_cmd_done(ioucmd, status, result, issue_flags);
490
489
}
491
490
492
-
static void nvme_uring_task_cb(struct io_uring_cmd *ioucmd)
491
+
static void nvme_uring_task_cb(struct io_uring_cmd *ioucmd,
492
+
unsigned issue_flags)
493
493
{
494
494
struct nvme_uring_cmd_pdu *pdu = nvme_uring_cmd_pdu(ioucmd);
495
495
496
496
if (pdu->bio)
497
497
blk_rq_unmap_user(pdu->bio);
498
498
499
-
io_uring_cmd_done(ioucmd, pdu->nvme_status, pdu->u.result);
499
+
io_uring_cmd_done(ioucmd, pdu->nvme_status, pdu->u.result, issue_flags);
500
500
}
501
501
502
502
static enum rq_end_io_ret nvme_uring_cmd_end_io(struct request *req,
···
519
517
* Otherwise, move the completion to task work.
520
518
*/
521
519
if (cookie != NULL && blk_rq_is_poll(req))
522
-
nvme_uring_task_cb(ioucmd);
520
+
nvme_uring_task_cb(ioucmd, IO_URING_F_UNLOCKED);
523
521
else
524
522
io_uring_cmd_complete_in_task(ioucmd, nvme_uring_task_cb);
525
523
···
541
539
* Otherwise, move the completion to task work.
542
540
*/
543
541
if (cookie != NULL && blk_rq_is_poll(req))
544
-
nvme_uring_task_meta_cb(ioucmd);
542
+
nvme_uring_task_meta_cb(ioucmd, IO_URING_F_UNLOCKED);
545
543
else
546
544
io_uring_cmd_complete_in_task(ioucmd, nvme_uring_task_meta_cb);
547
545
+1
-1
drivers/platform/chrome/cros_ec_chardev.c
+1
-1
drivers/platform/chrome/cros_ec_chardev.c
+3
-1
drivers/platform/surface/aggregator/bus.c
+3
-1
drivers/platform/surface/aggregator/bus.c
···
485
485
* device, so ignore it and continue with the next one.
486
486
*/
487
487
status = ssam_add_client_device(parent, ctrl, child);
488
-
if (status && status != -ENODEV)
488
+
if (status && status != -ENODEV) {
489
+
fwnode_handle_put(child);
489
490
goto err;
491
+
}
490
492
}
491
493
492
494
return 0;
+1
drivers/platform/x86/gigabyte-wmi.c
+1
drivers/platform/x86/gigabyte-wmi.c
···
140
140
}}
141
141
142
142
static const struct dmi_system_id gigabyte_wmi_known_working_platforms[] = {
143
+
DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("A320M-S2H V2-CF"),
143
144
DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("B450M DS3H-CF"),
144
145
DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("B450M DS3H WIFI-CF"),
145
146
DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("B450M S2H V2"),
+7
-16
drivers/platform/x86/intel/tpmi.c
+7
-16
drivers/platform/x86/intel/tpmi.c
···
203
203
struct intel_vsec_device *feature_vsec_dev;
204
204
struct resource *res, *tmp;
205
205
const char *name;
206
-
int ret, i;
206
+
int i;
207
207
208
208
name = intel_tpmi_name(pfs->pfs_header.tpmi_id);
209
209
if (!name)
···
215
215
216
216
feature_vsec_dev = kzalloc(sizeof(*feature_vsec_dev), GFP_KERNEL);
217
217
if (!feature_vsec_dev) {
218
-
ret = -ENOMEM;
219
-
goto free_res;
218
+
kfree(res);
219
+
return -ENOMEM;
220
220
}
221
221
222
222
snprintf(feature_id_name, sizeof(feature_id_name), "tpmi-%s", name);
···
239
239
/*
240
240
* intel_vsec_add_aux() is resource managed, no explicit
241
241
* delete is required on error or on module unload.
242
-
* feature_vsec_dev memory is also freed as part of device
243
-
* delete.
242
+
* feature_vsec_dev and res memory are also freed as part of
243
+
* device deletion.
244
244
*/
245
-
ret = intel_vsec_add_aux(vsec_dev->pcidev, &vsec_dev->auxdev.dev,
246
-
feature_vsec_dev, feature_id_name);
247
-
if (ret)
248
-
goto free_res;
249
-
250
-
return 0;
251
-
252
-
free_res:
253
-
kfree(res);
254
-
255
-
return ret;
245
+
return intel_vsec_add_aux(vsec_dev->pcidev, &vsec_dev->auxdev.dev,
246
+
feature_vsec_dev, feature_id_name);
256
247
}
257
248
258
249
static int tpmi_create_devices(struct intel_tpmi_info *tpmi_info)
+1
drivers/platform/x86/intel/vsec.c
+1
drivers/platform/x86/intel/vsec.c
+57
-3
drivers/platform/x86/think-lmi.c
+57
-3
drivers/platform/x86/think-lmi.c
···
941
941
{
942
942
struct tlmi_attr_setting *setting = to_tlmi_attr_setting(kobj);
943
943
944
-
if (!tlmi_priv.can_get_bios_selections)
945
-
return -EOPNOTSUPP;
946
-
947
944
return sysfs_emit(buf, "%s\n", setting->possible_values);
945
+
}
946
+
947
+
static ssize_t type_show(struct kobject *kobj, struct kobj_attribute *attr,
948
+
char *buf)
949
+
{
950
+
struct tlmi_attr_setting *setting = to_tlmi_attr_setting(kobj);
951
+
952
+
if (setting->possible_values) {
953
+
/* Figure out what setting type is as BIOS does not return this */
954
+
if (strchr(setting->possible_values, ';'))
955
+
return sysfs_emit(buf, "enumeration\n");
956
+
}
957
+
/* Anything else is going to be a string */
958
+
return sysfs_emit(buf, "string\n");
948
959
}
949
960
950
961
static ssize_t current_value_store(struct kobject *kobj,
···
1047
1036
1048
1037
static struct kobj_attribute attr_current_val = __ATTR_RW_MODE(current_value, 0600);
1049
1038
1039
+
static struct kobj_attribute attr_type = __ATTR_RO(type);
1040
+
1041
+
static umode_t attr_is_visible(struct kobject *kobj,
1042
+
struct attribute *attr, int n)
1043
+
{
1044
+
struct tlmi_attr_setting *setting = to_tlmi_attr_setting(kobj);
1045
+
1046
+
/* We don't want to display possible_values attributes if not available */
1047
+
if ((attr == &attr_possible_values.attr) && (!setting->possible_values))
1048
+
return 0;
1049
+
1050
+
return attr->mode;
1051
+
}
1052
+
1050
1053
static struct attribute *tlmi_attrs[] = {
1051
1054
&attr_displ_name.attr,
1052
1055
&attr_current_val.attr,
1053
1056
&attr_possible_values.attr,
1057
+
&attr_type.attr,
1054
1058
NULL
1055
1059
};
1056
1060
1057
1061
static const struct attribute_group tlmi_attr_group = {
1062
+
.is_visible = attr_is_visible,
1058
1063
.attrs = tlmi_attrs,
1059
1064
};
1060
1065
···
1450
1423
if (ret || !setting->possible_values)
1451
1424
pr_info("Error retrieving possible values for %d : %s\n",
1452
1425
i, setting->display_name);
1426
+
} else {
1427
+
/*
1428
+
* Older Thinkstations don't support the bios_selections API.
1429
+
* Instead they store this as a [Optional:Option1,Option2] section of the
1430
+
* name string.
1431
+
* Try and pull that out if it's available.
1432
+
*/
1433
+
char *item, *optstart, *optend;
1434
+
1435
+
if (!tlmi_setting(setting->index, &item, LENOVO_BIOS_SETTING_GUID)) {
1436
+
optstart = strstr(item, "[Optional:");
1437
+
if (optstart) {
1438
+
optstart += strlen("[Optional:");
1439
+
optend = strstr(optstart, "]");
1440
+
if (optend)
1441
+
setting->possible_values =
1442
+
kstrndup(optstart, optend - optstart,
1443
+
GFP_KERNEL);
1444
+
}
1445
+
}
1453
1446
}
1447
+
/*
1448
+
* firmware-attributes requires that possible_values are separated by ';' but
1449
+
* Lenovo FW uses ','. Replace appropriately.
1450
+
*/
1451
+
if (setting->possible_values)
1452
+
strreplace(setting->possible_values, ',', ';');
1453
+
1454
1454
kobject_init(&setting->kobj, &tlmi_attr_setting_ktype);
1455
1455
tlmi_priv.setting[i] = setting;
1456
1456
kfree(item);
+2
drivers/power/supply/axp288_fuel_gauge.c
+2
drivers/power/supply/axp288_fuel_gauge.c
+1
drivers/power/supply/bq24190_charger.c
+1
drivers/power/supply/bq24190_charger.c
···
1906
1906
struct bq24190_dev_info *bdi = i2c_get_clientdata(client);
1907
1907
int error;
1908
1908
1909
+
cancel_delayed_work_sync(&bdi->input_current_limit_work);
1909
1910
error = pm_runtime_resume_and_get(bdi->dev);
1910
1911
if (error < 0)
1911
1912
dev_warn(bdi->dev, "pm_runtime_get failed: %i\n", error);
+1
-1
drivers/power/supply/cros_usbpd-charger.c
+1
-1
drivers/power/supply/cros_usbpd-charger.c
+1
drivers/power/supply/da9150-charger.c
+1
drivers/power/supply/da9150-charger.c
-4
drivers/power/supply/rk817_charger.c
-4
drivers/power/supply/rk817_charger.c
···
785
785
regmap_bulk_read(rk808->regmap, RK817_GAS_GAUGE_Q_PRES_H3,
786
786
bulk_reg, 4);
787
787
tmp = get_unaligned_be32(bulk_reg);
788
-
if (tmp < 0)
789
-
tmp = 0;
790
788
boot_charge_mah = ADC_TO_CHARGE_UAH(tmp,
791
789
charger->res_div) / 1000;
792
790
/*
···
823
825
regmap_bulk_read(rk808->regmap, RK817_GAS_GAUGE_Q_PRES_H3,
824
826
bulk_reg, 4);
825
827
tmp = get_unaligned_be32(bulk_reg);
826
-
if (tmp < 0)
827
-
tmp = 0;
828
828
boot_charge_mah = ADC_TO_CHARGE_UAH(tmp, charger->res_div) / 1000;
829
829
regmap_bulk_read(rk808->regmap, RK817_GAS_GAUGE_OCV_VOL_H,
830
830
bulk_reg, 2);
+1
-1
drivers/ptp/ptp_qoriq.c
+1
-1
drivers/ptp/ptp_qoriq.c
+2
-1
drivers/s390/crypto/vfio_ap_drv.c
+2
-1
drivers/s390/crypto/vfio_ap_drv.c
+3
-3
drivers/soc/qcom/llcc-qcom.c
+3
-3
drivers/soc/qcom/llcc-qcom.c
···
191
191
{ LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
192
192
{ LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0, 0 },
193
193
{ LLCC_WRCACHE, 31, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
194
-
{ LLCC_CVPFW, 32, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
195
-
{ LLCC_CPUSS1, 33, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
196
-
{ LLCC_CPUHWT, 36, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
194
+
{ LLCC_CVPFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
195
+
{ LLCC_CPUSS1, 3, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
196
+
{ LLCC_CPUHWT, 5, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
197
197
};
198
198
199
199
static const struct llcc_slice_config sdm845_data[] = {
+7
-3
drivers/soc/qcom/rmtfs_mem.c
+7
-3
drivers/soc/qcom/rmtfs_mem.c
···
176
176
struct reserved_mem *rmem;
177
177
struct qcom_rmtfs_mem *rmtfs_mem;
178
178
u32 client_id;
179
-
u32 num_vmids, vmid[NUM_MAX_VMIDS];
179
+
u32 vmid[NUM_MAX_VMIDS];
180
+
int num_vmids;
180
181
int ret, i;
181
182
182
183
rmem = of_reserved_mem_lookup(node);
···
229
228
}
230
229
231
230
num_vmids = of_property_count_u32_elems(node, "qcom,vmid");
232
-
if (num_vmids < 0) {
233
-
dev_err(&pdev->dev, "failed to count qcom,vmid elements: %d\n", ret);
231
+
if (num_vmids == -EINVAL) {
232
+
/* qcom,vmid is optional */
233
+
num_vmids = 0;
234
+
} else if (num_vmids < 0) {
235
+
dev_err(&pdev->dev, "failed to count qcom,vmid elements: %d\n", num_vmids);
234
236
goto remove_cdev;
235
237
} else if (num_vmids > NUM_MAX_VMIDS) {
236
238
dev_warn(&pdev->dev,
+14
-15
drivers/tee/amdtee/core.c
+14
-15
drivers/tee/amdtee/core.c
···
267
267
goto out;
268
268
}
269
269
270
+
/* Open session with loaded TA */
271
+
handle_open_session(arg, &session_info, param);
272
+
if (arg->ret != TEEC_SUCCESS) {
273
+
pr_err("open_session failed %d\n", arg->ret);
274
+
handle_unload_ta(ta_handle);
275
+
kref_put(&sess->refcount, destroy_session);
276
+
goto out;
277
+
}
278
+
270
279
/* Find an empty session index for the given TA */
271
280
spin_lock(&sess->lock);
272
281
i = find_first_zero_bit(sess->sess_mask, TEE_NUM_SESSIONS);
273
-
if (i < TEE_NUM_SESSIONS)
282
+
if (i < TEE_NUM_SESSIONS) {
283
+
sess->session_info[i] = session_info;
284
+
set_session_id(ta_handle, i, &arg->session);
274
285
set_bit(i, sess->sess_mask);
286
+
}
275
287
spin_unlock(&sess->lock);
276
288
277
289
if (i >= TEE_NUM_SESSIONS) {
278
290
pr_err("reached maximum session count %d\n", TEE_NUM_SESSIONS);
291
+
handle_close_session(ta_handle, session_info);
279
292
handle_unload_ta(ta_handle);
280
293
kref_put(&sess->refcount, destroy_session);
281
294
rc = -ENOMEM;
282
295
goto out;
283
296
}
284
297
285
-
/* Open session with loaded TA */
286
-
handle_open_session(arg, &session_info, param);
287
-
if (arg->ret != TEEC_SUCCESS) {
288
-
pr_err("open_session failed %d\n", arg->ret);
289
-
spin_lock(&sess->lock);
290
-
clear_bit(i, sess->sess_mask);
291
-
spin_unlock(&sess->lock);
292
-
handle_unload_ta(ta_handle);
293
-
kref_put(&sess->refcount, destroy_session);
294
-
goto out;
295
-
}
296
-
297
-
sess->session_info[i] = session_info;
298
-
set_session_id(ta_handle, i, &arg->session);
299
298
out:
300
299
free_pages((u64)ta, get_order(ta_size));
301
300
return rc;
+98
-8
drivers/thermal/thermal_core.c
+98
-8
drivers/thermal/thermal_core.c
···
613
613
struct thermal_instance *pos;
614
614
struct thermal_zone_device *pos1;
615
615
struct thermal_cooling_device *pos2;
616
+
bool upper_no_limit;
616
617
int result;
617
618
618
619
if (trip >= tz->num_trips || trip < 0)
···
633
632
634
633
/* lower default 0, upper default max_state */
635
634
lower = lower == THERMAL_NO_LIMIT ? 0 : lower;
636
-
upper = upper == THERMAL_NO_LIMIT ? cdev->max_state : upper;
635
+
636
+
if (upper == THERMAL_NO_LIMIT) {
637
+
upper = cdev->max_state;
638
+
upper_no_limit = true;
639
+
} else {
640
+
upper_no_limit = false;
641
+
}
637
642
638
643
if (lower > upper || upper > cdev->max_state)
639
644
return -EINVAL;
···
651
644
dev->cdev = cdev;
652
645
dev->trip = trip;
653
646
dev->upper = upper;
647
+
dev->upper_no_limit = upper_no_limit;
654
648
dev->lower = lower;
655
649
dev->target = THERMAL_NO_TARGET;
656
650
dev->weight = weight;
···
1053
1045
}
1054
1046
EXPORT_SYMBOL_GPL(devm_thermal_of_cooling_device_register);
1055
1047
1048
+
static bool thermal_cooling_device_present(struct thermal_cooling_device *cdev)
1049
+
{
1050
+
struct thermal_cooling_device *pos = NULL;
1051
+
1052
+
list_for_each_entry(pos, &thermal_cdev_list, node) {
1053
+
if (pos == cdev)
1054
+
return true;
1055
+
}
1056
+
1057
+
return false;
1058
+
}
1059
+
1060
+
/**
1061
+
* thermal_cooling_device_update - Update a cooling device object
1062
+
* @cdev: Target cooling device.
1063
+
*
1064
+
* Update @cdev to reflect a change of the underlying hardware or platform.
1065
+
*
1066
+
* Must be called when the maximum cooling state of @cdev becomes invalid and so
1067
+
* its .get_max_state() callback needs to be run to produce the new maximum
1068
+
* cooling state value.
1069
+
*/
1070
+
void thermal_cooling_device_update(struct thermal_cooling_device *cdev)
1071
+
{
1072
+
struct thermal_instance *ti;
1073
+
unsigned long state;
1074
+
1075
+
if (IS_ERR_OR_NULL(cdev))
1076
+
return;
1077
+
1078
+
/*
1079
+
* Hold thermal_list_lock throughout the update to prevent the device
1080
+
* from going away while being updated.
1081
+
*/
1082
+
mutex_lock(&thermal_list_lock);
1083
+
1084
+
if (!thermal_cooling_device_present(cdev))
1085
+
goto unlock_list;
1086
+
1087
+
/*
1088
+
* Update under the cdev lock to prevent the state from being set beyond
1089
+
* the new limit concurrently.
1090
+
*/
1091
+
mutex_lock(&cdev->lock);
1092
+
1093
+
if (cdev->ops->get_max_state(cdev, &cdev->max_state))
1094
+
goto unlock;
1095
+
1096
+
thermal_cooling_device_stats_reinit(cdev);
1097
+
1098
+
list_for_each_entry(ti, &cdev->thermal_instances, cdev_node) {
1099
+
if (ti->upper == cdev->max_state)
1100
+
continue;
1101
+
1102
+
if (ti->upper < cdev->max_state) {
1103
+
if (ti->upper_no_limit)
1104
+
ti->upper = cdev->max_state;
1105
+
1106
+
continue;
1107
+
}
1108
+
1109
+
ti->upper = cdev->max_state;
1110
+
if (ti->lower > ti->upper)
1111
+
ti->lower = ti->upper;
1112
+
1113
+
if (ti->target == THERMAL_NO_TARGET)
1114
+
continue;
1115
+
1116
+
if (ti->target > ti->upper)
1117
+
ti->target = ti->upper;
1118
+
}
1119
+
1120
+
if (cdev->ops->get_cur_state(cdev, &state) || state > cdev->max_state)
1121
+
goto unlock;
1122
+
1123
+
thermal_cooling_device_stats_update(cdev, state);
1124
+
1125
+
unlock:
1126
+
mutex_unlock(&cdev->lock);
1127
+
1128
+
unlock_list:
1129
+
mutex_unlock(&thermal_list_lock);
1130
+
}
1131
+
EXPORT_SYMBOL_GPL(thermal_cooling_device_update);
1132
+
1056
1133
static void __unbind(struct thermal_zone_device *tz, int mask,
1057
1134
struct thermal_cooling_device *cdev)
1058
1135
{
···
1160
1067
int i;
1161
1068
const struct thermal_zone_params *tzp;
1162
1069
struct thermal_zone_device *tz;
1163
-
struct thermal_cooling_device *pos = NULL;
1164
1070
1165
1071
if (!cdev)
1166
1072
return;
1167
1073
1168
1074
mutex_lock(&thermal_list_lock);
1169
-
list_for_each_entry(pos, &thermal_cdev_list, node)
1170
-
if (pos == cdev)
1171
-
break;
1172
-
if (pos != cdev) {
1173
-
/* thermal cooling device not found */
1075
+
1076
+
if (!thermal_cooling_device_present(cdev)) {
1174
1077
mutex_unlock(&thermal_list_lock);
1175
1078
return;
1176
1079
}
1080
+
1177
1081
list_del(&cdev->node);
1178
1082
1179
1083
/* Unbind all thermal zones associated with 'this' cdev */
···
1399
1309
struct thermal_trip trip;
1400
1310
1401
1311
result = thermal_zone_get_trip(tz, count, &trip);
1402
-
if (result)
1312
+
if (result || !trip.temperature)
1403
1313
set_bit(count, &tz->trips_disabled);
1404
1314
}
1405
1315
+2
drivers/thermal/thermal_core.h
+2
drivers/thermal/thermal_core.h
···
101
101
struct list_head tz_node; /* node in tz->thermal_instances */
102
102
struct list_head cdev_node; /* node in cdev->thermal_instances */
103
103
unsigned int weight; /* The weight of the cooling device */
104
+
bool upper_no_limit;
104
105
};
105
106
106
107
#define to_thermal_zone(_dev) \
···
128
127
void thermal_zone_destroy_device_groups(struct thermal_zone_device *);
129
128
void thermal_cooling_device_setup_sysfs(struct thermal_cooling_device *);
130
129
void thermal_cooling_device_destroy_sysfs(struct thermal_cooling_device *cdev);
130
+
void thermal_cooling_device_stats_reinit(struct thermal_cooling_device *cdev);
131
131
/* used only at binding time */
132
132
ssize_t trip_point_show(struct device *, struct device_attribute *, char *);
133
133
ssize_t weight_show(struct device *, struct device_attribute *, char *);
+65
-9
drivers/thermal/thermal_sysfs.c
+65
-9
drivers/thermal/thermal_sysfs.c
···
685
685
{
686
686
struct cooling_dev_stats *stats = cdev->stats;
687
687
688
+
lockdep_assert_held(&cdev->lock);
689
+
688
690
if (!stats)
689
691
return;
690
692
···
708
706
struct device_attribute *attr, char *buf)
709
707
{
710
708
struct thermal_cooling_device *cdev = to_cooling_device(dev);
711
-
struct cooling_dev_stats *stats = cdev->stats;
712
-
int ret;
709
+
struct cooling_dev_stats *stats;
710
+
int ret = 0;
711
+
712
+
mutex_lock(&cdev->lock);
713
+
714
+
stats = cdev->stats;
715
+
if (!stats)
716
+
goto unlock;
713
717
714
718
spin_lock(&stats->lock);
715
719
ret = sprintf(buf, "%u\n", stats->total_trans);
716
720
spin_unlock(&stats->lock);
721
+
722
+
unlock:
723
+
mutex_unlock(&cdev->lock);
717
724
718
725
return ret;
719
726
}
···
732
721
char *buf)
733
722
{
734
723
struct thermal_cooling_device *cdev = to_cooling_device(dev);
735
-
struct cooling_dev_stats *stats = cdev->stats;
724
+
struct cooling_dev_stats *stats;
736
725
ssize_t len = 0;
737
726
int i;
738
727
728
+
mutex_lock(&cdev->lock);
729
+
730
+
stats = cdev->stats;
731
+
if (!stats)
732
+
goto unlock;
733
+
739
734
spin_lock(&stats->lock);
735
+
740
736
update_time_in_state(stats);
741
737
742
738
for (i = 0; i <= cdev->max_state; i++) {
···
751
733
ktime_to_ms(stats->time_in_state[i]));
752
734
}
753
735
spin_unlock(&stats->lock);
736
+
737
+
unlock:
738
+
mutex_unlock(&cdev->lock);
754
739
755
740
return len;
756
741
}
···
763
742
size_t count)
764
743
{
765
744
struct thermal_cooling_device *cdev = to_cooling_device(dev);
766
-
struct cooling_dev_stats *stats = cdev->stats;
767
-
int i, states = cdev->max_state + 1;
745
+
struct cooling_dev_stats *stats;
746
+
int i, states;
747
+
748
+
mutex_lock(&cdev->lock);
749
+
750
+
stats = cdev->stats;
751
+
if (!stats)
752
+
goto unlock;
753
+
754
+
states = cdev->max_state + 1;
768
755
769
756
spin_lock(&stats->lock);
770
757
···
786
757
787
758
spin_unlock(&stats->lock);
788
759
760
+
unlock:
761
+
mutex_unlock(&cdev->lock);
762
+
789
763
return count;
790
764
}
791
765
···
796
764
struct device_attribute *attr, char *buf)
797
765
{
798
766
struct thermal_cooling_device *cdev = to_cooling_device(dev);
799
-
struct cooling_dev_stats *stats = cdev->stats;
767
+
struct cooling_dev_stats *stats;
800
768
ssize_t len = 0;
801
769
int i, j;
770
+
771
+
mutex_lock(&cdev->lock);
772
+
773
+
stats = cdev->stats;
774
+
if (!stats) {
775
+
len = -ENODATA;
776
+
goto unlock;
777
+
}
802
778
803
779
len += snprintf(buf + len, PAGE_SIZE - len, " From : To\n");
804
780
len += snprintf(buf + len, PAGE_SIZE - len, " : ");
···
815
775
break;
816
776
len += snprintf(buf + len, PAGE_SIZE - len, "state%2u ", i);
817
777
}
818
-
if (len >= PAGE_SIZE)
819
-
return PAGE_SIZE;
778
+
if (len >= PAGE_SIZE) {
779
+
len = PAGE_SIZE;
780
+
goto unlock;
781
+
}
820
782
821
783
len += snprintf(buf + len, PAGE_SIZE - len, "\n");
822
784
···
841
799
842
800
if (len >= PAGE_SIZE) {
843
801
pr_warn_once("Thermal transition table exceeds PAGE_SIZE. Disabling\n");
844
-
return -EFBIG;
802
+
len = -EFBIG;
845
803
}
804
+
805
+
unlock:
806
+
mutex_unlock(&cdev->lock);
807
+
846
808
return len;
847
809
}
848
810
···
876
830
unsigned long states = cdev->max_state + 1;
877
831
int var;
878
832
833
+
lockdep_assert_held(&cdev->lock);
834
+
879
835
var = sizeof(*stats);
880
836
var += sizeof(*stats->time_in_state) * states;
881
837
var += sizeof(*stats->trans_table) * states * states;
···
903
855
904
856
static void cooling_device_stats_destroy(struct thermal_cooling_device *cdev)
905
857
{
858
+
lockdep_assert_held(&cdev->lock);
859
+
906
860
kfree(cdev->stats);
907
861
cdev->stats = NULL;
908
862
}
···
927
877
void thermal_cooling_device_destroy_sysfs(struct thermal_cooling_device *cdev)
928
878
{
929
879
cooling_device_stats_destroy(cdev);
880
+
}
881
+
882
+
void thermal_cooling_device_stats_reinit(struct thermal_cooling_device *cdev)
883
+
{
884
+
cooling_device_stats_destroy(cdev);
885
+
cooling_device_stats_setup(cdev);
930
886
}
931
887
932
888
/* these helper will be used only at the time of bindig */
+6
-6
drivers/thunderbolt/debugfs.c
+6
-6
drivers/thunderbolt/debugfs.c
···
942
942
943
943
snprintf(dir_name, sizeof(dir_name), "port%d", port->port);
944
944
parent = debugfs_lookup(dir_name, port->sw->debugfs_dir);
945
-
debugfs_remove_recursive(debugfs_lookup("margining", parent));
945
+
if (parent)
946
+
debugfs_remove_recursive(debugfs_lookup("margining", parent));
946
947
947
948
kfree(port->usb4->margining);
948
949
port->usb4->margining = NULL;
···
968
967
969
968
static void margining_switch_remove(struct tb_switch *sw)
970
969
{
970
+
struct tb_port *upstream, *downstream;
971
971
struct tb_switch *parent_sw;
972
-
struct tb_port *downstream;
973
972
u64 route = tb_route(sw);
974
973
975
974
if (!route)
976
975
return;
977
976
978
-
/*
979
-
* Upstream is removed with the router itself but we need to
980
-
* remove the downstream port margining directory.
981
-
*/
977
+
upstream = tb_upstream_port(sw);
982
978
parent_sw = tb_switch_parent(sw);
983
979
downstream = tb_port_at(route, parent_sw);
980
+
981
+
margining_port_remove(upstream);
984
982
margining_port_remove(downstream);
985
983
}
986
984
+30
-19
drivers/thunderbolt/nhi.c
+30
-19
drivers/thunderbolt/nhi.c
···
46
46
#define QUIRK_AUTO_CLEAR_INT BIT(0)
47
47
#define QUIRK_E2E BIT(1)
48
48
49
-
static int ring_interrupt_index(struct tb_ring *ring)
49
+
static int ring_interrupt_index(const struct tb_ring *ring)
50
50
{
51
51
int bit = ring->hop;
52
52
if (!ring->is_tx)
···
63
63
{
64
64
int reg = REG_RING_INTERRUPT_BASE +
65
65
ring_interrupt_index(ring) / 32 * 4;
66
-
int bit = ring_interrupt_index(ring) & 31;
67
-
int mask = 1 << bit;
66
+
int interrupt_bit = ring_interrupt_index(ring) & 31;
67
+
int mask = 1 << interrupt_bit;
68
68
u32 old, new;
69
69
70
70
if (ring->irq > 0) {
71
71
u32 step, shift, ivr, misc;
72
72
void __iomem *ivr_base;
73
+
int auto_clear_bit;
73
74
int index;
74
75
75
76
if (ring->is_tx)
···
78
77
else
79
78
index = ring->hop + ring->nhi->hop_count;
80
79
81
-
if (ring->nhi->quirks & QUIRK_AUTO_CLEAR_INT) {
82
-
/*
83
-
* Ask the hardware to clear interrupt status
84
-
* bits automatically since we already know
85
-
* which interrupt was triggered.
86
-
*/
87
-
misc = ioread32(ring->nhi->iobase + REG_DMA_MISC);
88
-
if (!(misc & REG_DMA_MISC_INT_AUTO_CLEAR)) {
89
-
misc |= REG_DMA_MISC_INT_AUTO_CLEAR;
90
-
iowrite32(misc, ring->nhi->iobase + REG_DMA_MISC);
91
-
}
92
-
}
80
+
/*
81
+
* Intel routers support a bit that isn't part of
82
+
* the USB4 spec to ask the hardware to clear
83
+
* interrupt status bits automatically since
84
+
* we already know which interrupt was triggered.
85
+
*
86
+
* Other routers explicitly disable auto-clear
87
+
* to prevent conditions that may occur where two
88
+
* MSIX interrupts are simultaneously active and
89
+
* reading the register clears both of them.
90
+
*/
91
+
misc = ioread32(ring->nhi->iobase + REG_DMA_MISC);
92
+
if (ring->nhi->quirks & QUIRK_AUTO_CLEAR_INT)
93
+
auto_clear_bit = REG_DMA_MISC_INT_AUTO_CLEAR;
94
+
else
95
+
auto_clear_bit = REG_DMA_MISC_DISABLE_AUTO_CLEAR;
96
+
if (!(misc & auto_clear_bit))
97
+
iowrite32(misc | auto_clear_bit,
98
+
ring->nhi->iobase + REG_DMA_MISC);
93
99
94
100
ivr_base = ring->nhi->iobase + REG_INT_VEC_ALLOC_BASE;
95
101
step = index / REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
···
116
108
117
109
dev_dbg(&ring->nhi->pdev->dev,
118
110
"%s interrupt at register %#x bit %d (%#x -> %#x)\n",
119
-
active ? "enabling" : "disabling", reg, bit, old, new);
111
+
active ? "enabling" : "disabling", reg, interrupt_bit, old, new);
120
112
121
113
if (new == old)
122
114
dev_WARN(&ring->nhi->pdev->dev,
···
401
393
402
394
static void ring_clear_msix(const struct tb_ring *ring)
403
395
{
396
+
int bit;
397
+
404
398
if (ring->nhi->quirks & QUIRK_AUTO_CLEAR_INT)
405
399
return;
406
400
401
+
bit = ring_interrupt_index(ring) & 31;
407
402
if (ring->is_tx)
408
-
ioread32(ring->nhi->iobase + REG_RING_NOTIFY_BASE);
403
+
iowrite32(BIT(bit), ring->nhi->iobase + REG_RING_INT_CLEAR);
409
404
else
410
-
ioread32(ring->nhi->iobase + REG_RING_NOTIFY_BASE +
411
-
4 * (ring->nhi->hop_count / 32));
405
+
iowrite32(BIT(bit), ring->nhi->iobase + REG_RING_INT_CLEAR +
406
+
4 * (ring->nhi->hop_count / 32));
412
407
}
413
408
414
409
static irqreturn_t ring_msix(int irq, void *data)
+4
-2
drivers/thunderbolt/nhi_regs.h
+4
-2
drivers/thunderbolt/nhi_regs.h
···
77
77
78
78
/*
79
79
* three bitfields: tx, rx, rx overflow
80
-
* Every bitfield contains one bit for every hop (REG_HOP_COUNT). Registers are
81
-
* cleared on read. New interrupts are fired only after ALL registers have been
80
+
* Every bitfield contains one bit for every hop (REG_HOP_COUNT).
81
+
* New interrupts are fired only after ALL registers have been
82
82
* read (even those containing only disabled rings).
83
83
*/
84
84
#define REG_RING_NOTIFY_BASE 0x37800
85
85
#define RING_NOTIFY_REG_COUNT(nhi) ((31 + 3 * nhi->hop_count) / 32)
86
+
#define REG_RING_INT_CLEAR 0x37808
86
87
87
88
/*
88
89
* two bitfields: rx, tx
···
106
105
107
106
#define REG_DMA_MISC 0x39864
108
107
#define REG_DMA_MISC_INT_AUTO_CLEAR BIT(2)
108
+
#define REG_DMA_MISC_DISABLE_AUTO_CLEAR BIT(17)
109
109
110
110
#define REG_INMAIL_DATA 0x39900
111
111
+44
drivers/thunderbolt/quirks.c
+44
drivers/thunderbolt/quirks.c
···
20
20
}
21
21
}
22
22
23
+
static void quirk_clx_disable(struct tb_switch *sw)
24
+
{
25
+
sw->quirks |= QUIRK_NO_CLX;
26
+
tb_sw_dbg(sw, "disabling CL states\n");
27
+
}
28
+
29
+
static void quirk_usb3_maximum_bandwidth(struct tb_switch *sw)
30
+
{
31
+
struct tb_port *port;
32
+
33
+
tb_switch_for_each_port(sw, port) {
34
+
if (!tb_port_is_usb3_down(port))
35
+
continue;
36
+
port->max_bw = 16376;
37
+
tb_port_dbg(port, "USB3 maximum bandwidth limited to %u Mb/s\n",
38
+
port->max_bw);
39
+
}
40
+
}
41
+
23
42
struct tb_quirk {
24
43
u16 hw_vendor_id;
25
44
u16 hw_device_id;
···
56
37
* DP buffers.
57
38
*/
58
39
{ 0x8087, 0x0b26, 0x0000, 0x0000, quirk_dp_credit_allocation },
40
+
/*
41
+
* Limit the maximum USB3 bandwidth for the following Intel USB4
42
+
* host routers due to a hardware issue.
43
+
*/
44
+
{ 0x8087, PCI_DEVICE_ID_INTEL_ADL_NHI0, 0x0000, 0x0000,
45
+
quirk_usb3_maximum_bandwidth },
46
+
{ 0x8087, PCI_DEVICE_ID_INTEL_ADL_NHI1, 0x0000, 0x0000,
47
+
quirk_usb3_maximum_bandwidth },
48
+
{ 0x8087, PCI_DEVICE_ID_INTEL_RPL_NHI0, 0x0000, 0x0000,
49
+
quirk_usb3_maximum_bandwidth },
50
+
{ 0x8087, PCI_DEVICE_ID_INTEL_RPL_NHI1, 0x0000, 0x0000,
51
+
quirk_usb3_maximum_bandwidth },
52
+
{ 0x8087, PCI_DEVICE_ID_INTEL_MTL_M_NHI0, 0x0000, 0x0000,
53
+
quirk_usb3_maximum_bandwidth },
54
+
{ 0x8087, PCI_DEVICE_ID_INTEL_MTL_P_NHI0, 0x0000, 0x0000,
55
+
quirk_usb3_maximum_bandwidth },
56
+
{ 0x8087, PCI_DEVICE_ID_INTEL_MTL_P_NHI1, 0x0000, 0x0000,
57
+
quirk_usb3_maximum_bandwidth },
58
+
/*
59
+
* CLx is not supported on AMD USB4 Yellow Carp and Pink Sardine platforms.
60
+
*/
61
+
{ 0x0438, 0x0208, 0x0000, 0x0000, quirk_clx_disable },
62
+
{ 0x0438, 0x0209, 0x0000, 0x0000, quirk_clx_disable },
63
+
{ 0x0438, 0x020a, 0x0000, 0x0000, quirk_clx_disable },
64
+
{ 0x0438, 0x020b, 0x0000, 0x0000, quirk_clx_disable },
59
65
};
60
66
61
67
/**
+21
-2
drivers/thunderbolt/retimer.c
+21
-2
drivers/thunderbolt/retimer.c
···
187
187
return ret;
188
188
}
189
189
190
+
static void tb_retimer_set_inbound_sbtx(struct tb_port *port)
191
+
{
192
+
int i;
193
+
194
+
for (i = 1; i <= TB_MAX_RETIMER_INDEX; i++)
195
+
usb4_port_retimer_set_inbound_sbtx(port, i);
196
+
}
197
+
198
+
static void tb_retimer_unset_inbound_sbtx(struct tb_port *port)
199
+
{
200
+
int i;
201
+
202
+
for (i = TB_MAX_RETIMER_INDEX; i >= 1; i--)
203
+
usb4_port_retimer_unset_inbound_sbtx(port, i);
204
+
}
205
+
190
206
static ssize_t nvm_authenticate_store(struct device *dev,
191
207
struct device_attribute *attr, const char *buf, size_t count)
192
208
{
···
229
213
rt->auth_status = 0;
230
214
231
215
if (val) {
216
+
tb_retimer_set_inbound_sbtx(rt->port);
232
217
if (val == AUTHENTICATE_ONLY) {
233
218
ret = tb_retimer_nvm_authenticate(rt, true);
234
219
} else {
···
249
232
}
250
233
251
234
exit_unlock:
235
+
tb_retimer_unset_inbound_sbtx(rt->port);
252
236
mutex_unlock(&rt->tb->lock);
253
237
exit_rpm:
254
238
pm_runtime_mark_last_busy(&rt->dev);
···
458
440
* Enable sideband channel for each retimer. We can do this
459
441
* regardless whether there is device connected or not.
460
442
*/
461
-
for (i = 1; i <= TB_MAX_RETIMER_INDEX; i++)
462
-
usb4_port_retimer_set_inbound_sbtx(port, i);
443
+
tb_retimer_set_inbound_sbtx(port);
463
444
464
445
/*
465
446
* Before doing anything else, read the authentication status.
···
480
463
else if (ret < 0)
481
464
break;
482
465
}
466
+
467
+
tb_retimer_unset_inbound_sbtx(port);
483
468
484
469
if (!last_idx)
485
470
return 0;
+1
drivers/thunderbolt/sb_regs.h
+1
drivers/thunderbolt/sb_regs.h
···
20
20
USB4_SB_OPCODE_ROUTER_OFFLINE = 0x4e45534c, /* "LSEN" */
21
21
USB4_SB_OPCODE_ENUMERATE_RETIMERS = 0x4d554e45, /* "ENUM" */
22
22
USB4_SB_OPCODE_SET_INBOUND_SBTX = 0x5055534c, /* "LSUP" */
23
+
USB4_SB_OPCODE_UNSET_INBOUND_SBTX = 0x50555355, /* "USUP" */
23
24
USB4_SB_OPCODE_QUERY_LAST_RETIMER = 0x5453414c, /* "LAST" */
24
25
USB4_SB_OPCODE_GET_NVM_SECTOR_SIZE = 0x53534e47, /* "GNSS" */
25
26
USB4_SB_OPCODE_NVM_SET_OFFSET = 0x53504f42, /* "BOPS" */
+2
-2
drivers/thunderbolt/switch.c
+2
-2
drivers/thunderbolt/switch.c
···
2968
2968
dev_warn(&sw->dev, "reading DROM failed: %d\n", ret);
2969
2969
tb_sw_dbg(sw, "uid: %#llx\n", sw->uid);
2970
2970
2971
-
tb_check_quirks(sw);
2972
-
2973
2971
ret = tb_switch_set_uuid(sw);
2974
2972
if (ret) {
2975
2973
dev_err(&sw->dev, "failed to set UUID\n");
···
2985
2987
return ret;
2986
2988
}
2987
2989
}
2990
+
2991
+
tb_check_quirks(sw);
2988
2992
2989
2993
tb_switch_default_link_ports(sw);
2990
2994
+12
-3
drivers/thunderbolt/tb.h
+12
-3
drivers/thunderbolt/tb.h
···
23
23
#define NVM_MAX_SIZE SZ_512K
24
24
#define NVM_DATA_DWORDS 16
25
25
26
+
/* Keep link controller awake during update */
27
+
#define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0)
28
+
/* Disable CLx if not supported */
29
+
#define QUIRK_NO_CLX BIT(1)
30
+
26
31
/**
27
32
* struct tb_nvm - Structure holding NVM information
28
33
* @dev: Owner of the NVM
···
272
267
* @group: Bandwidth allocation group the adapter is assigned to. Only
273
268
* used for DP IN adapters for now.
274
269
* @group_list: The adapter is linked to the group's list of ports through this
270
+
* @max_bw: Maximum possible bandwidth through this adapter if set to
271
+
* non-zero.
275
272
*
276
273
* In USB4 terminology this structure represents an adapter (protocol or
277
274
* lane adapter).
···
301
294
unsigned int dma_credits;
302
295
struct tb_bandwidth_group *group;
303
296
struct list_head group_list;
297
+
unsigned int max_bw;
304
298
};
305
299
306
300
/**
···
1027
1019
*/
1028
1020
static inline bool tb_switch_is_clx_supported(const struct tb_switch *sw)
1029
1021
{
1022
+
if (sw->quirks & QUIRK_NO_CLX)
1023
+
return false;
1024
+
1030
1025
return tb_switch_is_usb4(sw) || tb_switch_is_titan_ridge(sw);
1031
1026
}
1032
1027
···
1245
1234
int usb4_port_sw_margin_errors(struct tb_port *port, u32 *errors);
1246
1235
1247
1236
int usb4_port_retimer_set_inbound_sbtx(struct tb_port *port, u8 index);
1237
+
int usb4_port_retimer_unset_inbound_sbtx(struct tb_port *port, u8 index);
1248
1238
int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1249
1239
u8 size);
1250
1240
int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
···
1302
1290
struct usb4_port *usb4_port_device_add(struct tb_port *port);
1303
1291
void usb4_port_device_remove(struct usb4_port *usb4);
1304
1292
int usb4_port_device_resume(struct usb4_port *usb4);
1305
-
1306
-
/* Keep link controller awake during update */
1307
-
#define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0)
1308
1293
1309
1294
void tb_check_quirks(struct tb_switch *sw);
1310
1295
+46
-7
drivers/thunderbolt/usb4.c
+46
-7
drivers/thunderbolt/usb4.c
···
1579
1579
}
1580
1580
1581
1581
/**
1582
+
* usb4_port_retimer_unset_inbound_sbtx() - Disable sideband channel transactions
1583
+
* @port: USB4 port
1584
+
* @index: Retimer index
1585
+
*
1586
+
* Disables sideband channel transations on SBTX. The reverse of
1587
+
* usb4_port_retimer_set_inbound_sbtx().
1588
+
*/
1589
+
int usb4_port_retimer_unset_inbound_sbtx(struct tb_port *port, u8 index)
1590
+
{
1591
+
return usb4_port_retimer_op(port, index,
1592
+
USB4_SB_OPCODE_UNSET_INBOUND_SBTX, 500);
1593
+
}
1594
+
1595
+
/**
1582
1596
* usb4_port_retimer_read() - Read from retimer sideband registers
1583
1597
* @port: USB4 port
1584
1598
* @index: Retimer index
···
1882
1868
usb4_port_retimer_nvm_read_block, &info);
1883
1869
}
1884
1870
1871
+
static inline unsigned int
1872
+
usb4_usb3_port_max_bandwidth(const struct tb_port *port, unsigned int bw)
1873
+
{
1874
+
/* Take the possible bandwidth limitation into account */
1875
+
if (port->max_bw)
1876
+
return min(bw, port->max_bw);
1877
+
return bw;
1878
+
}
1879
+
1885
1880
/**
1886
1881
* usb4_usb3_port_max_link_rate() - Maximum support USB3 link rate
1887
1882
* @port: USB3 adapter port
···
1912
1889
return ret;
1913
1890
1914
1891
lr = (val & ADP_USB3_CS_4_MSLR_MASK) >> ADP_USB3_CS_4_MSLR_SHIFT;
1915
-
return lr == ADP_USB3_CS_4_MSLR_20G ? 20000 : 10000;
1892
+
ret = lr == ADP_USB3_CS_4_MSLR_20G ? 20000 : 10000;
1893
+
1894
+
return usb4_usb3_port_max_bandwidth(port, ret);
1916
1895
}
1917
1896
1918
1897
/**
···
1941
1916
return 0;
1942
1917
1943
1918
lr = val & ADP_USB3_CS_4_ALR_MASK;
1944
-
return lr == ADP_USB3_CS_4_ALR_20G ? 20000 : 10000;
1919
+
ret = lr == ADP_USB3_CS_4_ALR_20G ? 20000 : 10000;
1920
+
1921
+
return usb4_usb3_port_max_bandwidth(port, ret);
1945
1922
}
1946
1923
1947
1924
static int usb4_usb3_port_cm_request(struct tb_port *port, bool request)
···
2094
2067
int downstream_bw)
2095
2068
{
2096
2069
u32 val, ubw, dbw, scale;
2097
-
int ret;
2070
+
int ret, max_bw;
2098
2071
2099
-
/* Read the used scale, hardware default is 0 */
2100
-
ret = tb_port_read(port, &scale, TB_CFG_PORT,
2101
-
port->cap_adap + ADP_USB3_CS_3, 1);
2072
+
/* Figure out suitable scale */
2073
+
scale = 0;
2074
+
max_bw = max(upstream_bw, downstream_bw);
2075
+
while (scale < 64) {
2076
+
if (mbps_to_usb3_bw(max_bw, scale) < 4096)
2077
+
break;
2078
+
scale++;
2079
+
}
2080
+
2081
+
if (WARN_ON(scale >= 64))
2082
+
return -EINVAL;
2083
+
2084
+
ret = tb_port_write(port, &scale, TB_CFG_PORT,
2085
+
port->cap_adap + ADP_USB3_CS_3, 1);
2102
2086
if (ret)
2103
2087
return ret;
2104
2088
2105
-
scale &= ADP_USB3_CS_3_SCALE_MASK;
2106
2089
ubw = mbps_to_usb3_bw(upstream_bw, scale);
2107
2090
dbw = mbps_to_usb3_bw(downstream_bw, scale);
2091
+
2092
+
tb_port_dbg(port, "scaled bandwidth %u/%u, scale %u\n", ubw, dbw, scale);
2108
2093
2109
2094
ret = tb_port_read(port, &val, TB_CFG_PORT,
2110
2095
port->cap_adap + ADP_USB3_CS_2, 1);
+17
-2
drivers/tty/hvc/hvc_xen.c
+17
-2
drivers/tty/hvc/hvc_xen.c
···
43
43
int irq;
44
44
int vtermno;
45
45
grant_ref_t gntref;
46
+
spinlock_t ring_lock;
46
47
};
47
48
48
49
static LIST_HEAD(xenconsoles);
···
90
89
XENCONS_RING_IDX cons, prod;
91
90
struct xencons_interface *intf = xencons->intf;
92
91
int sent = 0;
92
+
unsigned long flags;
93
93
94
+
spin_lock_irqsave(&xencons->ring_lock, flags);
94
95
cons = intf->out_cons;
95
96
prod = intf->out_prod;
96
97
mb(); /* update queue values before going on */
97
98
98
99
if ((prod - cons) > sizeof(intf->out)) {
100
+
spin_unlock_irqrestore(&xencons->ring_lock, flags);
99
101
pr_err_once("xencons: Illegal ring page indices");
100
102
return -EINVAL;
101
103
}
···
108
104
109
105
wmb(); /* write ring before updating pointer */
110
106
intf->out_prod = prod;
107
+
spin_unlock_irqrestore(&xencons->ring_lock, flags);
111
108
112
109
if (sent)
113
110
notify_daemon(xencons);
···
151
146
int recv = 0;
152
147
struct xencons_info *xencons = vtermno_to_xencons(vtermno);
153
148
unsigned int eoiflag = 0;
149
+
unsigned long flags;
154
150
155
151
if (xencons == NULL)
156
152
return -EINVAL;
157
153
intf = xencons->intf;
158
154
155
+
spin_lock_irqsave(&xencons->ring_lock, flags);
159
156
cons = intf->in_cons;
160
157
prod = intf->in_prod;
161
158
mb(); /* get pointers before reading ring */
162
159
163
160
if ((prod - cons) > sizeof(intf->in)) {
161
+
spin_unlock_irqrestore(&xencons->ring_lock, flags);
164
162
pr_err_once("xencons: Illegal ring page indices");
165
163
return -EINVAL;
166
164
}
···
187
179
xencons->out_cons = intf->out_cons;
188
180
xencons->out_cons_same = 0;
189
181
}
182
+
if (!recv && xencons->out_cons_same++ > 1) {
183
+
eoiflag = XEN_EOI_FLAG_SPURIOUS;
184
+
}
185
+
spin_unlock_irqrestore(&xencons->ring_lock, flags);
186
+
190
187
if (recv) {
191
188
notify_daemon(xencons);
192
-
} else if (xencons->out_cons_same++ > 1) {
193
-
eoiflag = XEN_EOI_FLAG_SPURIOUS;
194
189
}
195
190
196
191
xen_irq_lateeoi(xencons->irq, eoiflag);
···
250
239
info = kzalloc(sizeof(struct xencons_info), GFP_KERNEL);
251
240
if (!info)
252
241
return -ENOMEM;
242
+
spin_lock_init(&info->ring_lock);
253
243
} else if (info->intf != NULL) {
254
244
/* already configured */
255
245
return 0;
···
287
275
288
276
static int xencons_info_pv_init(struct xencons_info *info, int vtermno)
289
277
{
278
+
spin_lock_init(&info->ring_lock);
290
279
info->evtchn = xen_start_info->console.domU.evtchn;
291
280
/* GFN == MFN for PV guest */
292
281
info->intf = gfn_to_virt(xen_start_info->console.domU.mfn);
···
338
325
info = kzalloc(sizeof(struct xencons_info), GFP_KERNEL);
339
326
if (!info)
340
327
return -ENOMEM;
328
+
spin_lock_init(&info->ring_lock);
341
329
}
342
330
343
331
info->irq = bind_virq_to_irq(VIRQ_CONSOLE, 0, false);
···
496
482
info = kzalloc(sizeof(struct xencons_info), GFP_KERNEL);
497
483
if (!info)
498
484
return -ENOMEM;
485
+
spin_lock_init(&info->ring_lock);
499
486
dev_set_drvdata(&dev->dev, info);
500
487
info->xbdev = dev;
501
488
info->vtermno = xenbus_devid_to_vtermno(devid);
+5
drivers/usb/cdns3/cdns3-pci-wrap.c
+5
drivers/usb/cdns3/cdns3-pci-wrap.c
+1
-18
drivers/usb/cdns3/cdnsp-ep0.c
+1
-18
drivers/usb/cdns3/cdnsp-ep0.c
···
403
403
case USB_REQ_SET_ISOCH_DELAY:
404
404
ret = cdnsp_ep0_set_isoch_delay(pdev, ctrl);
405
405
break;
406
-
case USB_REQ_SET_INTERFACE:
407
-
/*
408
-
* Add request into pending list to block sending status stage
409
-
* by libcomposite.
410
-
*/
411
-
list_add_tail(&pdev->ep0_preq.list,
412
-
&pdev->ep0_preq.pep->pending_list);
413
-
414
-
ret = cdnsp_ep0_delegate_req(pdev, ctrl);
415
-
if (ret == -EBUSY)
416
-
ret = 0;
417
-
418
-
list_del(&pdev->ep0_preq.list);
419
-
break;
420
406
default:
421
407
ret = cdnsp_ep0_delegate_req(pdev, ctrl);
422
408
break;
···
460
474
else
461
475
ret = cdnsp_ep0_delegate_req(pdev, ctrl);
462
476
463
-
if (!len)
464
-
pdev->ep0_stage = CDNSP_STATUS_STAGE;
465
-
466
477
if (ret == USB_GADGET_DELAYED_STATUS) {
467
478
trace_cdnsp_ep0_status_stage("delayed");
468
479
return;
···
467
484
out:
468
485
if (ret < 0)
469
486
cdnsp_ep0_stall(pdev);
470
-
else if (pdev->ep0_stage == CDNSP_STATUS_STAGE)
487
+
else if (!len && pdev->ep0_stage != CDNSP_STATUS_STAGE)
471
488
cdnsp_status_stage(pdev);
472
489
}
+11
-16
drivers/usb/cdns3/cdnsp-pci.c
+11
-16
drivers/usb/cdns3/cdnsp-pci.c
···
29
29
#define PLAT_DRIVER_NAME "cdns-usbssp"
30
30
31
31
#define CDNS_VENDOR_ID 0x17cd
32
-
#define CDNS_DEVICE_ID 0x0100
32
+
#define CDNS_DEVICE_ID 0x0200
33
+
#define CDNS_DRD_ID 0x0100
33
34
#define CDNS_DRD_IF (PCI_CLASS_SERIAL_USB << 8 | 0x80)
34
35
35
36
static struct pci_dev *cdnsp_get_second_fun(struct pci_dev *pdev)
36
37
{
37
-
struct pci_dev *func;
38
-
39
38
/*
40
39
* Gets the second function.
41
-
* It's little tricky, but this platform has two function.
42
-
* The fist keeps resources for Host/Device while the second
43
-
* keeps resources for DRD/OTG.
40
+
* Platform has two function. The fist keeps resources for
41
+
* Host/Device while the secon keeps resources for DRD/OTG.
44
42
*/
45
-
func = pci_get_device(pdev->vendor, pdev->device, NULL);
46
-
if (!func)
47
-
return NULL;
43
+
if (pdev->device == CDNS_DEVICE_ID)
44
+
return pci_get_device(pdev->vendor, CDNS_DRD_ID, NULL);
45
+
else if (pdev->device == CDNS_DRD_ID)
46
+
return pci_get_device(pdev->vendor, CDNS_DEVICE_ID, NULL);
48
47
49
-
if (func->devfn == pdev->devfn) {
50
-
func = pci_get_device(pdev->vendor, pdev->device, func);
51
-
if (!func)
52
-
return NULL;
53
-
}
54
-
55
-
return func;
48
+
return NULL;
56
49
}
57
50
58
51
static int cdnsp_pci_probe(struct pci_dev *pdev,
···
222
229
{ PCI_VENDOR_ID_CDNS, CDNS_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,
223
230
PCI_CLASS_SERIAL_USB_DEVICE, PCI_ANY_ID },
224
231
{ PCI_VENDOR_ID_CDNS, CDNS_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,
232
+
CDNS_DRD_IF, PCI_ANY_ID },
233
+
{ PCI_VENDOR_ID_CDNS, CDNS_DRD_ID, PCI_ANY_ID, PCI_ANY_ID,
225
234
CDNS_DRD_IF, PCI_ANY_ID },
226
235
{ 0, }
227
236
};
+2
drivers/usb/chipidea/ci.h
+2
drivers/usb/chipidea/ci.h
···
208
208
* @in_lpm: if the core in low power mode
209
209
* @wakeup_int: if wakeup interrupt occur
210
210
* @rev: The revision number for controller
211
+
* @mutex: protect code from concorrent running when doing role switch
211
212
*/
212
213
struct ci_hdrc {
213
214
struct device *dev;
···
261
260
bool in_lpm;
262
261
bool wakeup_int;
263
262
enum ci_revision rev;
263
+
struct mutex mutex;
264
264
};
265
265
266
266
static inline struct ci_role_driver *ci_role(struct ci_hdrc *ci)
+10
-1
drivers/usb/chipidea/core.c
+10
-1
drivers/usb/chipidea/core.c
···
984
984
strlen(ci->roles[role]->name)))
985
985
break;
986
986
987
-
if (role == CI_ROLE_END || role == ci->role)
987
+
if (role == CI_ROLE_END)
988
988
return -EINVAL;
989
+
990
+
mutex_lock(&ci->mutex);
991
+
992
+
if (role == ci->role) {
993
+
mutex_unlock(&ci->mutex);
994
+
return n;
995
+
}
989
996
990
997
pm_runtime_get_sync(dev);
991
998
disable_irq(ci->irq);
···
1002
995
ci_handle_vbus_change(ci);
1003
996
enable_irq(ci->irq);
1004
997
pm_runtime_put_sync(dev);
998
+
mutex_unlock(&ci->mutex);
1005
999
1006
1000
return (ret == 0) ? n : ret;
1007
1001
}
···
1038
1030
return -ENOMEM;
1039
1031
1040
1032
spin_lock_init(&ci->lock);
1033
+
mutex_init(&ci->mutex);
1041
1034
ci->dev = dev;
1042
1035
ci->platdata = dev_get_platdata(dev);
1043
1036
ci->imx28_write_fix = !!(ci->platdata->flags &
+4
-1
drivers/usb/chipidea/otg.c
+4
-1
drivers/usb/chipidea/otg.c
···
167
167
168
168
void ci_handle_id_switch(struct ci_hdrc *ci)
169
169
{
170
-
enum ci_role role = ci_otg_role(ci);
170
+
enum ci_role role;
171
171
172
+
mutex_lock(&ci->mutex);
173
+
role = ci_otg_role(ci);
172
174
if (role != ci->role) {
173
175
dev_dbg(ci->dev, "switching from %s to %s\n",
174
176
ci_role(ci)->name, ci->roles[role]->name);
···
200
198
if (role == CI_ROLE_GADGET)
201
199
ci_handle_vbus_change(ci);
202
200
}
201
+
mutex_unlock(&ci->mutex);
203
202
}
204
203
/**
205
204
* ci_otg_work - perform otg (vbus/id) event handle
+2
-1
drivers/usb/dwc2/drd.c
+2
-1
drivers/usb/dwc2/drd.c
···
35
35
36
36
spin_unlock_irqrestore(&hsotg->lock, flags);
37
37
38
-
dwc2_force_mode(hsotg, (hsotg->dr_mode == USB_DR_MODE_HOST));
38
+
dwc2_force_mode(hsotg, (hsotg->dr_mode == USB_DR_MODE_HOST) ||
39
+
(hsotg->role_sw_default_mode == USB_DR_MODE_HOST));
39
40
}
40
41
41
42
static int dwc2_ovr_avalid(struct dwc2_hsotg *hsotg, bool valid)
+2
-4
drivers/usb/dwc2/gadget.c
+2
-4
drivers/usb/dwc2/gadget.c
···
4549
4549
hsotg->gadget.dev.of_node = hsotg->dev->of_node;
4550
4550
hsotg->gadget.speed = USB_SPEED_UNKNOWN;
4551
4551
4552
-
if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL ||
4553
-
(hsotg->dr_mode == USB_DR_MODE_OTG && dwc2_is_device_mode(hsotg))) {
4552
+
if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL) {
4554
4553
ret = dwc2_lowlevel_hw_enable(hsotg);
4555
4554
if (ret)
4556
4555
goto err;
···
4611
4612
if (!IS_ERR_OR_NULL(hsotg->uphy))
4612
4613
otg_set_peripheral(hsotg->uphy->otg, NULL);
4613
4614
4614
-
if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL ||
4615
-
(hsotg->dr_mode == USB_DR_MODE_OTG && dwc2_is_device_mode(hsotg)))
4615
+
if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
4616
4616
dwc2_lowlevel_hw_disable(hsotg);
4617
4617
4618
4618
return 0;
+3
-16
drivers/usb/dwc2/platform.c
+3
-16
drivers/usb/dwc2/platform.c
···
91
91
return 0;
92
92
}
93
93
94
-
static void __dwc2_disable_regulators(void *data)
95
-
{
96
-
struct dwc2_hsotg *hsotg = data;
97
-
98
-
regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies);
99
-
}
100
-
101
94
static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
102
95
{
103
96
struct platform_device *pdev = to_platform_device(hsotg->dev);
···
98
105
99
106
ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
100
107
hsotg->supplies);
101
-
if (ret)
102
-
return ret;
103
-
104
-
ret = devm_add_action_or_reset(&pdev->dev,
105
-
__dwc2_disable_regulators, hsotg);
106
108
if (ret)
107
109
return ret;
108
110
···
156
168
if (hsotg->clk)
157
169
clk_disable_unprepare(hsotg->clk);
158
170
159
-
return 0;
171
+
return regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies);
160
172
}
161
173
162
174
/**
···
564
576
dwc2_debugfs_init(hsotg);
565
577
566
578
/* Gadget code manages lowlevel hw on its own */
567
-
if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL ||
568
-
(hsotg->dr_mode == USB_DR_MODE_OTG && dwc2_is_device_mode(hsotg)))
579
+
if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
569
580
dwc2_lowlevel_hw_disable(hsotg);
570
581
571
582
#if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
···
595
608
if (hsotg->params.activate_stm_id_vb_detection)
596
609
regulator_disable(hsotg->usb33d);
597
610
error:
598
-
if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL)
611
+
if (hsotg->ll_hw_enabled)
599
612
dwc2_lowlevel_hw_disable(hsotg);
600
613
return retval;
601
614
}
+1
-1
drivers/usb/dwc3/core.h
+1
-1
drivers/usb/dwc3/core.h
···
1098
1098
* change quirk.
1099
1099
* @dis_tx_ipgap_linecheck_quirk: set if we disable u2mac linestate
1100
1100
* check during HS transmit.
1101
-
* @resume-hs-terminations: Set if we enable quirk for fixing improper crc
1101
+
* @resume_hs_terminations: Set if we enable quirk for fixing improper crc
1102
1102
* generation after resume from suspend.
1103
1103
* @parkmode_disable_ss_quirk: set if we need to disable all SuperSpeed
1104
1104
* instances in park mode.
+11
-3
drivers/usb/dwc3/gadget.c
+11
-3
drivers/usb/dwc3/gadget.c
···
1699
1699
*/
1700
1700
static int __dwc3_stop_active_transfer(struct dwc3_ep *dep, bool force, bool interrupt)
1701
1701
{
1702
+
struct dwc3 *dwc = dep->dwc;
1702
1703
struct dwc3_gadget_ep_cmd_params params;
1703
1704
u32 cmd;
1704
1705
int ret;
···
1723
1722
WARN_ON_ONCE(ret);
1724
1723
dep->resource_index = 0;
1725
1724
1726
-
if (!interrupt)
1725
+
if (!interrupt) {
1726
+
if (!DWC3_IP_IS(DWC3) || DWC3_VER_IS_PRIOR(DWC3, 310A))
1727
+
mdelay(1);
1727
1728
dep->flags &= ~DWC3_EP_TRANSFER_STARTED;
1728
-
else if (!ret)
1729
+
} else if (!ret) {
1729
1730
dep->flags |= DWC3_EP_END_TRANSFER_PENDING;
1731
+
}
1730
1732
1731
1733
dep->flags &= ~DWC3_EP_DELAY_STOP;
1732
1734
return ret;
···
3778
3774
* enabled, the EndTransfer command will have completed upon
3779
3775
* returning from this function.
3780
3776
*
3781
-
* This mode is NOT available on the DWC_usb31 IP.
3777
+
* This mode is NOT available on the DWC_usb31 IP. In this
3778
+
* case, if the IOC bit is not set, then delay by 1ms
3779
+
* after issuing the EndTransfer command. This allows for the
3780
+
* controller to handle the command completely before DWC3
3781
+
* remove requests attempts to unmap USB request buffers.
3782
3782
*/
3783
3783
3784
3784
__dwc3_stop_active_transfer(dep, force, interrupt);
+3
-4
drivers/usb/gadget/composite.c
+3
-4
drivers/usb/gadget/composite.c
···
2079
2079
sizeof(url_descriptor->URL)
2080
2080
- WEBUSB_URL_DESCRIPTOR_HEADER_LENGTH + landing_page_offset);
2081
2081
2082
-
if (ctrl->wLength < WEBUSB_URL_DESCRIPTOR_HEADER_LENGTH
2083
-
+ landing_page_length)
2084
-
landing_page_length = ctrl->wLength
2085
-
- WEBUSB_URL_DESCRIPTOR_HEADER_LENGTH + landing_page_offset;
2082
+
if (w_length < WEBUSB_URL_DESCRIPTOR_HEADER_LENGTH + landing_page_length)
2083
+
landing_page_length = w_length
2084
+
- WEBUSB_URL_DESCRIPTOR_HEADER_LENGTH + landing_page_offset;
2086
2085
2087
2086
memcpy(url_descriptor->URL,
2088
2087
cdev->landing_page + landing_page_offset,
+1
-1
drivers/usb/gadget/function/u_audio.c
+1
-1
drivers/usb/gadget/function/u_audio.c
+1
drivers/usb/misc/onboard_usb_hub.c
+1
drivers/usb/misc/onboard_usb_hub.c
···
410
410
{ USB_DEVICE(VENDOR_ID_GENESYS, 0x0608) }, /* Genesys Logic GL850G USB 2.0 */
411
411
{ USB_DEVICE(VENDOR_ID_GENESYS, 0x0610) }, /* Genesys Logic GL852G USB 2.0 */
412
412
{ USB_DEVICE(VENDOR_ID_MICROCHIP, 0x2514) }, /* USB2514B USB 2.0 */
413
+
{ USB_DEVICE(VENDOR_ID_MICROCHIP, 0x2517) }, /* USB2517 USB 2.0 */
413
414
{ USB_DEVICE(VENDOR_ID_REALTEK, 0x0411) }, /* RTS5411 USB 3.1 */
414
415
{ USB_DEVICE(VENDOR_ID_REALTEK, 0x5411) }, /* RTS5411 USB 2.1 */
415
416
{ USB_DEVICE(VENDOR_ID_REALTEK, 0x0414) }, /* RTS5414 USB 3.2 */
+1
drivers/usb/misc/onboard_usb_hub.h
+1
drivers/usb/misc/onboard_usb_hub.h
···
36
36
37
37
static const struct of_device_id onboard_hub_match[] = {
38
38
{ .compatible = "usb424,2514", .data = µchip_usb424_data, },
39
+
{ .compatible = "usb424,2517", .data = µchip_usb424_data, },
39
40
{ .compatible = "usb451,8140", .data = &ti_tusb8041_data, },
40
41
{ .compatible = "usb451,8142", .data = &ti_tusb8041_data, },
41
42
{ .compatible = "usb5e3,608", .data = &genesys_gl850g_data, },
+7
drivers/usb/storage/unusual_uas.h
+7
drivers/usb/storage/unusual_uas.h
···
111
111
USB_SC_DEVICE, USB_PR_DEVICE, NULL,
112
112
US_FL_BROKEN_FUA),
113
113
114
+
/* Reported by: Yaroslav Furman <yaro330@gmail.com> */
115
+
UNUSUAL_DEV(0x152d, 0x0583, 0x0000, 0x9999,
116
+
"JMicron",
117
+
"JMS583Gen 2",
118
+
USB_SC_DEVICE, USB_PR_DEVICE, NULL,
119
+
US_FL_NO_REPORT_OPCODES),
120
+
114
121
/* Reported-by: Thinh Nguyen <thinhn@synopsys.com> */
115
122
UNUSUAL_DEV(0x154b, 0xf00b, 0x0000, 0x9999,
116
123
"PNY",
+24
-4
drivers/usb/typec/tcpm/tcpm.c
+24
-4
drivers/usb/typec/tcpm/tcpm.c
···
1445
1445
static void tcpm_queue_vdm(struct tcpm_port *port, const u32 header,
1446
1446
const u32 *data, int cnt)
1447
1447
{
1448
+
u32 vdo_hdr = port->vdo_data[0];
1449
+
1448
1450
WARN_ON(!mutex_is_locked(&port->lock));
1449
1451
1450
-
/* Make sure we are not still processing a previous VDM packet */
1451
-
WARN_ON(port->vdm_state > VDM_STATE_DONE);
1452
+
/* If is sending discover_identity, handle received message first */
1453
+
if (PD_VDO_SVDM(vdo_hdr) && PD_VDO_CMD(vdo_hdr) == CMD_DISCOVER_IDENT) {
1454
+
port->send_discover = true;
1455
+
mod_send_discover_delayed_work(port, SEND_DISCOVER_RETRY_MS);
1456
+
} else {
1457
+
/* Make sure we are not still processing a previous VDM packet */
1458
+
WARN_ON(port->vdm_state > VDM_STATE_DONE);
1459
+
}
1452
1460
1453
1461
port->vdo_count = cnt + 1;
1454
1462
port->vdo_data[0] = header;
···
1956
1948
switch (PD_VDO_CMD(vdo_hdr)) {
1957
1949
case CMD_DISCOVER_IDENT:
1958
1950
res = tcpm_ams_start(port, DISCOVER_IDENTITY);
1959
-
if (res == 0)
1951
+
if (res == 0) {
1960
1952
port->send_discover = false;
1961
-
else if (res == -EAGAIN)
1953
+
} else if (res == -EAGAIN) {
1954
+
port->vdo_data[0] = 0;
1962
1955
mod_send_discover_delayed_work(port,
1963
1956
SEND_DISCOVER_RETRY_MS);
1957
+
}
1964
1958
break;
1965
1959
case CMD_DISCOVER_SVID:
1966
1960
res = tcpm_ams_start(port, DISCOVER_SVIDS);
···
2045
2035
unsigned long timeout;
2046
2036
2047
2037
port->vdm_retries = 0;
2038
+
port->vdo_data[0] = 0;
2048
2039
port->vdm_state = VDM_STATE_BUSY;
2049
2040
timeout = vdm_ready_timeout(vdo_hdr);
2050
2041
mod_vdm_delayed_work(port, timeout);
···
4581
4570
case SOFT_RESET:
4582
4571
port->message_id = 0;
4583
4572
port->rx_msgid = -1;
4573
+
/* remove existing capabilities */
4574
+
usb_power_delivery_unregister_capabilities(port->partner_source_caps);
4575
+
port->partner_source_caps = NULL;
4584
4576
tcpm_pd_send_control(port, PD_CTRL_ACCEPT);
4585
4577
tcpm_ams_finish(port);
4586
4578
if (port->pwr_role == TYPEC_SOURCE) {
···
4603
4589
case SOFT_RESET_SEND:
4604
4590
port->message_id = 0;
4605
4591
port->rx_msgid = -1;
4592
+
/* remove existing capabilities */
4593
+
usb_power_delivery_unregister_capabilities(port->partner_source_caps);
4594
+
port->partner_source_caps = NULL;
4606
4595
if (tcpm_pd_send_control(port, PD_CTRL_SOFT_RESET))
4607
4596
tcpm_set_state_cond(port, hard_reset_state(port), 0);
4608
4597
else
···
4735
4718
tcpm_set_state(port, SNK_STARTUP, 0);
4736
4719
break;
4737
4720
case PR_SWAP_SNK_SRC_SINK_OFF:
4721
+
/* will be source, remove existing capabilities */
4722
+
usb_power_delivery_unregister_capabilities(port->partner_source_caps);
4723
+
port->partner_source_caps = NULL;
4738
4724
/*
4739
4725
* Prevent vbus discharge circuit from turning on during PR_SWAP
4740
4726
* as this is not a disconnect.
+15
-18
drivers/usb/typec/ucsi/ucsi.c
+15
-18
drivers/usb/typec/ucsi/ucsi.c
···
1125
1125
return NULL;
1126
1126
}
1127
1127
1128
-
static int ucsi_register_port(struct ucsi *ucsi, int index)
1128
+
static int ucsi_register_port(struct ucsi *ucsi, struct ucsi_connector *con)
1129
1129
{
1130
1130
struct usb_power_delivery_desc desc = { ucsi->cap.pd_version};
1131
1131
struct usb_power_delivery_capabilities_desc pd_caps;
1132
1132
struct usb_power_delivery_capabilities *pd_cap;
1133
-
struct ucsi_connector *con = &ucsi->connector[index];
1134
1133
struct typec_capability *cap = &con->typec_cap;
1135
1134
enum typec_accessory *accessory = cap->accessory;
1136
1135
enum usb_role u_role = USB_ROLE_NONE;
···
1150
1151
init_completion(&con->complete);
1151
1152
mutex_init(&con->lock);
1152
1153
INIT_LIST_HEAD(&con->partner_tasks);
1153
-
con->num = index + 1;
1154
1154
con->ucsi = ucsi;
1155
1155
1156
1156
cap->fwnode = ucsi_find_fwnode(con);
···
1326
1328
*/
1327
1329
static int ucsi_init(struct ucsi *ucsi)
1328
1330
{
1329
-
struct ucsi_connector *con;
1330
-
u64 command;
1331
+
struct ucsi_connector *con, *connector;
1332
+
u64 command, ntfy;
1331
1333
int ret;
1332
1334
int i;
1333
1335
···
1339
1341
}
1340
1342
1341
1343
/* Enable basic notifications */
1342
-
ucsi->ntfy = UCSI_ENABLE_NTFY_CMD_COMPLETE | UCSI_ENABLE_NTFY_ERROR;
1343
-
command = UCSI_SET_NOTIFICATION_ENABLE | ucsi->ntfy;
1344
+
ntfy = UCSI_ENABLE_NTFY_CMD_COMPLETE | UCSI_ENABLE_NTFY_ERROR;
1345
+
command = UCSI_SET_NOTIFICATION_ENABLE | ntfy;
1344
1346
ret = ucsi_send_command(ucsi, command, NULL, 0);
1345
1347
if (ret < 0)
1346
1348
goto err_reset;
···
1357
1359
}
1358
1360
1359
1361
/* Allocate the connectors. Released in ucsi_unregister() */
1360
-
ucsi->connector = kcalloc(ucsi->cap.num_connectors + 1,
1361
-
sizeof(*ucsi->connector), GFP_KERNEL);
1362
-
if (!ucsi->connector) {
1362
+
connector = kcalloc(ucsi->cap.num_connectors + 1, sizeof(*connector), GFP_KERNEL);
1363
+
if (!connector) {
1363
1364
ret = -ENOMEM;
1364
1365
goto err_reset;
1365
1366
}
1366
1367
1367
1368
/* Register all connectors */
1368
1369
for (i = 0; i < ucsi->cap.num_connectors; i++) {
1369
-
ret = ucsi_register_port(ucsi, i);
1370
+
connector[i].num = i + 1;
1371
+
ret = ucsi_register_port(ucsi, &connector[i]);
1370
1372
if (ret)
1371
1373
goto err_unregister;
1372
1374
}
1373
1375
1374
1376
/* Enable all notifications */
1375
-
ucsi->ntfy = UCSI_ENABLE_NTFY_ALL;
1376
-
command = UCSI_SET_NOTIFICATION_ENABLE | ucsi->ntfy;
1377
+
ntfy = UCSI_ENABLE_NTFY_ALL;
1378
+
command = UCSI_SET_NOTIFICATION_ENABLE | ntfy;
1377
1379
ret = ucsi_send_command(ucsi, command, NULL, 0);
1378
1380
if (ret < 0)
1379
1381
goto err_unregister;
1380
1382
1383
+
ucsi->connector = connector;
1384
+
ucsi->ntfy = ntfy;
1381
1385
return 0;
1382
1386
1383
1387
err_unregister:
1384
-
for (con = ucsi->connector; con->port; con++) {
1388
+
for (con = connector; con->port; con++) {
1385
1389
ucsi_unregister_partner(con);
1386
1390
ucsi_unregister_altmodes(con, UCSI_RECIPIENT_CON);
1387
1391
ucsi_unregister_port_psy(con);
···
1399
1399
typec_unregister_port(con->port);
1400
1400
con->port = NULL;
1401
1401
}
1402
-
1403
-
kfree(ucsi->connector);
1404
-
ucsi->connector = NULL;
1405
-
1402
+
kfree(connector);
1406
1403
err_reset:
1407
1404
memset(&ucsi->cap, 0, sizeof(ucsi->cap));
1408
1405
ucsi_reset_ppm(ucsi);
+1
-1
drivers/usb/typec/ucsi/ucsi_acpi.c
+1
-1
drivers/usb/typec/ucsi/ucsi_acpi.c
+35
-2
fs/cifs/cached_dir.c
+35
-2
fs/cifs/cached_dir.c
···
99
99
return dentry;
100
100
}
101
101
102
+
static const char *path_no_prefix(struct cifs_sb_info *cifs_sb,
103
+
const char *path)
104
+
{
105
+
size_t len = 0;
106
+
107
+
if (!*path)
108
+
return path;
109
+
110
+
if ((cifs_sb->mnt_cifs_flags & CIFS_MOUNT_USE_PREFIX_PATH) &&
111
+
cifs_sb->prepath) {
112
+
len = strlen(cifs_sb->prepath) + 1;
113
+
if (unlikely(len > strlen(path)))
114
+
return ERR_PTR(-EINVAL);
115
+
}
116
+
return path + len;
117
+
}
118
+
102
119
/*
103
120
* Open the and cache a directory handle.
104
121
* If error then *cfid is not initialized.
···
142
125
struct dentry *dentry = NULL;
143
126
struct cached_fid *cfid;
144
127
struct cached_fids *cfids;
128
+
const char *npath;
145
129
146
130
if (tcon == NULL || tcon->cfids == NULL || tcon->nohandlecache ||
147
131
is_smb1_server(tcon->ses->server))
···
179
161
}
180
162
181
163
/*
164
+
* Skip any prefix paths in @path as lookup_positive_unlocked() ends up
165
+
* calling ->lookup() which already adds those through
166
+
* build_path_from_dentry(). Also, do it earlier as we might reconnect
167
+
* below when trying to send compounded request and then potentially
168
+
* having a different prefix path (e.g. after DFS failover).
169
+
*/
170
+
npath = path_no_prefix(cifs_sb, path);
171
+
if (IS_ERR(npath)) {
172
+
rc = PTR_ERR(npath);
173
+
kfree(utf16_path);
174
+
return rc;
175
+
}
176
+
177
+
/*
182
178
* We do not hold the lock for the open because in case
183
179
* SMB2_open needs to reconnect.
184
180
* This is safe because no other thread will be able to get a ref
···
216
184
217
185
oparms = (struct cifs_open_parms) {
218
186
.tcon = tcon,
187
+
.path = path,
219
188
.create_options = cifs_create_options(cifs_sb, CREATE_NOT_FILE),
220
189
.desired_access = FILE_READ_ATTRIBUTES,
221
190
.disposition = FILE_OPEN,
···
284
251
(char *)&cfid->file_all_info))
285
252
cfid->file_all_info_is_valid = true;
286
253
287
-
if (!path[0])
254
+
if (!npath[0])
288
255
dentry = dget(cifs_sb->root);
289
256
else {
290
-
dentry = path_to_dentry(cifs_sb, path);
257
+
dentry = path_to_dentry(cifs_sb, npath);
291
258
if (IS_ERR(dentry)) {
292
259
rc = -ENOENT;
293
260
goto oshr_free;
+30
-16
fs/cifs/cifs_debug.c
+30
-16
fs/cifs/cifs_debug.c
···
176
176
177
177
seq_puts(m, "# Version:1\n");
178
178
seq_puts(m, "# Format:\n");
179
-
seq_puts(m, "# <tree id> <persistent fid> <flags> <count> <pid> <uid>");
179
+
seq_puts(m, "# <tree id> <ses id> <persistent fid> <flags> <count> <pid> <uid>");
180
180
#ifdef CONFIG_CIFS_DEBUG2
181
181
seq_printf(m, " <filename> <mid>\n");
182
182
#else
···
189
189
spin_lock(&tcon->open_file_lock);
190
190
list_for_each_entry(cfile, &tcon->openFileList, tlist) {
191
191
seq_printf(m,
192
-
"0x%x 0x%llx 0x%x %d %d %d %pd",
192
+
"0x%x 0x%llx 0x%llx 0x%x %d %d %d %pd",
193
193
tcon->tid,
194
+
ses->Suid,
194
195
cfile->fid.persistent_fid,
195
196
cfile->f_flags,
196
197
cfile->count,
···
217
216
{
218
217
struct mid_q_entry *mid_entry;
219
218
struct TCP_Server_Info *server;
219
+
struct TCP_Server_Info *chan_server;
220
220
struct cifs_ses *ses;
221
221
struct cifs_tcon *tcon;
222
222
struct cifs_server_iface *iface;
···
476
474
seq_puts(m, "\t\t[CONNECTED]\n");
477
475
}
478
476
spin_unlock(&ses->iface_lock);
477
+
478
+
seq_puts(m, "\n\n\tMIDs: ");
479
+
spin_lock(&ses->chan_lock);
480
+
for (j = 0; j < ses->chan_count; j++) {
481
+
chan_server = ses->chans[j].server;
482
+
if (!chan_server)
483
+
continue;
484
+
485
+
if (list_empty(&chan_server->pending_mid_q))
486
+
continue;
487
+
488
+
seq_printf(m, "\n\tServer ConnectionId: 0x%llx",
489
+
chan_server->conn_id);
490
+
spin_lock(&chan_server->mid_lock);
491
+
list_for_each_entry(mid_entry, &chan_server->pending_mid_q, qhead) {
492
+
seq_printf(m, "\n\t\tState: %d com: %d pid: %d cbdata: %p mid %llu",
493
+
mid_entry->mid_state,
494
+
le16_to_cpu(mid_entry->command),
495
+
mid_entry->pid,
496
+
mid_entry->callback_data,
497
+
mid_entry->mid);
498
+
}
499
+
spin_unlock(&chan_server->mid_lock);
500
+
}
501
+
spin_unlock(&ses->chan_lock);
502
+
seq_puts(m, "\n--\n");
479
503
}
480
504
if (i == 0)
481
505
seq_printf(m, "\n\t\t[NONE]");
482
-
483
-
seq_puts(m, "\n\n\tMIDs: ");
484
-
spin_lock(&server->mid_lock);
485
-
list_for_each_entry(mid_entry, &server->pending_mid_q, qhead) {
486
-
seq_printf(m, "\n\tState: %d com: %d pid:"
487
-
" %d cbdata: %p mid %llu\n",
488
-
mid_entry->mid_state,
489
-
le16_to_cpu(mid_entry->command),
490
-
mid_entry->pid,
491
-
mid_entry->callback_data,
492
-
mid_entry->mid);
493
-
}
494
-
spin_unlock(&server->mid_lock);
495
-
seq_printf(m, "\n--\n");
496
506
}
497
507
if (c == 0)
498
508
seq_printf(m, "\n\t[NONE]");
+6
-3
fs/cifs/cifsfs.c
+6
-3
fs/cifs/cifsfs.c
···
731
731
spin_lock(&tcon->tc_lock);
732
732
if ((tcon->tc_count > 1) || (tcon->status == TID_EXITING)) {
733
733
/* we have other mounts to same share or we have
734
-
already tried to force umount this and woken up
734
+
already tried to umount this and woken up
735
735
all waiting network requests, nothing to do */
736
736
spin_unlock(&tcon->tc_lock);
737
737
spin_unlock(&cifs_tcp_ses_lock);
738
738
return;
739
-
} else if (tcon->tc_count == 1)
740
-
tcon->status = TID_EXITING;
739
+
}
740
+
/*
741
+
* can not set tcon->status to TID_EXITING yet since we don't know if umount -f will
742
+
* fail later (e.g. due to open files). TID_EXITING will be set just before tdis req sent
743
+
*/
741
744
spin_unlock(&tcon->tc_lock);
742
745
spin_unlock(&cifs_tcp_ses_lock);
743
746
+2
-4
fs/cifs/cifssmb.c
+2
-4
fs/cifs/cifssmb.c
···
86
86
87
87
/*
88
88
* only tree disconnect, open, and write, (and ulogoff which does not
89
-
* have tcon) are allowed as we start force umount
89
+
* have tcon) are allowed as we start umount
90
90
*/
91
91
spin_lock(&tcon->tc_lock);
92
92
if (tcon->status == TID_EXITING) {
93
-
if (smb_command != SMB_COM_WRITE_ANDX &&
94
-
smb_command != SMB_COM_OPEN_ANDX &&
95
-
smb_command != SMB_COM_TREE_DISCONNECT) {
93
+
if (smb_command != SMB_COM_TREE_DISCONNECT) {
96
94
spin_unlock(&tcon->tc_lock);
97
95
cifs_dbg(FYI, "can not send cmd %d while umounting\n",
98
96
smb_command);
+52
-22
fs/cifs/connect.c
+52
-22
fs/cifs/connect.c
···
212
212
cifs_chan_update_iface(ses, server);
213
213
214
214
spin_lock(&ses->chan_lock);
215
-
if (!mark_smb_session && cifs_chan_needs_reconnect(ses, server))
216
-
goto next_session;
215
+
if (!mark_smb_session && cifs_chan_needs_reconnect(ses, server)) {
216
+
spin_unlock(&ses->chan_lock);
217
+
continue;
218
+
}
217
219
218
220
if (mark_smb_session)
219
221
CIFS_SET_ALL_CHANS_NEED_RECONNECT(ses);
220
222
else
221
223
cifs_chan_set_need_reconnect(ses, server);
222
224
223
-
/* If all channels need reconnect, then tcon needs reconnect */
224
-
if (!mark_smb_session && !CIFS_ALL_CHANS_NEED_RECONNECT(ses))
225
-
goto next_session;
225
+
cifs_dbg(FYI, "%s: channel connect bitmap: 0x%lx\n",
226
+
__func__, ses->chans_need_reconnect);
226
227
228
+
/* If all channels need reconnect, then tcon needs reconnect */
229
+
if (!mark_smb_session && !CIFS_ALL_CHANS_NEED_RECONNECT(ses)) {
230
+
spin_unlock(&ses->chan_lock);
231
+
continue;
232
+
}
233
+
spin_unlock(&ses->chan_lock);
234
+
235
+
spin_lock(&ses->ses_lock);
227
236
ses->ses_status = SES_NEED_RECON;
237
+
spin_unlock(&ses->ses_lock);
228
238
229
239
list_for_each_entry(tcon, &ses->tcon_list, tcon_list) {
230
240
tcon->need_reconnect = true;
241
+
spin_lock(&tcon->tc_lock);
231
242
tcon->status = TID_NEED_RECON;
243
+
spin_unlock(&tcon->tc_lock);
232
244
}
233
245
if (ses->tcon_ipc) {
234
246
ses->tcon_ipc->need_reconnect = true;
247
+
spin_lock(&ses->tcon_ipc->tc_lock);
235
248
ses->tcon_ipc->status = TID_NEED_RECON;
249
+
spin_unlock(&ses->tcon_ipc->tc_lock);
236
250
}
237
-
238
-
next_session:
239
-
spin_unlock(&ses->chan_lock);
240
251
}
241
252
spin_unlock(&cifs_tcp_ses_lock);
242
253
}
···
1732
1721
return ERR_PTR(rc);
1733
1722
}
1734
1723
1735
-
/* this function must be called with ses_lock held */
1724
+
/* this function must be called with ses_lock and chan_lock held */
1736
1725
static int match_session(struct cifs_ses *ses, struct smb3_fs_context *ctx)
1737
1726
{
1738
1727
if (ctx->sectype != Unspecified &&
···
1743
1732
* If an existing session is limited to less channels than
1744
1733
* requested, it should not be reused
1745
1734
*/
1746
-
spin_lock(&ses->chan_lock);
1747
-
if (ses->chan_max < ctx->max_channels) {
1748
-
spin_unlock(&ses->chan_lock);
1735
+
if (ses->chan_max < ctx->max_channels)
1749
1736
return 0;
1750
-
}
1751
-
spin_unlock(&ses->chan_lock);
1752
1737
1753
1738
switch (ses->sectype) {
1754
1739
case Kerberos:
···
1872
1865
spin_unlock(&ses->ses_lock);
1873
1866
continue;
1874
1867
}
1868
+
spin_lock(&ses->chan_lock);
1875
1869
if (!match_session(ses, ctx)) {
1870
+
spin_unlock(&ses->chan_lock);
1876
1871
spin_unlock(&ses->ses_lock);
1877
1872
continue;
1878
1873
}
1874
+
spin_unlock(&ses->chan_lock);
1879
1875
spin_unlock(&ses->ses_lock);
1880
1876
1881
1877
++ses->ses_count;
···
2324
2314
WARN_ON(tcon->tc_count < 0);
2325
2315
2326
2316
list_del_init(&tcon->tcon_list);
2317
+
tcon->status = TID_EXITING;
2327
2318
spin_unlock(&tcon->tc_lock);
2328
2319
spin_unlock(&cifs_tcp_ses_lock);
2329
2320
···
2704
2693
2705
2694
spin_lock(&tcp_srv->srv_lock);
2706
2695
spin_lock(&ses->ses_lock);
2696
+
spin_lock(&ses->chan_lock);
2707
2697
spin_lock(&tcon->tc_lock);
2708
2698
if (!match_server(tcp_srv, ctx, dfs_super_cmp) ||
2709
2699
!match_session(ses, ctx) ||
···
2717
2705
rc = compare_mount_options(sb, mnt_data);
2718
2706
out:
2719
2707
spin_unlock(&tcon->tc_lock);
2708
+
spin_unlock(&ses->chan_lock);
2720
2709
spin_unlock(&ses->ses_lock);
2721
2710
spin_unlock(&tcp_srv->srv_lock);
2722
2711
···
3665
3652
3666
3653
/* only send once per connect */
3667
3654
spin_lock(&server->srv_lock);
3668
-
if (!server->ops->need_neg(server) ||
3655
+
if (server->tcpStatus != CifsGood &&
3656
+
server->tcpStatus != CifsNew &&
3669
3657
server->tcpStatus != CifsNeedNegotiate) {
3658
+
spin_unlock(&server->srv_lock);
3659
+
return -EHOSTDOWN;
3660
+
}
3661
+
3662
+
if (!server->ops->need_neg(server) &&
3663
+
server->tcpStatus == CifsGood) {
3670
3664
spin_unlock(&server->srv_lock);
3671
3665
return 0;
3672
3666
}
3667
+
3673
3668
server->tcpStatus = CifsInNegotiate;
3674
3669
spin_unlock(&server->srv_lock);
3675
3670
···
3711
3690
bool is_binding = false;
3712
3691
3713
3692
spin_lock(&ses->ses_lock);
3693
+
cifs_dbg(FYI, "%s: channel connect bitmap: 0x%lx\n",
3694
+
__func__, ses->chans_need_reconnect);
3695
+
3714
3696
if (ses->ses_status != SES_GOOD &&
3715
3697
ses->ses_status != SES_NEW &&
3716
3698
ses->ses_status != SES_NEED_RECON) {
3717
3699
spin_unlock(&ses->ses_lock);
3718
-
return 0;
3700
+
return -EHOSTDOWN;
3719
3701
}
3720
3702
3721
3703
/* only send once per connect */
3722
3704
spin_lock(&ses->chan_lock);
3723
-
if (CIFS_ALL_CHANS_GOOD(ses) ||
3724
-
cifs_chan_in_reconnect(ses, server)) {
3705
+
if (CIFS_ALL_CHANS_GOOD(ses)) {
3706
+
if (ses->ses_status == SES_NEED_RECON)
3707
+
ses->ses_status = SES_GOOD;
3725
3708
spin_unlock(&ses->chan_lock);
3726
3709
spin_unlock(&ses->ses_lock);
3727
3710
return 0;
3728
3711
}
3729
-
is_binding = !CIFS_ALL_CHANS_NEED_RECONNECT(ses);
3712
+
3730
3713
cifs_chan_set_in_reconnect(ses, server);
3714
+
is_binding = !CIFS_ALL_CHANS_NEED_RECONNECT(ses);
3731
3715
spin_unlock(&ses->chan_lock);
3732
3716
3733
3717
if (!is_binding)
···
4062
4036
4063
4037
/* only send once per connect */
4064
4038
spin_lock(&tcon->tc_lock);
4065
-
if (tcon->ses->ses_status != SES_GOOD ||
4066
-
(tcon->status != TID_NEW &&
4067
-
tcon->status != TID_NEED_TCON)) {
4039
+
if (tcon->status != TID_NEW &&
4040
+
tcon->status != TID_NEED_TCON) {
4041
+
spin_unlock(&tcon->tc_lock);
4042
+
return -EHOSTDOWN;
4043
+
}
4044
+
4045
+
if (tcon->status == TID_GOOD) {
4068
4046
spin_unlock(&tcon->tc_lock);
4069
4047
return 0;
4070
4048
}
+7
-3
fs/cifs/dfs.c
+7
-3
fs/cifs/dfs.c
···
502
502
503
503
/* only send once per connect */
504
504
spin_lock(&tcon->tc_lock);
505
-
if (tcon->ses->ses_status != SES_GOOD ||
506
-
(tcon->status != TID_NEW &&
507
-
tcon->status != TID_NEED_TCON)) {
505
+
if (tcon->status != TID_NEW &&
506
+
tcon->status != TID_NEED_TCON) {
507
+
spin_unlock(&tcon->tc_lock);
508
+
return -EHOSTDOWN;
509
+
}
510
+
511
+
if (tcon->status == TID_GOOD) {
508
512
spin_unlock(&tcon->tc_lock);
509
513
return 0;
510
514
}
+1
-1
fs/cifs/dfs_cache.c
+1
-1
fs/cifs/dfs_cache.c
···
1191
1191
}
1192
1192
1193
1193
spin_lock(&ipc->tc_lock);
1194
-
if (ses->ses_status != SES_GOOD || ipc->status != TID_GOOD) {
1194
+
if (ipc->status != TID_GOOD) {
1195
1195
spin_unlock(&ipc->tc_lock);
1196
1196
cifs_dbg(FYI, "%s: skip cache refresh due to disconnected ipc\n", __func__);
1197
1197
goto out;
+4
-4
fs/cifs/file.c
+4
-4
fs/cifs/file.c
···
174
174
struct list_head *tmp1;
175
175
176
176
/* only send once per connect */
177
-
spin_lock(&tcon->ses->ses_lock);
178
-
if ((tcon->ses->ses_status != SES_GOOD) || (tcon->status != TID_NEED_RECON)) {
179
-
spin_unlock(&tcon->ses->ses_lock);
177
+
spin_lock(&tcon->tc_lock);
178
+
if (tcon->status != TID_NEED_RECON) {
179
+
spin_unlock(&tcon->tc_lock);
180
180
return;
181
181
}
182
182
tcon->status = TID_IN_FILES_INVALIDATE;
183
-
spin_unlock(&tcon->ses->ses_lock);
183
+
spin_unlock(&tcon->tc_lock);
184
184
185
185
/* list all files open on tree connection and mark them invalid */
186
186
spin_lock(&tcon->open_file_lock);
+1
-1
fs/cifs/fs_context.h
+1
-1
fs/cifs/fs_context.h
···
286
286
* max deferred close timeout (jiffies) - 2^30
287
287
*/
288
288
#define SMB3_MAX_DCLOSETIMEO (1 << 30)
289
-
#define SMB3_DEF_DCLOSETIMEO (5 * HZ) /* Can increase later, other clients use larger */
289
+
#define SMB3_DEF_DCLOSETIMEO (1 * HZ) /* even 1 sec enough to help eg open/write/close/open/read */
290
290
#endif
+2
fs/cifs/link.c
+2
fs/cifs/link.c
···
360
360
oparms = (struct cifs_open_parms) {
361
361
.tcon = tcon,
362
362
.cifs_sb = cifs_sb,
363
+
.path = path,
363
364
.desired_access = GENERIC_READ,
364
365
.create_options = cifs_create_options(cifs_sb, CREATE_NOT_DIR),
365
366
.disposition = FILE_OPEN,
···
428
427
oparms = (struct cifs_open_parms) {
429
428
.tcon = tcon,
430
429
.cifs_sb = cifs_sb,
430
+
.path = path,
431
431
.desired_access = GENERIC_WRITE,
432
432
.create_options = cifs_create_options(cifs_sb, CREATE_NOT_DIR),
433
433
.disposition = FILE_CREATE,
+1
fs/cifs/smb2inode.c
+1
fs/cifs/smb2inode.c
+26
-1
fs/cifs/smb2ops.c
+26
-1
fs/cifs/smb2ops.c
···
530
530
p = buf;
531
531
532
532
spin_lock(&ses->iface_lock);
533
+
/* do not query too frequently, this time with lock held */
534
+
if (ses->iface_last_update &&
535
+
time_before(jiffies, ses->iface_last_update +
536
+
(SMB_INTERFACE_POLL_INTERVAL * HZ))) {
537
+
spin_unlock(&ses->iface_lock);
538
+
return 0;
539
+
}
540
+
533
541
/*
534
542
* Go through iface_list and do kref_put to remove
535
543
* any unused ifaces. ifaces in use will be removed
···
704
696
struct network_interface_info_ioctl_rsp *out_buf = NULL;
705
697
struct cifs_ses *ses = tcon->ses;
706
698
699
+
/* do not query too frequently */
700
+
if (ses->iface_last_update &&
701
+
time_before(jiffies, ses->iface_last_update +
702
+
(SMB_INTERFACE_POLL_INTERVAL * HZ)))
703
+
return 0;
704
+
707
705
rc = SMB2_ioctl(xid, tcon, NO_FILE_ID, NO_FILE_ID,
708
706
FSCTL_QUERY_NETWORK_INTERFACE_INFO,
709
707
NULL /* no data input */, 0 /* no data input */,
···
717
703
if (rc == -EOPNOTSUPP) {
718
704
cifs_dbg(FYI,
719
705
"server does not support query network interfaces\n");
720
-
goto out;
706
+
ret_data_len = 0;
721
707
} else if (rc != 0) {
722
708
cifs_tcon_dbg(VFS, "error %d on ioctl to get interface list\n", rc);
723
709
goto out;
···
745
731
746
732
oparms = (struct cifs_open_parms) {
747
733
.tcon = tcon,
734
+
.path = "",
748
735
.desired_access = FILE_READ_ATTRIBUTES,
749
736
.disposition = FILE_OPEN,
750
737
.create_options = cifs_create_options(cifs_sb, 0),
···
789
774
790
775
oparms = (struct cifs_open_parms) {
791
776
.tcon = tcon,
777
+
.path = "",
792
778
.desired_access = FILE_READ_ATTRIBUTES,
793
779
.disposition = FILE_OPEN,
794
780
.create_options = cifs_create_options(cifs_sb, 0),
···
837
821
838
822
oparms = (struct cifs_open_parms) {
839
823
.tcon = tcon,
824
+
.path = full_path,
840
825
.desired_access = FILE_READ_ATTRIBUTES,
841
826
.disposition = FILE_OPEN,
842
827
.create_options = cifs_create_options(cifs_sb, 0),
···
1122
1105
1123
1106
oparms = (struct cifs_open_parms) {
1124
1107
.tcon = tcon,
1108
+
.path = path,
1125
1109
.desired_access = FILE_WRITE_EA,
1126
1110
.disposition = FILE_OPEN,
1127
1111
.create_options = cifs_create_options(cifs_sb, 0),
···
2114
2096
tcon = cifs_sb_master_tcon(cifs_sb);
2115
2097
oparms = (struct cifs_open_parms) {
2116
2098
.tcon = tcon,
2099
+
.path = path,
2117
2100
.desired_access = FILE_READ_ATTRIBUTES | FILE_READ_DATA,
2118
2101
.disposition = FILE_OPEN,
2119
2102
.create_options = cifs_create_options(cifs_sb, 0),
···
2187
2168
2188
2169
oparms = (struct cifs_open_parms) {
2189
2170
.tcon = tcon,
2171
+
.path = path,
2190
2172
.desired_access = FILE_READ_ATTRIBUTES | FILE_READ_DATA,
2191
2173
.disposition = FILE_OPEN,
2192
2174
.create_options = cifs_create_options(cifs_sb, 0),
···
2520
2500
2521
2501
oparms = (struct cifs_open_parms) {
2522
2502
.tcon = tcon,
2503
+
.path = path,
2523
2504
.desired_access = desired_access,
2524
2505
.disposition = FILE_OPEN,
2525
2506
.create_options = cifs_create_options(cifs_sb, 0),
···
2655
2634
2656
2635
oparms = (struct cifs_open_parms) {
2657
2636
.tcon = tcon,
2637
+
.path = "",
2658
2638
.desired_access = FILE_READ_ATTRIBUTES,
2659
2639
.disposition = FILE_OPEN,
2660
2640
.create_options = cifs_create_options(cifs_sb, 0),
···
2950
2928
2951
2929
oparms = (struct cifs_open_parms) {
2952
2930
.tcon = tcon,
2931
+
.path = full_path,
2953
2932
.desired_access = FILE_READ_ATTRIBUTES,
2954
2933
.disposition = FILE_OPEN,
2955
2934
.create_options = cifs_create_options(cifs_sb, create_options),
···
3091
3068
3092
3069
oparms = (struct cifs_open_parms) {
3093
3070
.tcon = tcon,
3071
+
.path = full_path,
3094
3072
.desired_access = FILE_READ_ATTRIBUTES,
3095
3073
.disposition = FILE_OPEN,
3096
3074
.create_options = cifs_create_options(cifs_sb, OPEN_REPARSE_POINT),
···
3232
3208
3233
3209
oparms = (struct cifs_open_parms) {
3234
3210
.tcon = tcon,
3211
+
.path = path,
3235
3212
.desired_access = READ_CONTROL,
3236
3213
.disposition = FILE_OPEN,
3237
3214
/*
+33
-29
fs/cifs/smb2pdu.c
+33
-29
fs/cifs/smb2pdu.c
···
144
144
struct TCP_Server_Info *server)
145
145
{
146
146
int rc = 0;
147
-
struct nls_table *nls_codepage;
147
+
struct nls_table *nls_codepage = NULL;
148
148
struct cifs_ses *ses;
149
149
150
150
/*
···
165
165
spin_lock(&tcon->tc_lock);
166
166
if (tcon->status == TID_EXITING) {
167
167
/*
168
-
* only tree disconnect, open, and write,
169
-
* (and ulogoff which does not have tcon)
170
-
* are allowed as we start force umount.
168
+
* only tree disconnect allowed when disconnecting ...
171
169
*/
172
-
if ((smb2_command != SMB2_WRITE) &&
173
-
(smb2_command != SMB2_CREATE) &&
174
-
(smb2_command != SMB2_TREE_DISCONNECT)) {
170
+
if (smb2_command != SMB2_TREE_DISCONNECT) {
175
171
spin_unlock(&tcon->tc_lock);
176
172
cifs_dbg(FYI, "can not send cmd %d while umounting\n",
177
173
smb2_command);
···
199
203
}
200
204
spin_unlock(&server->srv_lock);
201
205
206
+
again:
202
207
rc = cifs_wait_for_server_reconnect(server, tcon->retry);
203
208
if (rc)
204
209
return rc;
···
216
219
tcon->ses->chans_need_reconnect,
217
220
tcon->need_reconnect);
218
221
219
-
nls_codepage = load_nls_default();
220
-
222
+
mutex_lock(&ses->session_mutex);
221
223
/*
222
224
* Recheck after acquire mutex. If another thread is negotiating
223
225
* and the server never sends an answer the socket will be closed
···
225
229
spin_lock(&server->srv_lock);
226
230
if (server->tcpStatus == CifsNeedReconnect) {
227
231
spin_unlock(&server->srv_lock);
232
+
mutex_unlock(&ses->session_mutex);
233
+
234
+
if (tcon->retry)
235
+
goto again;
236
+
228
237
rc = -EHOSTDOWN;
229
238
goto out;
230
239
}
231
240
spin_unlock(&server->srv_lock);
232
241
242
+
nls_codepage = load_nls_default();
243
+
233
244
/*
234
245
* need to prevent multiple threads trying to simultaneously
235
246
* reconnect the same SMB session
236
247
*/
248
+
spin_lock(&ses->ses_lock);
237
249
spin_lock(&ses->chan_lock);
238
-
if (!cifs_chan_needs_reconnect(ses, server)) {
250
+
if (!cifs_chan_needs_reconnect(ses, server) &&
251
+
ses->ses_status == SES_GOOD) {
239
252
spin_unlock(&ses->chan_lock);
240
-
253
+
spin_unlock(&ses->ses_lock);
241
254
/* this means that we only need to tree connect */
242
255
if (tcon->need_reconnect)
243
256
goto skip_sess_setup;
244
257
258
+
mutex_unlock(&ses->session_mutex);
245
259
goto out;
246
260
}
247
261
spin_unlock(&ses->chan_lock);
262
+
spin_unlock(&ses->ses_lock);
248
263
249
-
mutex_lock(&ses->session_mutex);
250
264
rc = cifs_negotiate_protocol(0, ses, server);
251
265
if (!rc) {
252
266
rc = cifs_setup_session(0, ses, server, nls_codepage);
···
272
266
mutex_unlock(&ses->session_mutex);
273
267
goto out;
274
268
}
275
-
mutex_unlock(&ses->session_mutex);
276
269
277
270
skip_sess_setup:
278
-
mutex_lock(&ses->session_mutex);
279
271
if (!tcon->need_reconnect) {
280
272
mutex_unlock(&ses->session_mutex);
281
273
goto out;
···
288
284
cifs_dbg(FYI, "reconnect tcon rc = %d\n", rc);
289
285
if (rc) {
290
286
/* If sess reconnected but tcon didn't, something strange ... */
291
-
pr_warn_once("reconnect tcon failed rc = %d\n", rc);
287
+
cifs_dbg(VFS, "reconnect tcon failed rc = %d\n", rc);
292
288
goto out;
293
289
}
294
290
···
1260
1256
if (rc)
1261
1257
return rc;
1262
1258
1263
-
spin_lock(&ses->chan_lock);
1264
-
is_binding = !CIFS_ALL_CHANS_NEED_RECONNECT(ses);
1265
-
spin_unlock(&ses->chan_lock);
1259
+
spin_lock(&ses->ses_lock);
1260
+
is_binding = (ses->ses_status == SES_GOOD);
1261
+
spin_unlock(&ses->ses_lock);
1266
1262
1267
1263
if (is_binding) {
1268
1264
req->hdr.SessionId = cpu_to_le64(ses->Suid);
···
1420
1416
goto out_put_spnego_key;
1421
1417
}
1422
1418
1423
-
spin_lock(&ses->chan_lock);
1424
-
is_binding = !CIFS_ALL_CHANS_NEED_RECONNECT(ses);
1425
-
spin_unlock(&ses->chan_lock);
1419
+
spin_lock(&ses->ses_lock);
1420
+
is_binding = (ses->ses_status == SES_GOOD);
1421
+
spin_unlock(&ses->ses_lock);
1426
1422
1427
1423
/* keep session key if binding */
1428
1424
if (!is_binding) {
···
1546
1542
1547
1543
cifs_dbg(FYI, "rawntlmssp session setup challenge phase\n");
1548
1544
1549
-
spin_lock(&ses->chan_lock);
1550
-
is_binding = !CIFS_ALL_CHANS_NEED_RECONNECT(ses);
1551
-
spin_unlock(&ses->chan_lock);
1545
+
spin_lock(&ses->ses_lock);
1546
+
is_binding = (ses->ses_status == SES_GOOD);
1547
+
spin_unlock(&ses->ses_lock);
1552
1548
1553
1549
/* keep existing ses id and flags if binding */
1554
1550
if (!is_binding) {
···
1614
1610
1615
1611
rsp = (struct smb2_sess_setup_rsp *)sess_data->iov[0].iov_base;
1616
1612
1617
-
spin_lock(&ses->chan_lock);
1618
-
is_binding = !CIFS_ALL_CHANS_NEED_RECONNECT(ses);
1619
-
spin_unlock(&ses->chan_lock);
1613
+
spin_lock(&ses->ses_lock);
1614
+
is_binding = (ses->ses_status == SES_GOOD);
1615
+
spin_unlock(&ses->ses_lock);
1620
1616
1621
1617
/* keep existing ses id and flags if binding */
1622
1618
if (!is_binding) {
···
2709
2705
rqst.rq_nvec = n_iov;
2710
2706
2711
2707
/* no need to inc num_remote_opens because we close it just below */
2712
-
trace_smb3_posix_mkdir_enter(xid, tcon->tid, ses->Suid, CREATE_NOT_FILE,
2708
+
trace_smb3_posix_mkdir_enter(xid, tcon->tid, ses->Suid, full_path, CREATE_NOT_FILE,
2713
2709
FILE_WRITE_ATTRIBUTES);
2714
2710
/* resource #4: response buffer */
2715
2711
rc = cifs_send_recv(xid, ses, server,
···
2977
2973
if (rc)
2978
2974
goto creat_exit;
2979
2975
2980
-
trace_smb3_open_enter(xid, tcon->tid, tcon->ses->Suid,
2976
+
trace_smb3_open_enter(xid, tcon->tid, tcon->ses->Suid, oparms->path,
2981
2977
oparms->create_options, oparms->desired_access);
2982
2978
2983
2979
rc = cifs_send_recv(xid, ses, server,
+14
-3
fs/cifs/smb2transport.c
+14
-3
fs/cifs/smb2transport.c
···
81
81
struct cifs_ses *ses = NULL;
82
82
int i;
83
83
int rc = 0;
84
+
bool is_binding = false;
84
85
85
86
spin_lock(&cifs_tcp_ses_lock);
86
87
···
98
97
goto out;
99
98
100
99
found:
100
+
spin_lock(&ses->ses_lock);
101
101
spin_lock(&ses->chan_lock);
102
-
if (cifs_chan_needs_reconnect(ses, server) &&
103
-
!CIFS_ALL_CHANS_NEED_RECONNECT(ses)) {
102
+
103
+
is_binding = (cifs_chan_needs_reconnect(ses, server) &&
104
+
ses->ses_status == SES_GOOD);
105
+
if (is_binding) {
104
106
/*
105
107
* If we are in the process of binding a new channel
106
108
* to an existing session, use the master connection
···
111
107
*/
112
108
memcpy(key, ses->smb3signingkey, SMB3_SIGN_KEY_SIZE);
113
109
spin_unlock(&ses->chan_lock);
110
+
spin_unlock(&ses->ses_lock);
114
111
goto out;
115
112
}
116
113
···
124
119
if (chan->server == server) {
125
120
memcpy(key, chan->signkey, SMB3_SIGN_KEY_SIZE);
126
121
spin_unlock(&ses->chan_lock);
122
+
spin_unlock(&ses->ses_lock);
127
123
goto out;
128
124
}
129
125
}
130
126
spin_unlock(&ses->chan_lock);
127
+
spin_unlock(&ses->ses_lock);
131
128
132
129
cifs_dbg(VFS,
133
130
"%s: Could not find channel signing key for session 0x%llx\n",
···
399
392
bool is_binding = false;
400
393
int chan_index = 0;
401
394
395
+
spin_lock(&ses->ses_lock);
402
396
spin_lock(&ses->chan_lock);
403
-
is_binding = !CIFS_ALL_CHANS_NEED_RECONNECT(ses);
397
+
is_binding = (cifs_chan_needs_reconnect(ses, server) &&
398
+
ses->ses_status == SES_GOOD);
399
+
404
400
chan_index = cifs_ses_get_chan_index(ses, server);
405
401
/* TODO: introduce ref counting for channels when the can be freed */
406
402
spin_unlock(&ses->chan_lock);
403
+
spin_unlock(&ses->ses_lock);
407
404
408
405
/*
409
406
* All channels use the same encryption/decryption keys but
+8
-4
fs/cifs/trace.h
+8
-4
fs/cifs/trace.h
···
701
701
TP_PROTO(unsigned int xid,
702
702
__u32 tid,
703
703
__u64 sesid,
704
+
const char *full_path,
704
705
int create_options,
705
706
int desired_access),
706
-
TP_ARGS(xid, tid, sesid, create_options, desired_access),
707
+
TP_ARGS(xid, tid, sesid, full_path, create_options, desired_access),
707
708
TP_STRUCT__entry(
708
709
__field(unsigned int, xid)
709
710
__field(__u32, tid)
710
711
__field(__u64, sesid)
712
+
__string(path, full_path)
711
713
__field(int, create_options)
712
714
__field(int, desired_access)
713
715
),
···
717
715
__entry->xid = xid;
718
716
__entry->tid = tid;
719
717
__entry->sesid = sesid;
718
+
__assign_str(path, full_path);
720
719
__entry->create_options = create_options;
721
720
__entry->desired_access = desired_access;
722
721
),
723
-
TP_printk("xid=%u sid=0x%llx tid=0x%x cr_opts=0x%x des_access=0x%x",
724
-
__entry->xid, __entry->sesid, __entry->tid,
722
+
TP_printk("xid=%u sid=0x%llx tid=0x%x path=%s cr_opts=0x%x des_access=0x%x",
723
+
__entry->xid, __entry->sesid, __entry->tid, __get_str(path),
725
724
__entry->create_options, __entry->desired_access)
726
725
)
727
726
···
731
728
TP_PROTO(unsigned int xid, \
732
729
__u32 tid, \
733
730
__u64 sesid, \
731
+
const char *full_path, \
734
732
int create_options, \
735
733
int desired_access), \
736
-
TP_ARGS(xid, tid, sesid, create_options, desired_access))
734
+
TP_ARGS(xid, tid, sesid, full_path, create_options, desired_access))
737
735
738
736
DEFINE_SMB3_OPEN_ENTER_EVENT(open_enter);
739
737
DEFINE_SMB3_OPEN_ENTER_EVENT(posix_mkdir_enter);
+3
-2
fs/ksmbd/auth.c
+3
-2
fs/ksmbd/auth.c
···
727
727
goto smb3signkey_ret;
728
728
}
729
729
730
-
if (conn->cipher_type == SMB2_ENCRYPTION_AES256_CCM ||
731
-
conn->cipher_type == SMB2_ENCRYPTION_AES256_GCM)
730
+
if (key_size == SMB3_ENC_DEC_KEY_SIZE &&
731
+
(conn->cipher_type == SMB2_ENCRYPTION_AES256_CCM ||
732
+
conn->cipher_type == SMB2_ENCRYPTION_AES256_GCM))
732
733
rc = crypto_shash_update(CRYPTO_HMACSHA256(ctx), L256, 4);
733
734
else
734
735
rc = crypto_shash_update(CRYPTO_HMACSHA256(ctx), L128, 4);
+4
-7
fs/ksmbd/connection.c
+4
-7
fs/ksmbd/connection.c
···
298
298
kvfree(conn->request_buf);
299
299
conn->request_buf = NULL;
300
300
301
-
size = t->ops->read(t, hdr_buf, sizeof(hdr_buf));
301
+
size = t->ops->read(t, hdr_buf, sizeof(hdr_buf), -1);
302
302
if (size != sizeof(hdr_buf))
303
303
break;
304
304
···
319
319
}
320
320
321
321
/*
322
-
* Check if pdu size is valid (min : smb header size,
323
-
* max : 0x00FFFFFF).
322
+
* Check maximum pdu size(0x00FFFFFF).
324
323
*/
325
-
if (pdu_size < __SMB2_HEADER_STRUCTURE_SIZE ||
326
-
pdu_size > MAX_STREAM_PROT_LEN) {
324
+
if (pdu_size > MAX_STREAM_PROT_LEN)
327
325
break;
328
-
}
329
326
330
327
/* 4 for rfc1002 length field */
331
328
size = pdu_size + 4;
···
341
344
* We already read 4 bytes to find out PDU size, now
342
345
* read in PDU
343
346
*/
344
-
size = t->ops->read(t, conn->request_buf + 4, pdu_size);
347
+
size = t->ops->read(t, conn->request_buf + 4, pdu_size, 2);
345
348
if (size < 0) {
346
349
pr_err("sock_read failed: %d\n", size);
347
350
break;
+2
-1
fs/ksmbd/connection.h
+2
-1
fs/ksmbd/connection.h
···
114
114
int (*prepare)(struct ksmbd_transport *t);
115
115
void (*disconnect)(struct ksmbd_transport *t);
116
116
void (*shutdown)(struct ksmbd_transport *t);
117
-
int (*read)(struct ksmbd_transport *t, char *buf, unsigned int size);
117
+
int (*read)(struct ksmbd_transport *t, char *buf,
118
+
unsigned int size, int max_retries);
118
119
int (*writev)(struct ksmbd_transport *t, struct kvec *iovs, int niov,
119
120
int size, bool need_invalidate_rkey,
120
121
unsigned int remote_key);
+15
-5
fs/ksmbd/smb2pdu.c
+15
-5
fs/ksmbd/smb2pdu.c
···
2977
2977
sizeof(struct smb_acl) +
2978
2978
sizeof(struct smb_ace) * ace_num * 2,
2979
2979
GFP_KERNEL);
2980
-
if (!pntsd)
2980
+
if (!pntsd) {
2981
+
posix_acl_release(fattr.cf_acls);
2982
+
posix_acl_release(fattr.cf_dacls);
2981
2983
goto err_out;
2984
+
}
2982
2985
2983
2986
rc = build_sec_desc(idmap,
2984
2987
pntsd, NULL, 0,
···
4936
4933
FILE_SUPPORTS_BLOCK_REFCOUNTING);
4937
4934
4938
4935
info->Attributes |= cpu_to_le32(server_conf.share_fake_fscaps);
4936
+
4937
+
if (test_share_config_flag(work->tcon->share_conf,
4938
+
KSMBD_SHARE_FLAG_STREAMS))
4939
+
info->Attributes |= cpu_to_le32(FILE_NAMED_STREAMS);
4939
4940
4940
4941
info->MaxPathNameComponentLength = cpu_to_le32(stfs.f_namelen);
4941
4942
len = smbConvertToUTF16((__le16 *)info->FileSystemName,
···
7451
7444
if (in_count == 0)
7452
7445
return -EINVAL;
7453
7446
7447
+
start = le64_to_cpu(qar_req->file_offset);
7448
+
length = le64_to_cpu(qar_req->length);
7449
+
7450
+
if (start < 0 || length < 0)
7451
+
return -EINVAL;
7452
+
7454
7453
fp = ksmbd_lookup_fd_fast(work, id);
7455
7454
if (!fp)
7456
7455
return -ENOENT;
7457
-
7458
-
start = le64_to_cpu(qar_req->file_offset);
7459
-
length = le64_to_cpu(qar_req->length);
7460
7456
7461
7457
ret = ksmbd_vfs_fqar_lseek(fp, start, length,
7462
7458
qar_rsp, in_count, out_count);
···
7761
7751
7762
7752
off = le64_to_cpu(zero_data->FileOffset);
7763
7753
bfz = le64_to_cpu(zero_data->BeyondFinalZero);
7764
-
if (off > bfz) {
7754
+
if (off < 0 || bfz < 0 || off > bfz) {
7765
7755
ret = -EINVAL;
7766
7756
goto out;
7767
7757
}
+22
-5
fs/ksmbd/smb_common.c
+22
-5
fs/ksmbd/smb_common.c
···
434
434
435
435
static int __smb2_negotiate(struct ksmbd_conn *conn)
436
436
{
437
-
return (conn->dialect >= SMB21_PROT_ID &&
437
+
return (conn->dialect >= SMB20_PROT_ID &&
438
438
conn->dialect <= SMB311_PROT_ID);
439
439
}
440
440
···
442
442
{
443
443
struct smb_negotiate_rsp *neg_rsp = work->response_buf;
444
444
445
-
ksmbd_debug(SMB, "Unsupported SMB protocol\n");
446
-
neg_rsp->hdr.Status.CifsError = STATUS_INVALID_LOGON_TYPE;
447
-
return -EINVAL;
445
+
ksmbd_debug(SMB, "Unsupported SMB1 protocol\n");
446
+
447
+
/*
448
+
* Remove 4 byte direct TCP header, add 2 byte bcc and
449
+
* 2 byte DialectIndex.
450
+
*/
451
+
*(__be32 *)work->response_buf =
452
+
cpu_to_be32(sizeof(struct smb_hdr) - 4 + 2 + 2);
453
+
neg_rsp->hdr.Status.CifsError = STATUS_SUCCESS;
454
+
455
+
neg_rsp->hdr.Command = SMB_COM_NEGOTIATE;
456
+
*(__le32 *)neg_rsp->hdr.Protocol = SMB1_PROTO_NUMBER;
457
+
neg_rsp->hdr.Flags = SMBFLG_RESPONSE;
458
+
neg_rsp->hdr.Flags2 = SMBFLG2_UNICODE | SMBFLG2_ERR_STATUS |
459
+
SMBFLG2_EXT_SEC | SMBFLG2_IS_LONG_NAME;
460
+
461
+
neg_rsp->hdr.WordCount = 1;
462
+
neg_rsp->DialectIndex = cpu_to_le16(work->conn->dialect);
463
+
neg_rsp->ByteCount = 0;
464
+
return 0;
448
465
}
449
466
450
467
int ksmbd_smb_negotiate_common(struct ksmbd_work *work, unsigned int command)
···
482
465
}
483
466
}
484
467
485
-
if (command == SMB2_NEGOTIATE_HE && __smb2_negotiate(conn)) {
468
+
if (command == SMB2_NEGOTIATE_HE) {
486
469
ret = smb2_handle_negotiate(work);
487
470
init_smb2_neg_rsp(work);
488
471
return ret;
+8
-22
fs/ksmbd/smb_common.h
+8
-22
fs/ksmbd/smb_common.h
···
158
158
159
159
#define SMB1_PROTO_NUMBER cpu_to_le32(0x424d53ff)
160
160
#define SMB_COM_NEGOTIATE 0x72
161
-
162
161
#define SMB1_CLIENT_GUID_SIZE (16)
162
+
163
+
#define SMBFLG_RESPONSE 0x80 /* this PDU is a response from server */
164
+
165
+
#define SMBFLG2_IS_LONG_NAME cpu_to_le16(0x40)
166
+
#define SMBFLG2_EXT_SEC cpu_to_le16(0x800)
167
+
#define SMBFLG2_ERR_STATUS cpu_to_le16(0x4000)
168
+
#define SMBFLG2_UNICODE cpu_to_le16(0x8000)
169
+
163
170
struct smb_hdr {
164
171
__be32 smb_buf_length;
165
172
__u8 Protocol[4];
···
206
199
struct smb_negotiate_rsp {
207
200
struct smb_hdr hdr; /* wct = 17 */
208
201
__le16 DialectIndex; /* 0xFFFF = no dialect acceptable */
209
-
__u8 SecurityMode;
210
-
__le16 MaxMpxCount;
211
-
__le16 MaxNumberVcs;
212
-
__le32 MaxBufferSize;
213
-
__le32 MaxRawSize;
214
-
__le32 SessionKey;
215
-
__le32 Capabilities; /* see below */
216
-
__le32 SystemTimeLow;
217
-
__le32 SystemTimeHigh;
218
-
__le16 ServerTimeZone;
219
-
__u8 EncryptionKeyLength;
220
202
__le16 ByteCount;
221
-
union {
222
-
unsigned char EncryptionKey[8]; /* cap extended security off */
223
-
/* followed by Domain name - if extended security is off */
224
-
/* followed by 16 bytes of server GUID */
225
-
/* then security blob if cap_extended_security negotiated */
226
-
struct {
227
-
unsigned char GUID[SMB1_CLIENT_GUID_SIZE];
228
-
unsigned char SecurityBlob[1];
229
-
} __packed extended_response;
230
-
} __packed u;
231
203
} __packed;
232
204
233
205
struct filesystem_attribute_info {
+1
-1
fs/ksmbd/transport_rdma.c
+1
-1
fs/ksmbd/transport_rdma.c
+23
-12
fs/ksmbd/transport_tcp.c
+23
-12
fs/ksmbd/transport_tcp.c
···
291
291
292
292
/**
293
293
* ksmbd_tcp_readv() - read data from socket in given iovec
294
-
* @t: TCP transport instance
295
-
* @iov_orig: base IO vector
296
-
* @nr_segs: number of segments in base iov
297
-
* @to_read: number of bytes to read from socket
294
+
* @t: TCP transport instance
295
+
* @iov_orig: base IO vector
296
+
* @nr_segs: number of segments in base iov
297
+
* @to_read: number of bytes to read from socket
298
+
* @max_retries: maximum retry count
298
299
*
299
300
* Return: on success return number of bytes read from socket,
300
301
* otherwise return error number
301
302
*/
302
303
static int ksmbd_tcp_readv(struct tcp_transport *t, struct kvec *iov_orig,
303
-
unsigned int nr_segs, unsigned int to_read)
304
+
unsigned int nr_segs, unsigned int to_read,
305
+
int max_retries)
304
306
{
305
307
int length = 0;
306
308
int total_read;
···
310
308
struct msghdr ksmbd_msg;
311
309
struct kvec *iov;
312
310
struct ksmbd_conn *conn = KSMBD_TRANS(t)->conn;
313
-
int max_retry = 2;
314
311
315
312
iov = get_conn_iovec(t, nr_segs);
316
313
if (!iov)
···
336
335
} else if (conn->status == KSMBD_SESS_NEED_RECONNECT) {
337
336
total_read = -EAGAIN;
338
337
break;
339
-
} else if ((length == -ERESTARTSYS || length == -EAGAIN) &&
340
-
max_retry) {
338
+
} else if (length == -ERESTARTSYS || length == -EAGAIN) {
339
+
/*
340
+
* If max_retries is negative, Allow unlimited
341
+
* retries to keep connection with inactive sessions.
342
+
*/
343
+
if (max_retries == 0) {
344
+
total_read = length;
345
+
break;
346
+
} else if (max_retries > 0) {
347
+
max_retries--;
348
+
}
349
+
341
350
usleep_range(1000, 2000);
342
351
length = 0;
343
-
max_retry--;
344
352
continue;
345
353
} else if (length <= 0) {
346
-
total_read = -EAGAIN;
354
+
total_read = length;
347
355
break;
348
356
}
349
357
}
···
368
358
* Return: on success return number of bytes read from socket,
369
359
* otherwise return error number
370
360
*/
371
-
static int ksmbd_tcp_read(struct ksmbd_transport *t, char *buf, unsigned int to_read)
361
+
static int ksmbd_tcp_read(struct ksmbd_transport *t, char *buf,
362
+
unsigned int to_read, int max_retries)
372
363
{
373
364
struct kvec iov;
374
365
375
366
iov.iov_base = buf;
376
367
iov.iov_len = to_read;
377
368
378
-
return ksmbd_tcp_readv(TCP_TRANS(t), &iov, 1, to_read);
369
+
return ksmbd_tcp_readv(TCP_TRANS(t), &iov, 1, to_read, max_retries);
379
370
}
380
371
381
372
static int ksmbd_tcp_writev(struct ksmbd_transport *t, struct kvec *iov,
+1
-1
fs/nilfs2/ioctl.c
+1
-1
fs/nilfs2/ioctl.c
+1
fs/xfs/Makefile
+1
fs/xfs/Makefile
+37
-1
fs/xfs/libxfs/xfs_alloc.c
+37
-1
fs/xfs/libxfs/xfs_alloc.c
···
3045
3045
pag->pagf_refcount_level = be32_to_cpu(agf->agf_refcount_level);
3046
3046
if (xfs_agfl_needs_reset(pag->pag_mount, agf))
3047
3047
set_bit(XFS_AGSTATE_AGFL_NEEDS_RESET, &pag->pag_opstate);
3048
+
else
3049
+
clear_bit(XFS_AGSTATE_AGFL_NEEDS_RESET, &pag->pag_opstate);
3048
3050
3049
3051
/*
3050
3052
* Update the in-core allocbt counter. Filter out the rmapbt
···
3257
3255
XFS_STATS_INC(mp, xs_allocx);
3258
3256
XFS_STATS_ADD(mp, xs_allocb, args->len);
3259
3257
3258
+
trace_xfs_alloc_vextent_finish(args);
3259
+
3260
3260
out_drop_perag:
3261
3261
if (drop_perag && args->pag) {
3262
3262
xfs_perag_rele(args->pag);
···
3283
3279
xfs_agnumber_t minimum_agno;
3284
3280
int error;
3285
3281
3282
+
ASSERT(args->pag != NULL);
3283
+
ASSERT(args->pag->pag_agno == agno);
3284
+
3286
3285
args->agno = agno;
3287
3286
args->agbno = 0;
3287
+
3288
+
trace_xfs_alloc_vextent_this_ag(args);
3289
+
3288
3290
error = xfs_alloc_vextent_check_args(args, XFS_AGB_TO_FSB(mp, agno, 0),
3289
3291
&minimum_agno);
3290
3292
if (error) {
···
3333
3323
uint32_t flags)
3334
3324
{
3335
3325
struct xfs_mount *mp = args->mp;
3326
+
xfs_agnumber_t restart_agno = minimum_agno;
3336
3327
xfs_agnumber_t agno;
3337
3328
int error = 0;
3338
3329
3330
+
if (flags & XFS_ALLOC_FLAG_TRYLOCK)
3331
+
restart_agno = 0;
3339
3332
restart:
3340
-
for_each_perag_wrap_range(mp, start_agno, minimum_agno,
3333
+
for_each_perag_wrap_range(mp, start_agno, restart_agno,
3341
3334
mp->m_sb.sb_agcount, agno, args->pag) {
3342
3335
args->agno = agno;
3343
3336
error = xfs_alloc_vextent_prepare_ag(args);
···
3379
3366
*/
3380
3367
if (flags) {
3381
3368
flags = 0;
3369
+
restart_agno = minimum_agno;
3382
3370
goto restart;
3383
3371
}
3384
3372
···
3408
3394
bool bump_rotor = false;
3409
3395
int error;
3410
3396
3397
+
ASSERT(args->pag == NULL);
3398
+
3411
3399
args->agno = NULLAGNUMBER;
3412
3400
args->agbno = NULLAGBLOCK;
3401
+
3402
+
trace_xfs_alloc_vextent_start_ag(args);
3403
+
3413
3404
error = xfs_alloc_vextent_check_args(args, target, &minimum_agno);
3414
3405
if (error) {
3415
3406
if (error == -ENOSPC)
···
3461
3442
xfs_agnumber_t start_agno;
3462
3443
int error;
3463
3444
3445
+
ASSERT(args->pag == NULL);
3446
+
3464
3447
args->agno = NULLAGNUMBER;
3465
3448
args->agbno = NULLAGBLOCK;
3449
+
3450
+
trace_xfs_alloc_vextent_first_ag(args);
3451
+
3466
3452
error = xfs_alloc_vextent_check_args(args, target, &minimum_agno);
3467
3453
if (error) {
3468
3454
if (error == -ENOSPC)
···
3494
3470
xfs_agnumber_t minimum_agno;
3495
3471
int error;
3496
3472
3473
+
ASSERT(args->pag != NULL);
3474
+
ASSERT(args->pag->pag_agno == XFS_FSB_TO_AGNO(mp, target));
3475
+
3497
3476
args->agno = XFS_FSB_TO_AGNO(mp, target);
3498
3477
args->agbno = XFS_FSB_TO_AGBNO(mp, target);
3478
+
3479
+
trace_xfs_alloc_vextent_exact_bno(args);
3480
+
3499
3481
error = xfs_alloc_vextent_check_args(args, target, &minimum_agno);
3500
3482
if (error) {
3501
3483
if (error == -ENOSPC)
···
3532
3502
bool needs_perag = args->pag == NULL;
3533
3503
int error;
3534
3504
3505
+
if (!needs_perag)
3506
+
ASSERT(args->pag->pag_agno == XFS_FSB_TO_AGNO(mp, target));
3507
+
3535
3508
args->agno = XFS_FSB_TO_AGNO(mp, target);
3536
3509
args->agbno = XFS_FSB_TO_AGBNO(mp, target);
3510
+
3511
+
trace_xfs_alloc_vextent_near_bno(args);
3512
+
3537
3513
error = xfs_alloc_vextent_check_args(args, target, &minimum_agno);
3538
3514
if (error) {
3539
3515
if (error == -ENOSPC)
+662
fs/xfs/xfs_dahash_test.c
+662
fs/xfs/xfs_dahash_test.c
···
1
+
// SPDX-License-Identifier: GPL-2.0-or-later
2
+
/*
3
+
* Copyright (C) 2023 Oracle. All Rights Reserved.
4
+
* Author: Darrick J. Wong <djwong@kernel.org>
5
+
*/
6
+
#include "xfs.h"
7
+
#include "xfs_fs.h"
8
+
#include "xfs_shared.h"
9
+
#include "xfs_format.h"
10
+
#include "xfs_da_format.h"
11
+
#include "xfs_da_btree.h"
12
+
#include "xfs_dahash_test.h"
13
+
14
+
/* 4096 random bytes */
15
+
static uint8_t __initdata __attribute__((__aligned__(8))) test_buf[] =
16
+
{
17
+
0x5b, 0x85, 0x21, 0xcb, 0x09, 0x68, 0x7d, 0x30,
18
+
0xc7, 0x69, 0xd7, 0x30, 0x92, 0xde, 0x59, 0xe4,
19
+
0xc9, 0x6e, 0x8b, 0xdb, 0x98, 0x6b, 0xaa, 0x60,
20
+
0xa8, 0xb5, 0xbc, 0x6c, 0xa9, 0xb1, 0x5b, 0x2c,
21
+
0xea, 0xb4, 0x92, 0x6a, 0x3f, 0x79, 0x91, 0xe4,
22
+
0xe9, 0x70, 0x51, 0x8c, 0x7f, 0x95, 0x6f, 0x1a,
23
+
0x56, 0xa1, 0x5c, 0x27, 0x03, 0x67, 0x9f, 0x3a,
24
+
0xe2, 0x31, 0x11, 0x29, 0x6b, 0x98, 0xfc, 0xc4,
25
+
0x53, 0x24, 0xc5, 0x8b, 0xce, 0x47, 0xb2, 0xb9,
26
+
0x32, 0xcb, 0xc1, 0xd0, 0x03, 0x57, 0x4e, 0xd4,
27
+
0xe9, 0x3c, 0xa1, 0x63, 0xcf, 0x12, 0x0e, 0xca,
28
+
0xe1, 0x13, 0xd1, 0x93, 0xa6, 0x88, 0x5c, 0x61,
29
+
0x5b, 0xbb, 0xf0, 0x19, 0x46, 0xb4, 0xcf, 0x9e,
30
+
0xb6, 0x6b, 0x4c, 0x3a, 0xcf, 0x60, 0xf9, 0x7a,
31
+
0x8d, 0x07, 0x63, 0xdb, 0x40, 0xe9, 0x0b, 0x6f,
32
+
0xad, 0x97, 0xf1, 0xed, 0xd0, 0x1e, 0x26, 0xfd,
33
+
0xbf, 0xb7, 0xc8, 0x04, 0x94, 0xf8, 0x8b, 0x8c,
34
+
0xf1, 0xab, 0x7a, 0xd4, 0xdd, 0xf3, 0xe8, 0x88,
35
+
0xc3, 0xed, 0x17, 0x8a, 0x9b, 0x40, 0x0d, 0x53,
36
+
0x62, 0x12, 0x03, 0x5f, 0x1b, 0x35, 0x32, 0x1f,
37
+
0xb4, 0x7b, 0x93, 0x78, 0x0d, 0xdb, 0xce, 0xa4,
38
+
0xc0, 0x47, 0xd5, 0xbf, 0x68, 0xe8, 0x5d, 0x74,
39
+
0x8f, 0x8e, 0x75, 0x1c, 0xb2, 0x4f, 0x9a, 0x60,
40
+
0xd1, 0xbe, 0x10, 0xf4, 0x5c, 0xa1, 0x53, 0x09,
41
+
0xa5, 0xe0, 0x09, 0x54, 0x85, 0x5c, 0xdc, 0x07,
42
+
0xe7, 0x21, 0x69, 0x7b, 0x8a, 0xfd, 0x90, 0xf1,
43
+
0x22, 0xd0, 0xb4, 0x36, 0x28, 0xe6, 0xb8, 0x0f,
44
+
0x39, 0xde, 0xc8, 0xf3, 0x86, 0x60, 0x34, 0xd2,
45
+
0x5e, 0xdf, 0xfd, 0xcf, 0x0f, 0xa9, 0x65, 0xf0,
46
+
0xd5, 0x4d, 0x96, 0x40, 0xe3, 0xdf, 0x3f, 0x95,
47
+
0x5a, 0x39, 0x19, 0x93, 0xf4, 0x75, 0xce, 0x22,
48
+
0x00, 0x1c, 0x93, 0xe2, 0x03, 0x66, 0xf4, 0x93,
49
+
0x73, 0x86, 0x81, 0x8e, 0x29, 0x44, 0x48, 0x86,
50
+
0x61, 0x7c, 0x48, 0xa3, 0x43, 0xd2, 0x9c, 0x8d,
51
+
0xd4, 0x95, 0xdd, 0xe1, 0x22, 0x89, 0x3a, 0x40,
52
+
0x4c, 0x1b, 0x8a, 0x04, 0xa8, 0x09, 0x69, 0x8b,
53
+
0xea, 0xc6, 0x55, 0x8e, 0x57, 0xe6, 0x64, 0x35,
54
+
0xf0, 0xc7, 0x16, 0x9f, 0x5d, 0x5e, 0x86, 0x40,
55
+
0x46, 0xbb, 0xe5, 0x45, 0x88, 0xfe, 0xc9, 0x63,
56
+
0x15, 0xfb, 0xf5, 0xbd, 0x71, 0x61, 0xeb, 0x7b,
57
+
0x78, 0x70, 0x07, 0x31, 0x03, 0x9f, 0xb2, 0xc8,
58
+
0xa7, 0xab, 0x47, 0xfd, 0xdf, 0xa0, 0x78, 0x72,
59
+
0xa4, 0x2a, 0xe4, 0xb6, 0xba, 0xc0, 0x1e, 0x86,
60
+
0x71, 0xe6, 0x3d, 0x18, 0x37, 0x70, 0xe6, 0xff,
61
+
0xe0, 0xbc, 0x0b, 0x22, 0xa0, 0x1f, 0xd3, 0xed,
62
+
0xa2, 0x55, 0x39, 0xab, 0xa8, 0x13, 0x73, 0x7c,
63
+
0x3f, 0xb2, 0xd6, 0x19, 0xac, 0xff, 0x99, 0xed,
64
+
0xe8, 0xe6, 0xa6, 0x22, 0xe3, 0x9c, 0xf1, 0x30,
65
+
0xdc, 0x01, 0x0a, 0x56, 0xfa, 0xe4, 0xc9, 0x99,
66
+
0xdd, 0xa8, 0xd8, 0xda, 0x35, 0x51, 0x73, 0xb4,
67
+
0x40, 0x86, 0x85, 0xdb, 0x5c, 0xd5, 0x85, 0x80,
68
+
0x14, 0x9c, 0xfd, 0x98, 0xa9, 0x82, 0xc5, 0x37,
69
+
0xff, 0x32, 0x5d, 0xd0, 0x0b, 0xfa, 0xdc, 0x04,
70
+
0x5e, 0x09, 0xd2, 0xca, 0x17, 0x4b, 0x1a, 0x8e,
71
+
0x15, 0xe1, 0xcc, 0x4e, 0x52, 0x88, 0x35, 0xbd,
72
+
0x48, 0xfe, 0x15, 0xa0, 0x91, 0xfd, 0x7e, 0x6c,
73
+
0x0e, 0x5d, 0x79, 0x1b, 0x81, 0x79, 0xd2, 0x09,
74
+
0x34, 0x70, 0x3d, 0x81, 0xec, 0xf6, 0x24, 0xbb,
75
+
0xfb, 0xf1, 0x7b, 0xdf, 0x54, 0xea, 0x80, 0x9b,
76
+
0xc7, 0x99, 0x9e, 0xbd, 0x16, 0x78, 0x12, 0x53,
77
+
0x5e, 0x01, 0xa7, 0x4e, 0xbd, 0x67, 0xe1, 0x9b,
78
+
0x4c, 0x0e, 0x61, 0x45, 0x97, 0xd2, 0xf0, 0x0f,
79
+
0xfe, 0x15, 0x08, 0xb7, 0x11, 0x4c, 0xe7, 0xff,
80
+
0x81, 0x53, 0xff, 0x91, 0x25, 0x38, 0x7e, 0x40,
81
+
0x94, 0xe5, 0xe0, 0xad, 0xe6, 0xd9, 0x79, 0xb6,
82
+
0x92, 0xc9, 0xfc, 0xde, 0xc3, 0x1a, 0x23, 0xbb,
83
+
0xdd, 0xc8, 0x51, 0x0c, 0x3a, 0x72, 0xfa, 0x73,
84
+
0x6f, 0xb7, 0xee, 0x61, 0x39, 0x03, 0x01, 0x3f,
85
+
0x7f, 0x94, 0x2e, 0x2e, 0xba, 0x3a, 0xbb, 0xb4,
86
+
0xfa, 0x6a, 0x17, 0xfe, 0xea, 0xef, 0x5e, 0x66,
87
+
0x97, 0x3f, 0x32, 0x3d, 0xd7, 0x3e, 0xb1, 0xf1,
88
+
0x6c, 0x14, 0x4c, 0xfd, 0x37, 0xd3, 0x38, 0x80,
89
+
0xfb, 0xde, 0xa6, 0x24, 0x1e, 0xc8, 0xca, 0x7f,
90
+
0x3a, 0x93, 0xd8, 0x8b, 0x18, 0x13, 0xb2, 0xe5,
91
+
0xe4, 0x93, 0x05, 0x53, 0x4f, 0x84, 0x66, 0xa7,
92
+
0x58, 0x5c, 0x7b, 0x86, 0x52, 0x6d, 0x0d, 0xce,
93
+
0xa4, 0x30, 0x7d, 0xb6, 0x18, 0x9f, 0xeb, 0xff,
94
+
0x22, 0xbb, 0x72, 0x29, 0xb9, 0x44, 0x0b, 0x48,
95
+
0x1e, 0x84, 0x71, 0x81, 0xe3, 0x6d, 0x73, 0x26,
96
+
0x92, 0xb4, 0x4d, 0x2a, 0x29, 0xb8, 0x1f, 0x72,
97
+
0xed, 0xd0, 0xe1, 0x64, 0x77, 0xea, 0x8e, 0x88,
98
+
0x0f, 0xef, 0x3f, 0xb1, 0x3b, 0xad, 0xf9, 0xc9,
99
+
0x8b, 0xd0, 0xac, 0xc6, 0xcc, 0xa9, 0x40, 0xcc,
100
+
0x76, 0xf6, 0x3b, 0x53, 0xb5, 0x88, 0xcb, 0xc8,
101
+
0x37, 0xf1, 0xa2, 0xba, 0x23, 0x15, 0x99, 0x09,
102
+
0xcc, 0xe7, 0x7a, 0x3b, 0x37, 0xf7, 0x58, 0xc8,
103
+
0x46, 0x8c, 0x2b, 0x2f, 0x4e, 0x0e, 0xa6, 0x5c,
104
+
0xea, 0x85, 0x55, 0xba, 0x02, 0x0e, 0x0e, 0x48,
105
+
0xbc, 0xe1, 0xb1, 0x01, 0x35, 0x79, 0x13, 0x3d,
106
+
0x1b, 0xc0, 0x53, 0x68, 0x11, 0xe7, 0x95, 0x0f,
107
+
0x9d, 0x3f, 0x4c, 0x47, 0x7b, 0x4d, 0x1c, 0xae,
108
+
0x50, 0x9b, 0xcb, 0xdd, 0x05, 0x8d, 0x9a, 0x97,
109
+
0xfd, 0x8c, 0xef, 0x0c, 0x1d, 0x67, 0x73, 0xa8,
110
+
0x28, 0x36, 0xd5, 0xb6, 0x92, 0x33, 0x40, 0x75,
111
+
0x0b, 0x51, 0xc3, 0x64, 0xba, 0x1d, 0xc2, 0xcc,
112
+
0xee, 0x7d, 0x54, 0x0f, 0x27, 0x69, 0xa7, 0x27,
113
+
0x63, 0x30, 0x29, 0xd9, 0xc8, 0x84, 0xd8, 0xdf,
114
+
0x9f, 0x68, 0x8d, 0x04, 0xca, 0xa6, 0xc5, 0xc7,
115
+
0x7a, 0x5c, 0xc8, 0xd1, 0xcb, 0x4a, 0xec, 0xd0,
116
+
0xd8, 0x20, 0x69, 0xc5, 0x17, 0xcd, 0x78, 0xc8,
117
+
0x75, 0x23, 0x30, 0x69, 0xc9, 0xd4, 0xea, 0x5c,
118
+
0x4f, 0x6b, 0x86, 0x3f, 0x8b, 0xfe, 0xee, 0x44,
119
+
0xc9, 0x7c, 0xb7, 0xdd, 0x3e, 0xe5, 0xec, 0x54,
120
+
0x03, 0x3e, 0xaa, 0x82, 0xc6, 0xdf, 0xb2, 0x38,
121
+
0x0e, 0x5d, 0xb3, 0x88, 0xd9, 0xd3, 0x69, 0x5f,
122
+
0x8f, 0x70, 0x8a, 0x7e, 0x11, 0xd9, 0x1e, 0x7b,
123
+
0x38, 0xf1, 0x42, 0x1a, 0xc0, 0x35, 0xf5, 0xc7,
124
+
0x36, 0x85, 0xf5, 0xf7, 0xb8, 0x7e, 0xc7, 0xef,
125
+
0x18, 0xf1, 0x63, 0xd6, 0x7a, 0xc6, 0xc9, 0x0e,
126
+
0x4d, 0x69, 0x4f, 0x84, 0xef, 0x26, 0x41, 0x0c,
127
+
0xec, 0xc7, 0xe0, 0x7e, 0x3c, 0x67, 0x01, 0x4c,
128
+
0x62, 0x1a, 0x20, 0x6f, 0xee, 0x47, 0x4d, 0xc0,
129
+
0x99, 0x13, 0x8d, 0x91, 0x4a, 0x26, 0xd4, 0x37,
130
+
0x28, 0x90, 0x58, 0x75, 0x66, 0x2b, 0x0a, 0xdf,
131
+
0xda, 0xee, 0x92, 0x25, 0x90, 0x62, 0x39, 0x9e,
132
+
0x44, 0x98, 0xad, 0xc1, 0x88, 0xed, 0xe4, 0xb4,
133
+
0xaf, 0xf5, 0x8c, 0x9b, 0x48, 0x4d, 0x56, 0x60,
134
+
0x97, 0x0f, 0x61, 0x59, 0x9e, 0xa6, 0x27, 0xfe,
135
+
0xc1, 0x91, 0x15, 0x38, 0xb8, 0x0f, 0xae, 0x61,
136
+
0x7d, 0x26, 0x13, 0x5a, 0x73, 0xff, 0x1c, 0xa3,
137
+
0x61, 0x04, 0x58, 0x48, 0x55, 0x44, 0x11, 0xfe,
138
+
0x15, 0xca, 0xc3, 0xbd, 0xca, 0xc5, 0xb4, 0x40,
139
+
0x5d, 0x1b, 0x7f, 0x39, 0xb5, 0x9c, 0x35, 0xec,
140
+
0x61, 0x15, 0x32, 0x32, 0xb8, 0x4e, 0x40, 0x9f,
141
+
0x17, 0x1f, 0x0a, 0x4d, 0xa9, 0x91, 0xef, 0xb7,
142
+
0xb0, 0xeb, 0xc2, 0x83, 0x9a, 0x6c, 0xd2, 0x79,
143
+
0x43, 0x78, 0x5e, 0x2f, 0xe5, 0xdd, 0x1a, 0x3c,
144
+
0x45, 0xab, 0x29, 0x40, 0x3a, 0x37, 0x5b, 0x6f,
145
+
0xd7, 0xfc, 0x48, 0x64, 0x3c, 0x49, 0xfb, 0x21,
146
+
0xbe, 0xc3, 0xff, 0x07, 0xfb, 0x17, 0xe9, 0xc9,
147
+
0x0c, 0x4c, 0x5c, 0x15, 0x9e, 0x8e, 0x22, 0x30,
148
+
0x0a, 0xde, 0x48, 0x7f, 0xdb, 0x0d, 0xd1, 0x2b,
149
+
0x87, 0x38, 0x9e, 0xcc, 0x5a, 0x01, 0x16, 0xee,
150
+
0x75, 0x49, 0x0d, 0x30, 0x01, 0x34, 0x6a, 0xb6,
151
+
0x9a, 0x5a, 0x2a, 0xec, 0xbb, 0x48, 0xac, 0xd3,
152
+
0x77, 0x83, 0xd8, 0x08, 0x86, 0x4f, 0x48, 0x09,
153
+
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154
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155
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156
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157
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158
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159
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160
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161
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162
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163
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164
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165
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166
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167
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168
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169
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170
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171
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172
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173
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174
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175
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176
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177
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178
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179
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180
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181
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182
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183
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184
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185
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186
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187
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188
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189
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190
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191
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192
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193
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194
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195
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196
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197
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198
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199
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200
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201
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202
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203
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204
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205
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206
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207
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208
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209
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210
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211
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212
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213
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214
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215
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216
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217
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218
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219
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220
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221
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222
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223
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224
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225
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226
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227
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228
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229
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230
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231
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232
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233
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234
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235
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236
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237
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238
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239
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240
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241
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242
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243
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244
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245
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246
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247
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248
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249
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250
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251
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252
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253
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254
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255
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256
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257
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258
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259
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260
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261
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262
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0x15, 0x90, 0x57, 0x7a, 0xf6, 0xad, 0xb0, 0x5b,
263
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0xf5, 0xa6, 0x36, 0x94, 0xfd, 0x84, 0xce, 0x1c,
264
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265
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0x73, 0x93, 0x0b, 0xc3, 0xee, 0xd9, 0xcf, 0xd3,
266
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267
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0xe9, 0xb7, 0x71, 0xaf, 0x4b, 0xb3, 0xb6, 0x2f,
268
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269
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0xe8, 0x7a, 0x3a, 0xbf, 0x5f, 0x5e, 0xf8, 0x18,
270
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0x48, 0xa6, 0x72, 0xab, 0x06, 0x95, 0xe9, 0xc8,
271
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272
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273
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274
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0x31, 0x3b, 0x4d, 0xe0, 0x0e, 0x10, 0x10, 0x97,
275
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0x93, 0x49, 0x78, 0x2f, 0x0d, 0x86, 0x8b, 0xa1,
276
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0x53, 0xa9, 0x81, 0x20, 0x79, 0xe7, 0x07, 0x77,
277
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0xb6, 0xac, 0x5e, 0xd2, 0x05, 0xcd, 0xe9, 0xdb,
278
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0x8a, 0x94, 0x82, 0x8a, 0x23, 0xb9, 0x3d, 0x1c,
279
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0xa9, 0x7d, 0x72, 0x4a, 0xed, 0x33, 0xa3, 0xdb,
280
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0x21, 0xa7, 0x86, 0x33, 0x45, 0xa5, 0xaa, 0x56,
281
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0x45, 0xb5, 0x83, 0x29, 0x40, 0x47, 0x79, 0x04,
282
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0x6e, 0xb9, 0x95, 0xd0, 0x81, 0x77, 0x2d, 0x48,
283
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0x1e, 0xfe, 0xc3, 0xc2, 0x1e, 0xe5, 0xf2, 0xbe,
284
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0xfd, 0x3b, 0x94, 0x9f, 0xc4, 0xc4, 0x26, 0x9d,
285
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0xe4, 0x66, 0x1e, 0x19, 0xee, 0x6c, 0x79, 0x97,
286
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0x11, 0x31, 0x4b, 0x0d, 0x01, 0xcb, 0xde, 0xa8,
287
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0xf6, 0x6d, 0x7c, 0x39, 0x46, 0x4e, 0x7e, 0x3f,
288
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0x94, 0x17, 0xdf, 0xa1, 0x7d, 0xd9, 0x1c, 0x8e,
289
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0xbc, 0x7d, 0x33, 0x7d, 0xe3, 0x12, 0x40, 0xca,
290
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0xab, 0x37, 0x11, 0x46, 0xd4, 0xae, 0xef, 0x44,
291
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0xa2, 0xb3, 0x6a, 0x66, 0x0e, 0x0c, 0x90, 0x7f,
292
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0xdf, 0x5c, 0x66, 0x5f, 0xf2, 0x94, 0x9f, 0xa6,
293
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0x73, 0x4f, 0xeb, 0x0d, 0xad, 0xbf, 0xc0, 0x63,
294
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0x5c, 0xdc, 0x46, 0x51, 0xe8, 0x8e, 0x90, 0x19,
295
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0xa8, 0xa4, 0x3c, 0x91, 0x79, 0xfa, 0x7e, 0x58,
296
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0x85, 0x13, 0x55, 0xc5, 0x19, 0x82, 0x37, 0x1b,
297
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0x0a, 0x02, 0x1f, 0x99, 0x6b, 0x18, 0xf1, 0x28,
298
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0x08, 0xa2, 0x73, 0xb8, 0x0f, 0x2e, 0xcd, 0xbf,
299
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0xf3, 0x86, 0x7f, 0xea, 0xef, 0xd0, 0xbb, 0xa6,
300
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0x21, 0xdf, 0x49, 0x73, 0x51, 0xcc, 0x36, 0xd3,
301
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0x3e, 0xa0, 0xf8, 0x44, 0xdf, 0xd3, 0xa6, 0xbe,
302
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0x8a, 0xd4, 0x57, 0xdd, 0x72, 0x94, 0x61, 0x0f,
303
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0x82, 0xd1, 0x07, 0xb8, 0x7c, 0x18, 0x83, 0xdf,
304
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0x3a, 0xe5, 0x50, 0x6a, 0x82, 0x20, 0xac, 0xa9,
305
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0xa8, 0xff, 0xd9, 0xf3, 0x77, 0x33, 0x5a, 0x9e,
306
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0x7f, 0x6d, 0xfe, 0x5d, 0x33, 0x41, 0x42, 0xe7,
307
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0x6c, 0x19, 0xe0, 0x44, 0x8a, 0x15, 0xf6, 0x70,
308
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0x98, 0xb7, 0x68, 0x4d, 0xfa, 0x97, 0x39, 0xb0,
309
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0x8e, 0xe8, 0x84, 0x8b, 0x75, 0x30, 0xb7, 0x7d,
310
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0x92, 0x69, 0x20, 0x9c, 0x81, 0xfb, 0x4b, 0xf4,
311
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312
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0x4a, 0xd7, 0x27, 0x0c, 0xce, 0xbb, 0xe5, 0x85,
313
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0xf0, 0xb6, 0xee, 0xd5, 0x70, 0xdd, 0x3b, 0xfc,
314
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0xd4, 0x99, 0xf1, 0x33, 0xdd, 0x8b, 0xc4, 0x2f,
315
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0xae, 0xab, 0x74, 0x96, 0x32, 0xc7, 0x4c, 0x56,
316
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317
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0xee, 0x0f, 0x0b, 0x8c, 0xfb, 0x7e, 0x47, 0x7b,
318
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319
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0x13, 0x55, 0x62, 0xfc, 0x8f, 0xe2, 0x42, 0x03,
320
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0xb7, 0x4e, 0x2a, 0x79, 0xb4, 0x82, 0xea, 0x23,
321
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0x49, 0xda, 0xaf, 0x52, 0x63, 0x1e, 0x60, 0x03,
322
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323
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0x70, 0x2e, 0xda, 0x94, 0xad, 0x6b, 0xe0, 0xe4,
324
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0xd1, 0x8a, 0x06, 0xc2, 0xa8, 0xc0, 0xa7, 0x43,
325
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326
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0x67, 0x0e, 0xa0, 0x70, 0x04, 0x47, 0x29, 0x40,
327
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328
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0x68, 0xdc, 0x93, 0x81, 0x70, 0xee, 0x86, 0xd9,
329
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0x80, 0x06, 0x40, 0x4f, 0x1a, 0x0d, 0x40, 0x30,
330
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0x0b, 0xcb, 0x96, 0x47, 0xc1, 0xb7, 0x52, 0xfd,
331
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0x56, 0xe0, 0x72, 0x4b, 0xfb, 0xbd, 0x92, 0x45,
332
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0x61, 0x71, 0xc2, 0x33, 0x11, 0xbf, 0x52, 0x83,
333
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0x79, 0x26, 0xe0, 0x49, 0x6b, 0xb7, 0x05, 0x8b,
334
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0xe8, 0x0e, 0x87, 0x31, 0xd7, 0x9d, 0x8a, 0xf5,
335
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0xc0, 0x5f, 0x2e, 0x58, 0x4a, 0xdb, 0x11, 0xb3,
336
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0x6c, 0x30, 0x2a, 0x46, 0x19, 0xe3, 0x27, 0x84,
337
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338
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0x5e, 0xba, 0xb3, 0x87, 0xd5, 0x83, 0x26, 0x34,
339
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0x21, 0x9e, 0x65, 0xde, 0x42, 0xd3, 0xbe, 0x7b,
340
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341
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0xe5, 0x3f, 0x11, 0x4e, 0x7f, 0x13, 0x51, 0x3b,
342
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0xae, 0x79, 0xc9, 0xd3, 0x81, 0x8e, 0x25, 0x40,
343
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0x10, 0xfc, 0x07, 0x1e, 0xf9, 0x7b, 0x9a, 0x4b,
344
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0x6c, 0xe3, 0xb3, 0xad, 0x1a, 0x0a, 0xdd, 0x9e,
345
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0x59, 0x0c, 0xa2, 0xcd, 0xae, 0x48, 0x4a, 0x38,
346
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0x5b, 0x47, 0x41, 0x94, 0x65, 0x6b, 0xbb, 0xeb,
347
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0x5b, 0xe3, 0xaf, 0x07, 0x5b, 0xd4, 0x4a, 0xa2,
348
+
0xc9, 0x5d, 0x2f, 0x64, 0x03, 0xd7, 0x3a, 0x2c,
349
+
0x6e, 0xce, 0x76, 0x95, 0xb4, 0xb3, 0xc0, 0xf1,
350
+
0xe2, 0x45, 0x73, 0x7a, 0x5c, 0xab, 0xc1, 0xfc,
351
+
0x02, 0x8d, 0x81, 0x29, 0xb3, 0xac, 0x07, 0xec,
352
+
0x40, 0x7d, 0x45, 0xd9, 0x7a, 0x59, 0xee, 0x34,
353
+
0xf0, 0xe9, 0xd5, 0x7b, 0x96, 0xb1, 0x3d, 0x95,
354
+
0xcc, 0x86, 0xb5, 0xb6, 0x04, 0x2d, 0xb5, 0x92,
355
+
0x7e, 0x76, 0xf4, 0x06, 0xa9, 0xa3, 0x12, 0x0f,
356
+
0xb1, 0xaf, 0x26, 0xba, 0x7c, 0xfc, 0x7e, 0x1c,
357
+
0xbc, 0x2c, 0x49, 0x97, 0x53, 0x60, 0x13, 0x0b,
358
+
0xa6, 0x61, 0x83, 0x89, 0x42, 0xd4, 0x17, 0x0c,
359
+
0x6c, 0x26, 0x52, 0xc3, 0xb3, 0xd4, 0x67, 0xf5,
360
+
0xe3, 0x04, 0xb7, 0xf4, 0xcb, 0x80, 0xb8, 0xcb,
361
+
0x77, 0x56, 0x3e, 0xaa, 0x57, 0x54, 0xee, 0xb4,
362
+
0x2c, 0x67, 0xcf, 0xf2, 0xdc, 0xbe, 0x55, 0xf9,
363
+
0x43, 0x1f, 0x6e, 0x22, 0x97, 0x67, 0x7f, 0xc4,
364
+
0xef, 0xb1, 0x26, 0x31, 0x1e, 0x27, 0xdf, 0x41,
365
+
0x80, 0x47, 0x6c, 0xe2, 0xfa, 0xa9, 0x8c, 0x2a,
366
+
0xf6, 0xf2, 0xab, 0xf0, 0x15, 0xda, 0x6c, 0xc8,
367
+
0xfe, 0xb5, 0x23, 0xde, 0xa9, 0x05, 0x3f, 0x06,
368
+
0x54, 0x4c, 0xcd, 0xe1, 0xab, 0xfc, 0x0e, 0x62,
369
+
0x33, 0x31, 0x73, 0x2c, 0x76, 0xcb, 0xb4, 0x47,
370
+
0x1e, 0x20, 0xad, 0xd8, 0xf2, 0x31, 0xdd, 0xc4,
371
+
0x8b, 0x0c, 0x77, 0xbe, 0xe1, 0x8b, 0x26, 0x00,
372
+
0x02, 0x58, 0xd6, 0x8d, 0xef, 0xad, 0x74, 0x67,
373
+
0xab, 0x3f, 0xef, 0xcb, 0x6f, 0xb0, 0xcc, 0x81,
374
+
0x44, 0x4c, 0xaf, 0xe9, 0x49, 0x4f, 0xdb, 0xa0,
375
+
0x25, 0xa4, 0xf0, 0x89, 0xf1, 0xbe, 0xd8, 0x10,
376
+
0xff, 0xb1, 0x3b, 0x4b, 0xfa, 0x98, 0xf5, 0x79,
377
+
0x6d, 0x1e, 0x69, 0x4d, 0x57, 0xb1, 0xc8, 0x19,
378
+
0x1b, 0xbd, 0x1e, 0x8c, 0x84, 0xb7, 0x7b, 0xe8,
379
+
0xd2, 0x2d, 0x09, 0x41, 0x41, 0x37, 0x3d, 0xb1,
380
+
0x6f, 0x26, 0x5d, 0x71, 0x16, 0x3d, 0xb7, 0x83,
381
+
0x27, 0x2c, 0xa7, 0xb6, 0x50, 0xbd, 0x91, 0x86,
382
+
0xab, 0x24, 0xa1, 0x38, 0xfd, 0xea, 0x71, 0x55,
383
+
0x7e, 0x9a, 0x07, 0x77, 0x4b, 0xfa, 0x61, 0x66,
384
+
0x20, 0x1e, 0x28, 0x95, 0x18, 0x1b, 0xa4, 0xa0,
385
+
0xfd, 0xc0, 0x89, 0x72, 0x43, 0xd9, 0x3b, 0x49,
386
+
0x5a, 0x3f, 0x9d, 0xbf, 0xdb, 0xb4, 0x46, 0xea,
387
+
0x42, 0x01, 0x77, 0x23, 0x68, 0x95, 0xb6, 0x24,
388
+
0xb3, 0xa8, 0x6c, 0x28, 0x3b, 0x11, 0x40, 0x7e,
389
+
0x18, 0x65, 0x6d, 0xd8, 0x24, 0x42, 0x7d, 0x88,
390
+
0xc0, 0x52, 0xd9, 0x05, 0xe4, 0x95, 0x90, 0x87,
391
+
0x8c, 0xf4, 0xd0, 0x6b, 0xb9, 0x83, 0x99, 0x34,
392
+
0x6d, 0xfe, 0x54, 0x40, 0x94, 0x52, 0x21, 0x4f,
393
+
0x14, 0x25, 0xc5, 0xd6, 0x5e, 0x95, 0xdc, 0x0a,
394
+
0x2b, 0x89, 0x20, 0x11, 0x84, 0x48, 0xd6, 0x3a,
395
+
0xcd, 0x5c, 0x24, 0xad, 0x62, 0xe3, 0xb1, 0x93,
396
+
0x25, 0x8d, 0xcd, 0x7e, 0xfc, 0x27, 0xa3, 0x37,
397
+
0xfd, 0x84, 0xfc, 0x1b, 0xb2, 0xf1, 0x27, 0x38,
398
+
0x5a, 0xb7, 0xfc, 0xf2, 0xfa, 0x95, 0x66, 0xd4,
399
+
0xfb, 0xba, 0xa7, 0xd7, 0xa3, 0x72, 0x69, 0x48,
400
+
0x48, 0x8c, 0xeb, 0x28, 0x89, 0xfe, 0x33, 0x65,
401
+
0x5a, 0x36, 0x01, 0x7e, 0x06, 0x79, 0x0a, 0x09,
402
+
0x3b, 0x74, 0x11, 0x9a, 0x6e, 0xbf, 0xd4, 0x9e,
403
+
0x58, 0x90, 0x49, 0x4f, 0x4d, 0x08, 0xd4, 0xe5,
404
+
0x4a, 0x09, 0x21, 0xef, 0x8b, 0xb8, 0x74, 0x3b,
405
+
0x91, 0xdd, 0x36, 0x85, 0x60, 0x2d, 0xfa, 0xd4,
406
+
0x45, 0x7b, 0x45, 0x53, 0xf5, 0x47, 0x87, 0x7e,
407
+
0xa6, 0x37, 0xc8, 0x78, 0x7a, 0x68, 0x9d, 0x8d,
408
+
0x65, 0x2c, 0x0e, 0x91, 0x5c, 0xa2, 0x60, 0xf0,
409
+
0x8e, 0x3f, 0xe9, 0x1a, 0xcd, 0xaa, 0xe7, 0xd5,
410
+
0x77, 0x18, 0xaf, 0xc9, 0xbc, 0x18, 0xea, 0x48,
411
+
0x1b, 0xfb, 0x22, 0x48, 0x70, 0x16, 0x29, 0x9e,
412
+
0x5b, 0xc1, 0x2c, 0x66, 0x23, 0xbc, 0xf0, 0x1f,
413
+
0xef, 0xaf, 0xe4, 0xd6, 0x04, 0x19, 0x82, 0x7a,
414
+
0x0b, 0xba, 0x4b, 0x46, 0xb1, 0x6a, 0x85, 0x5d,
415
+
0xb4, 0x73, 0xd6, 0x21, 0xa1, 0x71, 0x60, 0x14,
416
+
0xee, 0x0a, 0x77, 0xc4, 0x66, 0x2e, 0xf9, 0x69,
417
+
0x30, 0xaf, 0x41, 0x0b, 0xc8, 0x83, 0x3c, 0x53,
418
+
0x99, 0x19, 0x27, 0x46, 0xf7, 0x41, 0x6e, 0x56,
419
+
0xdc, 0x94, 0x28, 0x67, 0x4e, 0xb7, 0x25, 0x48,
420
+
0x8a, 0xc2, 0xe0, 0x60, 0x96, 0xcc, 0x18, 0xf4,
421
+
0x84, 0xdd, 0xa7, 0x5e, 0x3e, 0x05, 0x0b, 0x26,
422
+
0x26, 0xb2, 0x5c, 0x1f, 0x57, 0x1a, 0x04, 0x7e,
423
+
0x6a, 0xe3, 0x2f, 0xb4, 0x35, 0xb6, 0x38, 0x40,
424
+
0x40, 0xcd, 0x6f, 0x87, 0x2e, 0xef, 0xa3, 0xd7,
425
+
0xa9, 0xc2, 0xe8, 0x0d, 0x27, 0xdf, 0x44, 0x62,
426
+
0x99, 0xa0, 0xfc, 0xcf, 0x81, 0x78, 0xcb, 0xfe,
427
+
0xe5, 0xa0, 0x03, 0x4e, 0x6c, 0xd7, 0xf4, 0xaf,
428
+
0x7a, 0xbb, 0x61, 0x82, 0xfe, 0x71, 0x89, 0xb2,
429
+
0x22, 0x7c, 0x8e, 0x83, 0x04, 0xce, 0xf6, 0x5d,
430
+
0x84, 0x8f, 0x95, 0x6a, 0x7f, 0xad, 0xfd, 0x32,
431
+
0x9c, 0x5e, 0xe4, 0x9c, 0x89, 0x60, 0x54, 0xaa,
432
+
0x96, 0x72, 0xd2, 0xd7, 0x36, 0x85, 0xa9, 0x45,
433
+
0xd2, 0x2a, 0xa1, 0x81, 0x49, 0x6f, 0x7e, 0x04,
434
+
0xfa, 0xe2, 0xfe, 0x90, 0x26, 0x77, 0x5a, 0x33,
435
+
0xb8, 0x04, 0x9a, 0x7a, 0xe6, 0x4c, 0x4f, 0xad,
436
+
0x72, 0x96, 0x08, 0x28, 0x58, 0x13, 0xf8, 0xc4,
437
+
0x1c, 0xf0, 0xc3, 0x45, 0x95, 0x49, 0x20, 0x8c,
438
+
0x9f, 0x39, 0x70, 0xe1, 0x77, 0xfe, 0xd5, 0x4b,
439
+
0xaf, 0x86, 0xda, 0xef, 0x22, 0x06, 0x83, 0x36,
440
+
0x29, 0x12, 0x11, 0x40, 0xbc, 0x3b, 0x86, 0xaa,
441
+
0xaa, 0x65, 0x60, 0xc3, 0x80, 0xca, 0xed, 0xa9,
442
+
0xf3, 0xb0, 0x79, 0x96, 0xa2, 0x55, 0x27, 0x28,
443
+
0x55, 0x73, 0x26, 0xa5, 0x50, 0xea, 0x92, 0x4b,
444
+
0x3c, 0x5c, 0x82, 0x33, 0xf0, 0x01, 0x3f, 0x03,
445
+
0xc1, 0x08, 0x05, 0xbf, 0x98, 0xf4, 0x9b, 0x6d,
446
+
0xa5, 0xa8, 0xb4, 0x82, 0x0c, 0x06, 0xfa, 0xff,
447
+
0x2d, 0x08, 0xf3, 0x05, 0x4f, 0x57, 0x2a, 0x39,
448
+
0xd4, 0x83, 0x0d, 0x75, 0x51, 0xd8, 0x5b, 0x1b,
449
+
0xd3, 0x51, 0x5a, 0x32, 0x2a, 0x9b, 0x32, 0xb2,
450
+
0xf2, 0xa4, 0x96, 0x12, 0xf2, 0xae, 0x40, 0x34,
451
+
0x67, 0xa8, 0xf5, 0x44, 0xd5, 0x35, 0x53, 0xfe,
452
+
0xa3, 0x60, 0x96, 0x63, 0x0f, 0x1f, 0x6e, 0xb0,
453
+
0x5a, 0x42, 0xa6, 0xfc, 0x51, 0x0b, 0x60, 0x27,
454
+
0xbc, 0x06, 0x71, 0xed, 0x65, 0x5b, 0x23, 0x86,
455
+
0x4a, 0x07, 0x3b, 0x22, 0x07, 0x46, 0xe6, 0x90,
456
+
0x3e, 0xf3, 0x25, 0x50, 0x1b, 0x4c, 0x7f, 0x03,
457
+
0x08, 0xa8, 0x36, 0x6b, 0x87, 0xe5, 0xe3, 0xdb,
458
+
0x9a, 0x38, 0x83, 0xff, 0x9f, 0x1a, 0x9f, 0x57,
459
+
0xa4, 0x2a, 0xf6, 0x37, 0xbc, 0x1a, 0xff, 0xc9,
460
+
0x1e, 0x35, 0x0c, 0xc3, 0x7c, 0xa3, 0xb2, 0xe5,
461
+
0xd2, 0xc6, 0xb4, 0x57, 0x47, 0xe4, 0x32, 0x16,
462
+
0x6d, 0xa9, 0xae, 0x64, 0xe6, 0x2d, 0x8d, 0xc5,
463
+
0x8d, 0x50, 0x8e, 0xe8, 0x1a, 0x22, 0x34, 0x2a,
464
+
0xd9, 0xeb, 0x51, 0x90, 0x4a, 0xb1, 0x41, 0x7d,
465
+
0x64, 0xf9, 0xb9, 0x0d, 0xf6, 0x23, 0x33, 0xb0,
466
+
0x33, 0xf4, 0xf7, 0x3f, 0x27, 0x84, 0xc6, 0x0f,
467
+
0x54, 0xa5, 0xc0, 0x2e, 0xec, 0x0b, 0x3a, 0x48,
468
+
0x6e, 0x80, 0x35, 0x81, 0x43, 0x9b, 0x90, 0xb1,
469
+
0xd0, 0x2b, 0xea, 0x21, 0xdc, 0xda, 0x5b, 0x09,
470
+
0xf4, 0xcc, 0x10, 0xb4, 0xc7, 0xfe, 0x79, 0x51,
471
+
0xc3, 0xc5, 0xac, 0x88, 0x74, 0x84, 0x0b, 0x4b,
472
+
0xca, 0x79, 0x16, 0x29, 0xfb, 0x69, 0x54, 0xdf,
473
+
0x41, 0x7e, 0xe9, 0xc7, 0x8e, 0xea, 0xa5, 0xfe,
474
+
0xfc, 0x76, 0x0e, 0x90, 0xc4, 0x92, 0x38, 0xad,
475
+
0x7b, 0x48, 0xe6, 0x6e, 0xf7, 0x21, 0xfd, 0x4e,
476
+
0x93, 0x0a, 0x7b, 0x41, 0x83, 0x68, 0xfb, 0x57,
477
+
0x51, 0x76, 0x34, 0xa9, 0x6c, 0x00, 0xaa, 0x4f,
478
+
0x66, 0x65, 0x98, 0x4a, 0x4f, 0xa3, 0xa0, 0xef,
479
+
0x69, 0x3f, 0xe3, 0x1c, 0x92, 0x8c, 0xfd, 0xd8,
480
+
0xe8, 0xde, 0x7c, 0x7f, 0x3e, 0x84, 0x8e, 0x69,
481
+
0x3c, 0xf1, 0xf2, 0x05, 0x46, 0xdc, 0x2f, 0x9d,
482
+
0x5e, 0x6e, 0x4c, 0xfb, 0xb5, 0x99, 0x2a, 0x59,
483
+
0x63, 0xc1, 0x34, 0xbc, 0x57, 0xc0, 0x0d, 0xb9,
484
+
0x61, 0x25, 0xf3, 0x33, 0x23, 0x51, 0xb6, 0x0d,
485
+
0x07, 0xa6, 0xab, 0x94, 0x4a, 0xb7, 0x2a, 0xea,
486
+
0xee, 0xac, 0xa3, 0xc3, 0x04, 0x8b, 0x0e, 0x56,
487
+
0xfe, 0x44, 0xa7, 0x39, 0xe2, 0xed, 0xed, 0xb4,
488
+
0x22, 0x2b, 0xac, 0x12, 0x32, 0x28, 0x91, 0xd8,
489
+
0xa5, 0xab, 0xff, 0x5f, 0xe0, 0x4b, 0xda, 0x78,
490
+
0x17, 0xda, 0xf1, 0x01, 0x5b, 0xcd, 0xe2, 0x5f,
491
+
0x50, 0x45, 0x73, 0x2b, 0xe4, 0x76, 0x77, 0xf4,
492
+
0x64, 0x1d, 0x43, 0xfb, 0x84, 0x7a, 0xea, 0x91,
493
+
0xae, 0xf9, 0x9e, 0xb7, 0xb4, 0xb0, 0x91, 0x5f,
494
+
0x16, 0x35, 0x9a, 0x11, 0xb8, 0xc7, 0xc1, 0x8c,
495
+
0xc6, 0x10, 0x8d, 0x2f, 0x63, 0x4a, 0xa7, 0x57,
496
+
0x3a, 0x51, 0xd6, 0x32, 0x2d, 0x64, 0x72, 0xd4,
497
+
0x66, 0xdc, 0x10, 0xa6, 0x67, 0xd6, 0x04, 0x23,
498
+
0x9d, 0x0a, 0x11, 0x77, 0xdd, 0x37, 0x94, 0x17,
499
+
0x3c, 0xbf, 0x8b, 0x65, 0xb0, 0x2e, 0x5e, 0x66,
500
+
0x47, 0x64, 0xac, 0xdd, 0xf0, 0x84, 0xfd, 0x39,
501
+
0xfa, 0x15, 0x5d, 0xef, 0xae, 0xca, 0xc1, 0x36,
502
+
0xa7, 0x5c, 0xbf, 0xc7, 0x08, 0xc2, 0x66, 0x00,
503
+
0x74, 0x74, 0x4e, 0x27, 0x3f, 0x55, 0x8a, 0xb7,
504
+
0x38, 0x66, 0x83, 0x6d, 0xcf, 0x99, 0x9e, 0x60,
505
+
0x8f, 0xdd, 0x2e, 0x62, 0x22, 0x0e, 0xef, 0x0c,
506
+
0x98, 0xa7, 0x85, 0x74, 0x3b, 0x9d, 0xec, 0x9e,
507
+
0xa9, 0x19, 0x72, 0xa5, 0x7f, 0x2c, 0x39, 0xb7,
508
+
0x7d, 0xb7, 0xf1, 0x12, 0x65, 0x27, 0x4b, 0x5a,
509
+
0xde, 0x17, 0xfe, 0xad, 0x44, 0xf3, 0x20, 0x4d,
510
+
0xfd, 0xe4, 0x1f, 0xb5, 0x81, 0xb0, 0x36, 0x37,
511
+
0x08, 0x6f, 0xc3, 0x0c, 0xe9, 0x85, 0x98, 0x82,
512
+
0xa9, 0x62, 0x0c, 0xc4, 0x97, 0xc0, 0x50, 0xc8,
513
+
0xa7, 0x3c, 0x50, 0x9f, 0x43, 0xb9, 0xcd, 0x5e,
514
+
0x4d, 0xfa, 0x1c, 0x4b, 0x0b, 0xa9, 0x98, 0x85,
515
+
0x38, 0x92, 0xac, 0x8d, 0xe4, 0xad, 0x9b, 0x98,
516
+
0xab, 0xd9, 0x38, 0xac, 0x62, 0x52, 0xa3, 0x22,
517
+
0x63, 0x0f, 0xbf, 0x95, 0x48, 0xdf, 0x69, 0xe7,
518
+
0x8b, 0x33, 0xd5, 0xb2, 0xbd, 0x05, 0x49, 0x49,
519
+
0x9d, 0x57, 0x73, 0x19, 0x33, 0xae, 0xfa, 0x33,
520
+
0xf1, 0x19, 0xa8, 0x80, 0xce, 0x04, 0x9f, 0xbc,
521
+
0x1d, 0x65, 0x82, 0x1b, 0xe5, 0x3a, 0x51, 0xc8,
522
+
0x1c, 0x21, 0xe3, 0x5d, 0xf3, 0x7d, 0x9b, 0x2f,
523
+
0x2c, 0x1d, 0x4a, 0x7f, 0x9b, 0x68, 0x35, 0xa3,
524
+
0xb2, 0x50, 0xf7, 0x62, 0x79, 0xcd, 0xf4, 0x98,
525
+
0x4f, 0xe5, 0x63, 0x7c, 0x3e, 0x45, 0x31, 0x8c,
526
+
0x16, 0xa0, 0x12, 0xc8, 0x58, 0xce, 0x39, 0xa6,
527
+
0xbc, 0x54, 0xdb, 0xc5, 0xe0, 0xd5, 0xba, 0xbc,
528
+
0xb9, 0x04, 0xf4, 0x8d, 0xe8, 0x2f, 0x15, 0x9d,
529
+
};
530
+
531
+
/* 100 test cases */
532
+
static struct dahash_test {
533
+
uint16_t start; /* random 12 bit offset in buf */
534
+
uint16_t length; /* random 8 bit length of test */
535
+
xfs_dahash_t dahash; /* expected dahash result */
536
+
} test[] __initdata =
537
+
{
538
+
{0x0567, 0x0097, 0x96951389},
539
+
{0x0869, 0x0055, 0x6455ab4f},
540
+
{0x0c51, 0x00be, 0x8663afde},
541
+
{0x044a, 0x00fc, 0x98fbe432},
542
+
{0x0f29, 0x0079, 0x42371997},
543
+
{0x08ba, 0x0052, 0x942be4f7},
544
+
{0x01f2, 0x0013, 0x5262687e},
545
+
{0x09e3, 0x00e2, 0x8ffb0908},
546
+
{0x007c, 0x0051, 0xb3158491},
547
+
{0x0854, 0x001f, 0x83bb20d9},
548
+
{0x031b, 0x0008, 0x98970bdf},
549
+
{0x0de7, 0x0027, 0xbfbf6f6c},
550
+
{0x0f76, 0x0005, 0x906a7105},
551
+
{0x092e, 0x00d0, 0x86631850},
552
+
{0x0233, 0x0082, 0xdbdd914e},
553
+
{0x04c9, 0x0075, 0x5a400a9e},
554
+
{0x0b66, 0x0099, 0xae128b45},
555
+
{0x000d, 0x00ed, 0xe61c216a},
556
+
{0x0a31, 0x003d, 0xf69663b9},
557
+
{0x00a3, 0x0052, 0x643c39ae},
558
+
{0x0125, 0x00d5, 0x7c310b0d},
559
+
{0x0105, 0x004a, 0x06a77e74},
560
+
{0x0858, 0x008e, 0x265bc739},
561
+
{0x045e, 0x0095, 0x13d6b192},
562
+
{0x0dab, 0x003c, 0xc4498704},
563
+
{0x00cd, 0x00b5, 0x802a4e2d},
564
+
{0x069b, 0x008c, 0x5df60f71},
565
+
{0x0454, 0x006c, 0x5f03d8bb},
566
+
{0x040e, 0x0032, 0x0ce513b5},
567
+
{0x0874, 0x00e2, 0x6a811fb3},
568
+
{0x0521, 0x00b4, 0x93296833},
569
+
{0x0ddc, 0x00cf, 0xf9305338},
570
+
{0x0a70, 0x0023, 0x239549ea},
571
+
{0x083e, 0x0027, 0x2d88ba97},
572
+
{0x0241, 0x00a7, 0xfe0b32e1},
573
+
{0x0dfc, 0x0096, 0x1a11e815},
574
+
{0x023e, 0x001e, 0xebc9a1f3},
575
+
{0x067e, 0x0066, 0xb1067f81},
576
+
{0x09ea, 0x000e, 0x46fd7247},
577
+
{0x036b, 0x008c, 0x1a39acdf},
578
+
{0x078f, 0x0030, 0x964042ab},
579
+
{0x085c, 0x008f, 0x1829edab},
580
+
{0x02ec, 0x009f, 0x6aefa72d},
581
+
{0x043b, 0x00ce, 0x65642ff5},
582
+
{0x0a32, 0x00b8, 0xbd82759e},
583
+
{0x0d3c, 0x0087, 0xf4d66d54},
584
+
{0x09ec, 0x008a, 0x06bfa1ff},
585
+
{0x0902, 0x0015, 0x755025d2},
586
+
{0x08fe, 0x000e, 0xf690ce2d},
587
+
{0x00fb, 0x00dc, 0xe55f1528},
588
+
{0x0eaa, 0x003a, 0x0fe0a8d7},
589
+
{0x05fb, 0x0006, 0x86281cfb},
590
+
{0x0dd1, 0x00a7, 0x60ab51b4},
591
+
{0x0005, 0x001b, 0xf51d969b},
592
+
{0x077c, 0x00dd, 0xc2fed268},
593
+
{0x0575, 0x00f5, 0x432c0b1a},
594
+
{0x05be, 0x0088, 0x78baa04b},
595
+
{0x0c89, 0x0068, 0xeda9e428},
596
+
{0x0f5c, 0x0068, 0xec143c76},
597
+
{0x06a8, 0x0009, 0xd72651ce},
598
+
{0x060f, 0x008e, 0x765426cd},
599
+
{0x07b1, 0x0047, 0x2cfcfa0c},
600
+
{0x04f1, 0x0041, 0x55b172f9},
601
+
{0x0e05, 0x00ac, 0x61efde93},
602
+
{0x0bf7, 0x0097, 0x05b83eee},
603
+
{0x04e9, 0x00f3, 0x9928223a},
604
+
{0x023a, 0x0005, 0xdfada9bc},
605
+
{0x0acb, 0x000e, 0x2217cecd},
606
+
{0x0148, 0x0060, 0xbc3f7405},
607
+
{0x0764, 0x0059, 0xcbc201b1},
608
+
{0x021f, 0x0059, 0x5d6b2256},
609
+
{0x0f1e, 0x006c, 0xdefeeb45},
610
+
{0x071c, 0x00b9, 0xb9b59309},
611
+
{0x0564, 0x0063, 0xae064271},
612
+
{0x0b14, 0x0044, 0xdb867d9b},
613
+
{0x0e5a, 0x0055, 0xff06b685},
614
+
{0x015e, 0x00ba, 0x1115ccbc},
615
+
{0x0379, 0x00e6, 0x5f4e58dd},
616
+
{0x013b, 0x0067, 0x4897427e},
617
+
{0x0e64, 0x0071, 0x7af2b7a4},
618
+
{0x0a11, 0x0050, 0x92105726},
619
+
{0x0109, 0x0055, 0xd0d000f9},
620
+
{0x00aa, 0x0022, 0x815d229d},
621
+
{0x09ac, 0x004f, 0x02f9d985},
622
+
{0x0e1b, 0x00ce, 0x5cf92ab4},
623
+
{0x08af, 0x00d8, 0x17ca72d1},
624
+
{0x0e33, 0x000a, 0xda2dba6b},
625
+
{0x0ee3, 0x006a, 0xb00048e5},
626
+
{0x0648, 0x001a, 0x2364b8cb},
627
+
{0x0315, 0x0085, 0x0596fd0d},
628
+
{0x0fbb, 0x003e, 0x298230ca},
629
+
{0x0422, 0x006a, 0x78ada4ab},
630
+
{0x04ba, 0x0073, 0xced1fbc2},
631
+
{0x007d, 0x0061, 0x4b7ff236},
632
+
{0x070b, 0x00d0, 0x261cf0ae},
633
+
{0x0c1a, 0x0035, 0x8be92ee2},
634
+
{0x0af8, 0x0063, 0x824dcf03},
635
+
{0x08f8, 0x006d, 0xd289710c},
636
+
{0x021b, 0x00ee, 0x6ac1c41d},
637
+
{0x05b5, 0x00da, 0x8e52f0e2},
638
+
};
639
+
640
+
int __init
641
+
xfs_dahash_test(void)
642
+
{
643
+
unsigned int i;
644
+
unsigned int errors = 0;
645
+
646
+
for (i = 0; i < ARRAY_SIZE(test); i++) {
647
+
xfs_dahash_t hash;
648
+
649
+
hash = xfs_da_hashname(test_buf + test[i].start,
650
+
test[i].length);
651
+
if (hash != test[i].dahash)
652
+
errors++;
653
+
}
654
+
655
+
if (errors) {
656
+
printk(KERN_ERR "xfs dir/attr hash test failed %u times!",
657
+
errors);
658
+
return -ERANGE;
659
+
}
660
+
661
+
return 0;
662
+
}
+12
fs/xfs/xfs_dahash_test.h
+12
fs/xfs/xfs_dahash_test.h
···
1
+
// SPDX-License-Identifier: GPL-2.0-or-later
2
+
/*
3
+
* Copyright (C) 2023 Oracle. All Rights Reserved.
4
+
* Author: Darrick J. Wong <djwong@kernel.org>
5
+
*/
6
+
#ifndef __XFS_DAHASH_TEST_H__
7
+
#define __XFS_DAHASH_TEST_H__
8
+
9
+
int xfs_dahash_test(void);
10
+
11
+
#endif /* __XFS_DAHASH_TEST_H__ */
12
+
+4
-1
fs/xfs/xfs_iomap.c
+4
-1
fs/xfs/xfs_iomap.c
···
1090
1090
*/
1091
1091
if (xfs_has_allocsize(mp))
1092
1092
prealloc_blocks = mp->m_allocsize_blocks;
1093
-
else
1093
+
else if (allocfork == XFS_DATA_FORK)
1094
1094
prealloc_blocks = xfs_iomap_prealloc_size(ip, allocfork,
1095
1095
offset, count, &icur);
1096
+
else
1097
+
prealloc_blocks = xfs_iomap_prealloc_size(ip, allocfork,
1098
+
offset, count, &ccur);
1096
1099
if (prealloc_blocks) {
1097
1100
xfs_extlen_t align;
1098
1101
xfs_off_t end_offset;
+5
fs/xfs/xfs_super.c
+5
fs/xfs/xfs_super.c
···
41
41
#include "xfs_attr_item.h"
42
42
#include "xfs_xattr.h"
43
43
#include "xfs_iunlink_item.h"
44
+
#include "xfs_dahash_test.h"
44
45
45
46
#include <linux/magic.h>
46
47
#include <linux/fs_context.h>
···
2286
2285
int error;
2287
2286
2288
2287
xfs_check_ondisk_structs();
2288
+
2289
+
error = xfs_dahash_test();
2290
+
if (error)
2291
+
return error;
2289
2292
2290
2293
printk(KERN_INFO XFS_VERSION_STRING " with "
2291
2294
XFS_BUILD_OPTIONS " enabled\n");
+7
fs/xfs/xfs_trace.h
+7
fs/xfs/xfs_trace.h
···
1883
1883
DEFINE_ALLOC_EVENT(xfs_alloc_vextent_loopfailed);
1884
1884
DEFINE_ALLOC_EVENT(xfs_alloc_vextent_allfailed);
1885
1885
1886
+
DEFINE_ALLOC_EVENT(xfs_alloc_vextent_this_ag);
1887
+
DEFINE_ALLOC_EVENT(xfs_alloc_vextent_start_ag);
1888
+
DEFINE_ALLOC_EVENT(xfs_alloc_vextent_first_ag);
1889
+
DEFINE_ALLOC_EVENT(xfs_alloc_vextent_exact_bno);
1890
+
DEFINE_ALLOC_EVENT(xfs_alloc_vextent_near_bno);
1891
+
DEFINE_ALLOC_EVENT(xfs_alloc_vextent_finish);
1892
+
1886
1893
TRACE_EVENT(xfs_alloc_cur_check,
1887
1894
TP_PROTO(struct xfs_mount *mp, xfs_btnum_t btnum, xfs_agblock_t bno,
1888
1895
xfs_extlen_t len, xfs_extlen_t diff, bool new),
+26
-2
fs/zonefs/file.c
+26
-2
fs/zonefs/file.c
···
382
382
struct zonefs_zone *z = zonefs_inode_zone(inode);
383
383
struct block_device *bdev = inode->i_sb->s_bdev;
384
384
unsigned int max = bdev_max_zone_append_sectors(bdev);
385
+
pgoff_t start, end;
385
386
struct bio *bio;
386
387
ssize_t size = 0;
387
388
int nr_pages;
···
390
389
391
390
max = ALIGN_DOWN(max << SECTOR_SHIFT, inode->i_sb->s_blocksize);
392
391
iov_iter_truncate(from, max);
392
+
393
+
/*
394
+
* If the inode block size (zone write granularity) is smaller than the
395
+
* page size, we may be appending data belonging to the last page of the
396
+
* inode straddling inode->i_size, with that page already cached due to
397
+
* a buffered read or readahead. So make sure to invalidate that page.
398
+
* This will always be a no-op for the case where the block size is
399
+
* equal to the page size.
400
+
*/
401
+
start = iocb->ki_pos >> PAGE_SHIFT;
402
+
end = (iocb->ki_pos + iov_iter_count(from) - 1) >> PAGE_SHIFT;
403
+
if (invalidate_inode_pages2_range(inode->i_mapping, start, end))
404
+
return -EBUSY;
393
405
394
406
nr_pages = iov_iter_npages(from, BIO_MAX_VECS);
395
407
if (!nr_pages)
···
581
567
append = sync;
582
568
}
583
569
584
-
if (append)
570
+
if (append) {
585
571
ret = zonefs_file_dio_append(iocb, from);
586
-
else
572
+
} else {
573
+
/*
574
+
* iomap_dio_rw() may return ENOTBLK if there was an issue with
575
+
* page invalidation. Overwrite that error code with EBUSY to
576
+
* be consistent with zonefs_file_dio_append() return value for
577
+
* similar issues.
578
+
*/
587
579
ret = iomap_dio_rw(iocb, from, &zonefs_write_iomap_ops,
588
580
&zonefs_write_dio_ops, 0, NULL, 0);
581
+
if (ret == -ENOTBLK)
582
+
ret = -EBUSY;
583
+
}
584
+
589
585
if (zonefs_zone_is_seq(z) &&
590
586
(ret > 0 || ret == -EIOCBQUEUED)) {
591
587
if (ret > 0)
-7
include/drm/gpu_scheduler.h
-7
include/drm/gpu_scheduler.h
+1
include/linux/context_tracking.h
+1
include/linux/context_tracking.h
···
96
96
static inline int exception_enter(void) { return 0; }
97
97
static inline void exception_exit(enum ctx_state prev_ctx) { }
98
98
static inline int ct_state(void) { return -1; }
99
+
static inline int __ct_state(void) { return -1; }
99
100
static __always_inline bool context_tracking_guest_enter(void) { return false; }
100
101
static inline void context_tracking_guest_exit(void) { }
101
102
#define CT_WARN_ON(cond) do { } while (0)
+2
include/linux/context_tracking_state.h
+2
include/linux/context_tracking_state.h
···
46
46
47
47
#ifdef CONFIG_CONTEXT_TRACKING
48
48
DECLARE_PER_CPU(struct context_tracking, context_tracking);
49
+
#endif
49
50
51
+
#ifdef CONFIG_CONTEXT_TRACKING_USER
50
52
static __always_inline int __ct_state(void)
51
53
{
52
54
return arch_atomic_read(this_cpu_ptr(&context_tracking.state)) & CT_STATE_MASK;
+17
include/linux/cpumask.h
+17
include/linux/cpumask.h
···
351
351
for_each_andnot_bit(cpu, cpumask_bits(mask1), cpumask_bits(mask2), small_cpumask_bits)
352
352
353
353
/**
354
+
* for_each_cpu_or - iterate over every cpu present in either mask
355
+
* @cpu: the (optionally unsigned) integer iterator
356
+
* @mask1: the first cpumask pointer
357
+
* @mask2: the second cpumask pointer
358
+
*
359
+
* This saves a temporary CPU mask in many places. It is equivalent to:
360
+
* struct cpumask tmp;
361
+
* cpumask_or(&tmp, &mask1, &mask2);
362
+
* for_each_cpu(cpu, &tmp)
363
+
* ...
364
+
*
365
+
* After the loop, cpu is >= nr_cpu_ids.
366
+
*/
367
+
#define for_each_cpu_or(cpu, mask1, mask2) \
368
+
for_each_or_bit(cpu, cpumask_bits(mask1), cpumask_bits(mask2), small_cpumask_bits)
369
+
370
+
/**
354
371
* cpumask_any_but - return a "random" in a cpumask, but not this one.
355
372
* @mask: the cpumask to search
356
373
* @cpu: the cpu to ignore.
+1
include/linux/efi.h
+1
include/linux/efi.h
+37
include/linux/find.h
+37
include/linux/find.h
···
14
14
unsigned long nbits, unsigned long start);
15
15
unsigned long _find_next_andnot_bit(const unsigned long *addr1, const unsigned long *addr2,
16
16
unsigned long nbits, unsigned long start);
17
+
unsigned long _find_next_or_bit(const unsigned long *addr1, const unsigned long *addr2,
18
+
unsigned long nbits, unsigned long start);
17
19
unsigned long _find_next_zero_bit(const unsigned long *addr, unsigned long nbits,
18
20
unsigned long start);
19
21
extern unsigned long _find_first_bit(const unsigned long *addr, unsigned long size);
···
126
124
}
127
125
128
126
return _find_next_andnot_bit(addr1, addr2, size, offset);
127
+
}
128
+
#endif
129
+
130
+
#ifndef find_next_or_bit
131
+
/**
132
+
* find_next_or_bit - find the next set bit in either memory regions
133
+
* @addr1: The first address to base the search on
134
+
* @addr2: The second address to base the search on
135
+
* @size: The bitmap size in bits
136
+
* @offset: The bitnumber to start searching at
137
+
*
138
+
* Returns the bit number for the next set bit
139
+
* If no bits are set, returns @size.
140
+
*/
141
+
static inline
142
+
unsigned long find_next_or_bit(const unsigned long *addr1,
143
+
const unsigned long *addr2, unsigned long size,
144
+
unsigned long offset)
145
+
{
146
+
if (small_const_nbits(size)) {
147
+
unsigned long val;
148
+
149
+
if (unlikely(offset >= size))
150
+
return size;
151
+
152
+
val = (*addr1 | *addr2) & GENMASK(size - 1, offset);
153
+
return val ? __ffs(val) : size;
154
+
}
155
+
156
+
return _find_next_or_bit(addr1, addr2, size, offset);
129
157
}
130
158
#endif
131
159
···
566
534
#define for_each_andnot_bit(bit, addr1, addr2, size) \
567
535
for ((bit) = 0; \
568
536
(bit) = find_next_andnot_bit((addr1), (addr2), (size), (bit)), (bit) < (size);\
537
+
(bit)++)
538
+
539
+
#define for_each_or_bit(bit, addr1, addr2, size) \
540
+
for ((bit) = 0; \
541
+
(bit) = find_next_or_bit((addr1), (addr2), (size), (bit)), (bit) < (size);\
569
542
(bit)++)
570
543
571
544
/* same as for_each_set_bit() but use bit as value to start with */
+6
-5
include/linux/io_uring.h
+6
-5
include/linux/io_uring.h
···
27
27
const void *cmd;
28
28
union {
29
29
/* callback to defer completions to task context */
30
-
void (*task_work_cb)(struct io_uring_cmd *cmd);
30
+
void (*task_work_cb)(struct io_uring_cmd *cmd, unsigned);
31
31
/* used for polled completion */
32
32
void *cookie;
33
33
};
···
39
39
#if defined(CONFIG_IO_URING)
40
40
int io_uring_cmd_import_fixed(u64 ubuf, unsigned long len, int rw,
41
41
struct iov_iter *iter, void *ioucmd);
42
-
void io_uring_cmd_done(struct io_uring_cmd *cmd, ssize_t ret, ssize_t res2);
42
+
void io_uring_cmd_done(struct io_uring_cmd *cmd, ssize_t ret, ssize_t res2,
43
+
unsigned issue_flags);
43
44
void io_uring_cmd_complete_in_task(struct io_uring_cmd *ioucmd,
44
-
void (*task_work_cb)(struct io_uring_cmd *));
45
+
void (*task_work_cb)(struct io_uring_cmd *, unsigned));
45
46
struct sock *io_uring_get_socket(struct file *file);
46
47
void __io_uring_cancel(bool cancel_all);
47
48
void __io_uring_free(struct task_struct *tsk);
···
73
72
return -EOPNOTSUPP;
74
73
}
75
74
static inline void io_uring_cmd_done(struct io_uring_cmd *cmd, ssize_t ret,
76
-
ssize_t ret2)
75
+
ssize_t ret2, unsigned issue_flags)
77
76
{
78
77
}
79
78
static inline void io_uring_cmd_complete_in_task(struct io_uring_cmd *ioucmd,
80
-
void (*task_work_cb)(struct io_uring_cmd *))
79
+
void (*task_work_cb)(struct io_uring_cmd *, unsigned))
81
80
{
82
81
}
83
82
static inline struct sock *io_uring_get_socket(struct file *file)
+3
-2
include/linux/nvme-tcp.h
+3
-2
include/linux/nvme-tcp.h
-6
include/linux/percpu_counter.h
-6
include/linux/percpu_counter.h
···
45
45
void percpu_counter_add_batch(struct percpu_counter *fbc, s64 amount,
46
46
s32 batch);
47
47
s64 __percpu_counter_sum(struct percpu_counter *fbc);
48
-
s64 percpu_counter_sum_all(struct percpu_counter *fbc);
49
48
int __percpu_counter_compare(struct percpu_counter *fbc, s64 rhs, s32 batch);
50
49
void percpu_counter_sync(struct percpu_counter *fbc);
51
50
···
191
192
}
192
193
193
194
static inline s64 percpu_counter_sum(struct percpu_counter *fbc)
194
-
{
195
-
return percpu_counter_read(fbc);
196
-
}
197
-
198
-
static inline s64 percpu_counter_sum_all(struct percpu_counter *fbc)
199
195
{
200
196
return percpu_counter_read(fbc);
201
197
}
+1
-1
include/linux/phy.h
+1
-1
include/linux/phy.h
···
1546
1546
struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode);
1547
1547
struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode);
1548
1548
struct phy_device *device_phy_find_device(struct device *dev);
1549
-
struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode);
1549
+
struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode);
1550
1550
struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1551
1551
int phy_device_register(struct phy_device *phy);
1552
1552
void phy_device_free(struct phy_device *phydev);
+3
-2
include/linux/sfp.h
+3
-2
include/linux/sfp.h
···
557
557
void sfp_upstream_start(struct sfp_bus *bus);
558
558
void sfp_upstream_stop(struct sfp_bus *bus);
559
559
void sfp_bus_put(struct sfp_bus *bus);
560
-
struct sfp_bus *sfp_bus_find_fwnode(struct fwnode_handle *fwnode);
560
+
struct sfp_bus *sfp_bus_find_fwnode(const struct fwnode_handle *fwnode);
561
561
int sfp_bus_add_upstream(struct sfp_bus *bus, void *upstream,
562
562
const struct sfp_upstream_ops *ops);
563
563
void sfp_bus_del_upstream(struct sfp_bus *bus);
···
619
619
{
620
620
}
621
621
622
-
static inline struct sfp_bus *sfp_bus_find_fwnode(struct fwnode_handle *fwnode)
622
+
static inline struct sfp_bus *
623
+
sfp_bus_find_fwnode(const struct fwnode_handle *fwnode)
623
624
{
624
625
return NULL;
625
626
}
+7
-2
include/linux/sysfb.h
+7
-2
include/linux/sysfb.h
···
70
70
#ifdef CONFIG_EFI
71
71
72
72
extern struct efifb_dmi_info efifb_dmi_list[];
73
-
void sysfb_apply_efi_quirks(struct platform_device *pd);
73
+
void sysfb_apply_efi_quirks(void);
74
+
void sysfb_set_efifb_fwnode(struct platform_device *pd);
74
75
75
76
#else /* CONFIG_EFI */
76
77
77
-
static inline void sysfb_apply_efi_quirks(struct platform_device *pd)
78
+
static inline void sysfb_apply_efi_quirks(void)
79
+
{
80
+
}
81
+
82
+
static inline void sysfb_set_efifb_fwnode(struct platform_device *pd)
78
83
{
79
84
}
80
85
+1
include/linux/thermal.h
+1
include/linux/thermal.h
···
384
384
struct device_node *np,
385
385
char *type, void *devdata,
386
386
const struct thermal_cooling_device_ops *ops);
387
+
void thermal_cooling_device_update(struct thermal_cooling_device *);
387
388
void thermal_cooling_device_unregister(struct thermal_cooling_device *);
388
389
struct thermal_zone_device *thermal_zone_get_zone_by_name(const char *name);
389
390
int thermal_zone_get_temp(struct thermal_zone_device *tz, int *temp);
+1
-1
include/trace/events/f2fs.h
+1
-1
include/trace/events/f2fs.h
+2
-2
include/trace/events/mmap.h
+2
-2
include/trace/events/mmap.h
···
35
35
__entry->align_offset = info->align_offset;
36
36
),
37
37
38
-
TP_printk("addr=0x%lx err=%ld total_vm=0x%lx flags=0x%lx len=0x%lx lo=0x%lx hi=0x%lx mask=0x%lx ofs=0x%lx\n",
38
+
TP_printk("addr=0x%lx err=%ld total_vm=0x%lx flags=0x%lx len=0x%lx lo=0x%lx hi=0x%lx mask=0x%lx ofs=0x%lx",
39
39
IS_ERR_VALUE(__entry->addr) ? 0 : __entry->addr,
40
40
IS_ERR_VALUE(__entry->addr) ? __entry->addr : 0,
41
41
__entry->total_vm, __entry->flags, __entry->length,
···
110
110
__entry->mt = &mm->mm_mt;
111
111
),
112
112
113
-
TP_printk("mt_mod %p, DESTROY\n",
113
+
TP_printk("mt_mod %p, DESTROY",
114
114
__entry->mt
115
115
)
116
116
);
+1
-1
include/trace/events/rcu.h
+1
-1
include/trace/events/rcu.h
···
768
768
TP_ARGS(rcutorturename, rhp, secs, c_old, c),
769
769
770
770
TP_STRUCT__entry(
771
-
__field(char, rcutorturename[RCUTORTURENAME_LEN])
771
+
__array(char, rcutorturename, RCUTORTURENAME_LEN)
772
772
__field(struct rcu_head *, rhp)
773
773
__field(unsigned long, secs)
774
774
__field(unsigned long, c_old)
+3
io_uring/filetable.c
+3
io_uring/filetable.c
+17
-10
io_uring/net.c
+17
-10
io_uring/net.c
···
47
47
struct sockaddr __user *addr;
48
48
int addr_len;
49
49
bool in_progress;
50
+
bool seen_econnaborted;
50
51
};
51
52
52
53
struct io_sr_msg {
···
1425
1424
1426
1425
conn->addr = u64_to_user_ptr(READ_ONCE(sqe->addr));
1427
1426
conn->addr_len = READ_ONCE(sqe->addr2);
1428
-
conn->in_progress = false;
1427
+
conn->in_progress = conn->seen_econnaborted = false;
1429
1428
return 0;
1430
1429
}
1431
1430
···
1462
1461
1463
1462
ret = __sys_connect_file(req->file, &io->address,
1464
1463
connect->addr_len, file_flags);
1465
-
if ((ret == -EAGAIN || ret == -EINPROGRESS) && force_nonblock) {
1464
+
if ((ret == -EAGAIN || ret == -EINPROGRESS || ret == -ECONNABORTED)
1465
+
&& force_nonblock) {
1466
1466
if (ret == -EINPROGRESS) {
1467
1467
connect->in_progress = true;
1468
-
} else {
1469
-
if (req_has_async_data(req))
1470
-
return -EAGAIN;
1471
-
if (io_alloc_async_data(req)) {
1472
-
ret = -ENOMEM;
1473
-
goto out;
1474
-
}
1475
-
memcpy(req->async_data, &__io, sizeof(__io));
1468
+
return -EAGAIN;
1476
1469
}
1470
+
if (ret == -ECONNABORTED) {
1471
+
if (connect->seen_econnaborted)
1472
+
goto out;
1473
+
connect->seen_econnaborted = true;
1474
+
}
1475
+
if (req_has_async_data(req))
1476
+
return -EAGAIN;
1477
+
if (io_alloc_async_data(req)) {
1478
+
ret = -ENOMEM;
1479
+
goto out;
1480
+
}
1481
+
memcpy(req->async_data, &__io, sizeof(__io));
1477
1482
return -EAGAIN;
1478
1483
}
1479
1484
if (ret == -ERESTARTSYS)
+1
io_uring/rsrc.c
+1
io_uring/rsrc.c
+6
-4
io_uring/uring_cmd.c
+6
-4
io_uring/uring_cmd.c
···
15
15
static void io_uring_cmd_work(struct io_kiocb *req, bool *locked)
16
16
{
17
17
struct io_uring_cmd *ioucmd = io_kiocb_to_cmd(req, struct io_uring_cmd);
18
+
unsigned issue_flags = *locked ? 0 : IO_URING_F_UNLOCKED;
18
19
19
-
ioucmd->task_work_cb(ioucmd);
20
+
ioucmd->task_work_cb(ioucmd, issue_flags);
20
21
}
21
22
22
23
void io_uring_cmd_complete_in_task(struct io_uring_cmd *ioucmd,
23
-
void (*task_work_cb)(struct io_uring_cmd *))
24
+
void (*task_work_cb)(struct io_uring_cmd *, unsigned))
24
25
{
25
26
struct io_kiocb *req = cmd_to_io_kiocb(ioucmd);
26
27
···
43
42
* Called by consumers of io_uring_cmd, if they originally returned
44
43
* -EIOCBQUEUED upon receiving the command.
45
44
*/
46
-
void io_uring_cmd_done(struct io_uring_cmd *ioucmd, ssize_t ret, ssize_t res2)
45
+
void io_uring_cmd_done(struct io_uring_cmd *ioucmd, ssize_t ret, ssize_t res2,
46
+
unsigned issue_flags)
47
47
{
48
48
struct io_kiocb *req = cmd_to_io_kiocb(ioucmd);
49
49
···
58
56
/* order with io_iopoll_req_issued() checking ->iopoll_complete */
59
57
smp_store_release(&req->iopoll_completed, 1);
60
58
else
61
-
io_req_complete_post(req, 0);
59
+
io_req_complete_post(req, issue_flags);
62
60
}
63
61
EXPORT_SYMBOL_GPL(io_uring_cmd_done);
64
62
+3
-2
kernel/entry/common.c
+3
-2
kernel/entry/common.c
···
21
21
arch_enter_from_user_mode(regs);
22
22
lockdep_hardirqs_off(CALLER_ADDR0);
23
23
24
-
CT_WARN_ON(ct_state() != CONTEXT_USER);
24
+
CT_WARN_ON(__ct_state() != CONTEXT_USER);
25
25
user_exit_irqoff();
26
26
27
27
instrumentation_begin();
···
192
192
193
193
static void exit_to_user_mode_prepare(struct pt_regs *regs)
194
194
{
195
-
unsigned long ti_work = read_thread_flags();
195
+
unsigned long ti_work;
196
196
197
197
lockdep_assert_irqs_disabled();
198
198
199
199
/* Flush pending rcuog wakeup before the last need_resched() check */
200
200
tick_nohz_user_enter_prepare();
201
201
202
+
ti_work = read_thread_flags();
202
203
if (unlikely(ti_work & EXIT_TO_USER_MODE_WORK))
203
204
ti_work = exit_to_user_mode_loop(regs, ti_work);
204
205
-5
kernel/fork.c
-5
kernel/fork.c
···
755
755
for (i = 0; i < NR_MM_COUNTERS; i++) {
756
756
long x = percpu_counter_sum(&mm->rss_stat[i]);
757
757
758
-
if (likely(!x))
759
-
continue;
760
-
761
-
/* Making sure this is not due to race with CPU offlining. */
762
-
x = percpu_counter_sum_all(&mm->rss_stat[i]);
763
758
if (unlikely(x))
764
759
pr_alert("BUG: Bad rss-counter state mm:%p type:%s val:%ld\n",
765
760
mm, resident_page_types[i], x);
+1
-1
kernel/kcsan/Makefile
+1
-1
kernel/kcsan/Makefile
···
16
16
KCSAN_INSTRUMENT_BARRIERS_selftest.o := y
17
17
obj-$(CONFIG_KCSAN_SELFTEST) += selftest.o
18
18
19
-
CFLAGS_kcsan_test.o := $(CFLAGS_KCSAN) -g -fno-omit-frame-pointer
19
+
CFLAGS_kcsan_test.o := $(CFLAGS_KCSAN) -fno-omit-frame-pointer
20
20
CFLAGS_kcsan_test.o += $(DISABLE_STRUCTLEAK_PLUGIN)
21
21
obj-$(CONFIG_KCSAN_KUNIT_TEST) += kcsan_test.o
+3
kernel/sched/core.c
+3
kernel/sched/core.c
+43
-10
kernel/sched/fair.c
+43
-10
kernel/sched/fair.c
···
4648
4648
#endif
4649
4649
}
4650
4650
4651
+
static inline bool entity_is_long_sleeper(struct sched_entity *se)
4652
+
{
4653
+
struct cfs_rq *cfs_rq;
4654
+
u64 sleep_time;
4655
+
4656
+
if (se->exec_start == 0)
4657
+
return false;
4658
+
4659
+
cfs_rq = cfs_rq_of(se);
4660
+
4661
+
sleep_time = rq_clock_task(rq_of(cfs_rq));
4662
+
4663
+
/* Happen while migrating because of clock task divergence */
4664
+
if (sleep_time <= se->exec_start)
4665
+
return false;
4666
+
4667
+
sleep_time -= se->exec_start;
4668
+
if (sleep_time > ((1ULL << 63) / scale_load_down(NICE_0_LOAD)))
4669
+
return true;
4670
+
4671
+
return false;
4672
+
}
4673
+
4651
4674
static void
4652
4675
place_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int initial)
4653
4676
{
4654
4677
u64 vruntime = cfs_rq->min_vruntime;
4655
-
u64 sleep_time;
4656
4678
4657
4679
/*
4658
4680
* The 'current' period is already promised to the current tasks,
···
4706
4684
4707
4685
/*
4708
4686
* Pull vruntime of the entity being placed to the base level of
4709
-
* cfs_rq, to prevent boosting it if placed backwards. If the entity
4710
-
* slept for a long time, don't even try to compare its vruntime with
4711
-
* the base as it may be too far off and the comparison may get
4712
-
* inversed due to s64 overflow.
4687
+
* cfs_rq, to prevent boosting it if placed backwards.
4688
+
* However, min_vruntime can advance much faster than real time, with
4689
+
* the extreme being when an entity with the minimal weight always runs
4690
+
* on the cfs_rq. If the waking entity slept for a long time, its
4691
+
* vruntime difference from min_vruntime may overflow s64 and their
4692
+
* comparison may get inversed, so ignore the entity's original
4693
+
* vruntime in that case.
4694
+
* The maximal vruntime speedup is given by the ratio of normal to
4695
+
* minimal weight: scale_load_down(NICE_0_LOAD) / MIN_SHARES.
4696
+
* When placing a migrated waking entity, its exec_start has been set
4697
+
* from a different rq. In order to take into account a possible
4698
+
* divergence between new and prev rq's clocks task because of irq and
4699
+
* stolen time, we take an additional margin.
4700
+
* So, cutting off on the sleep time of
4701
+
* 2^63 / scale_load_down(NICE_0_LOAD) ~ 104 days
4702
+
* should be safe.
4713
4703
*/
4714
-
sleep_time = rq_clock_task(rq_of(cfs_rq)) - se->exec_start;
4715
-
if ((s64)sleep_time > 60LL * NSEC_PER_SEC)
4704
+
if (entity_is_long_sleeper(se))
4716
4705
se->vruntime = vruntime;
4717
4706
else
4718
4707
se->vruntime = max_vruntime(se->vruntime, vruntime);
···
4803
4770
4804
4771
if (flags & ENQUEUE_WAKEUP)
4805
4772
place_entity(cfs_rq, se, 0);
4773
+
/* Entity has migrated, no longer consider this task hot */
4774
+
if (flags & ENQUEUE_MIGRATED)
4775
+
se->exec_start = 0;
4806
4776
4807
4777
check_schedstat_required();
4808
4778
update_stats_enqueue_fair(cfs_rq, se, flags);
···
7692
7656
7693
7657
/* Tell new CPU we are migrated */
7694
7658
se->avg.last_update_time = 0;
7695
-
7696
-
/* We have migrated, no longer consider this task hot */
7697
-
se->exec_start = 0;
7698
7659
7699
7660
update_scan_period(p, new_cpu);
7700
7661
}
+4
-2
lib/dhry_run.c
+4
-2
lib/dhry_run.c
···
31
31
32
32
static void dhry_benchmark(void)
33
33
{
34
+
unsigned int cpu = get_cpu();
34
35
int i, n;
35
36
36
37
if (iterations > 0) {
···
46
45
}
47
46
48
47
report:
48
+
put_cpu();
49
49
if (n >= 0)
50
-
pr_info("CPU%u: Dhrystones per Second: %d (%d DMIPS)\n",
51
-
smp_processor_id(), n, n / DHRY_VAX);
50
+
pr_info("CPU%u: Dhrystones per Second: %d (%d DMIPS)\n", cpu,
51
+
n, n / DHRY_VAX);
52
52
else if (n == -EAGAIN)
53
53
pr_err("Please increase the number of iterations\n");
54
54
else
+9
lib/find_bit.c
+9
lib/find_bit.c
···
182
182
EXPORT_SYMBOL(_find_next_andnot_bit);
183
183
#endif
184
184
185
+
#ifndef find_next_or_bit
186
+
unsigned long _find_next_or_bit(const unsigned long *addr1, const unsigned long *addr2,
187
+
unsigned long nbits, unsigned long start)
188
+
{
189
+
return FIND_NEXT_BIT(addr1[idx] | addr2[idx], /* nop */, nbits, start);
190
+
}
191
+
EXPORT_SYMBOL(_find_next_or_bit);
192
+
#endif
193
+
185
194
#ifndef find_next_zero_bit
186
195
unsigned long _find_next_zero_bit(const unsigned long *addr, unsigned long nbits,
187
196
unsigned long start)
+5
-19
lib/maple_tree.c
+5
-19
lib/maple_tree.c
···
5099
5099
*/
5100
5100
static inline bool mas_skip_node(struct ma_state *mas)
5101
5101
{
5102
-
unsigned char slot, slot_count;
5103
-
unsigned long *pivots;
5104
-
enum maple_type mt;
5102
+
if (mas_is_err(mas))
5103
+
return false;
5105
5104
5106
-
mt = mte_node_type(mas->node);
5107
-
slot_count = mt_slots[mt] - 1;
5108
5105
do {
5109
5106
if (mte_is_root(mas->node)) {
5110
-
slot = mas->offset;
5111
-
if (slot > slot_count) {
5107
+
if (mas->offset >= mas_data_end(mas)) {
5112
5108
mas_set_err(mas, -EBUSY);
5113
5109
return false;
5114
5110
}
5115
5111
} else {
5116
5112
mas_ascend(mas);
5117
-
slot = mas->offset;
5118
-
mt = mte_node_type(mas->node);
5119
-
slot_count = mt_slots[mt] - 1;
5120
5113
}
5121
-
} while (slot > slot_count);
5114
+
} while (mas->offset >= mas_data_end(mas));
5122
5115
5123
-
mas->offset = ++slot;
5124
-
pivots = ma_pivots(mas_mn(mas), mt);
5125
-
if (slot > 0)
5126
-
mas->min = pivots[slot - 1] + 1;
5127
-
5128
-
if (slot <= slot_count)
5129
-
mas->max = pivots[slot];
5130
-
5116
+
mas->offset++;
5131
5117
return true;
5132
5118
}
5133
5119
+14
-23
lib/percpu_counter.c
+14
-23
lib/percpu_counter.c
···
122
122
}
123
123
EXPORT_SYMBOL(percpu_counter_sync);
124
124
125
-
static s64 __percpu_counter_sum_mask(struct percpu_counter *fbc,
126
-
const struct cpumask *cpu_mask)
125
+
/*
126
+
* Add up all the per-cpu counts, return the result. This is a more accurate
127
+
* but much slower version of percpu_counter_read_positive().
128
+
*
129
+
* We use the cpu mask of (cpu_online_mask | cpu_dying_mask) to capture sums
130
+
* from CPUs that are in the process of being taken offline. Dying cpus have
131
+
* been removed from the online mask, but may not have had the hotplug dead
132
+
* notifier called to fold the percpu count back into the global counter sum.
133
+
* By including dying CPUs in the iteration mask, we avoid this race condition
134
+
* so __percpu_counter_sum() just does the right thing when CPUs are being taken
135
+
* offline.
136
+
*/
137
+
s64 __percpu_counter_sum(struct percpu_counter *fbc)
127
138
{
128
139
s64 ret;
129
140
int cpu;
···
142
131
143
132
raw_spin_lock_irqsave(&fbc->lock, flags);
144
133
ret = fbc->count;
145
-
for_each_cpu(cpu, cpu_mask) {
134
+
for_each_cpu_or(cpu, cpu_online_mask, cpu_dying_mask) {
146
135
s32 *pcount = per_cpu_ptr(fbc->counters, cpu);
147
136
ret += *pcount;
148
137
}
149
138
raw_spin_unlock_irqrestore(&fbc->lock, flags);
150
139
return ret;
151
140
}
152
-
153
-
/*
154
-
* Add up all the per-cpu counts, return the result. This is a more accurate
155
-
* but much slower version of percpu_counter_read_positive()
156
-
*/
157
-
s64 __percpu_counter_sum(struct percpu_counter *fbc)
158
-
{
159
-
return __percpu_counter_sum_mask(fbc, cpu_online_mask);
160
-
}
161
141
EXPORT_SYMBOL(__percpu_counter_sum);
162
-
163
-
/*
164
-
* This is slower version of percpu_counter_sum as it traverses all possible
165
-
* cpus. Use this only in the cases where accurate data is needed in the
166
-
* presense of CPUs getting offlined.
167
-
*/
168
-
s64 percpu_counter_sum_all(struct percpu_counter *fbc)
169
-
{
170
-
return __percpu_counter_sum_mask(fbc, cpu_possible_mask);
171
-
}
172
-
EXPORT_SYMBOL(percpu_counter_sum_all);
173
142
174
143
int __percpu_counter_init(struct percpu_counter *fbc, s64 amount, gfp_t gfp,
175
144
struct lock_class_key *key)
+48
lib/test_maple_tree.c
+48
lib/test_maple_tree.c
···
2670
2670
rcu_read_unlock();
2671
2671
}
2672
2672
2673
+
static noinline void check_empty_area_fill(struct maple_tree *mt)
2674
+
{
2675
+
const unsigned long max = 0x25D78000;
2676
+
unsigned long size;
2677
+
int loop, shift;
2678
+
MA_STATE(mas, mt, 0, 0);
2679
+
2680
+
mt_set_non_kernel(99999);
2681
+
for (shift = 12; shift <= 16; shift++) {
2682
+
loop = 5000;
2683
+
size = 1 << shift;
2684
+
while (loop--) {
2685
+
mas_set(&mas, 0);
2686
+
mas_lock(&mas);
2687
+
MT_BUG_ON(mt, mas_empty_area(&mas, 0, max, size) != 0);
2688
+
MT_BUG_ON(mt, mas.last != mas.index + size - 1);
2689
+
mas_store_gfp(&mas, (void *)size, GFP_KERNEL);
2690
+
mas_unlock(&mas);
2691
+
mas_reset(&mas);
2692
+
}
2693
+
}
2694
+
2695
+
/* No space left. */
2696
+
size = 0x1000;
2697
+
rcu_read_lock();
2698
+
MT_BUG_ON(mt, mas_empty_area(&mas, 0, max, size) != -EBUSY);
2699
+
rcu_read_unlock();
2700
+
2701
+
/* Fill a depth 3 node to the maximum */
2702
+
for (unsigned long i = 629440511; i <= 629440800; i += 6)
2703
+
mtree_store_range(mt, i, i + 5, (void *)i, GFP_KERNEL);
2704
+
/* Make space in the second-last depth 4 node */
2705
+
mtree_erase(mt, 631668735);
2706
+
/* Make space in the last depth 4 node */
2707
+
mtree_erase(mt, 629506047);
2708
+
mas_reset(&mas);
2709
+
/* Search from just after the gap in the second-last depth 4 */
2710
+
rcu_read_lock();
2711
+
MT_BUG_ON(mt, mas_empty_area(&mas, 629506048, 690000000, 0x5000) != 0);
2712
+
rcu_read_unlock();
2713
+
mt_set_non_kernel(0);
2714
+
}
2715
+
2673
2716
static DEFINE_MTREE(tree);
2674
2717
static int maple_tree_seed(void)
2675
2718
{
···
2968
2925
mt_init_flags(&tree, MT_FLAGS_ALLOC_RANGE);
2969
2926
check_empty_area_window(&tree);
2970
2927
mtree_destroy(&tree);
2928
+
2929
+
mt_init_flags(&tree, MT_FLAGS_ALLOC_RANGE);
2930
+
check_empty_area_fill(&tree);
2931
+
mtree_destroy(&tree);
2932
+
2971
2933
2972
2934
#if defined(BENCH)
2973
2935
skip:
+1
-1
mm/kfence/Makefile
+1
-1
mm/kfence/Makefile
+8
-2
mm/kfence/core.c
+8
-2
mm/kfence/core.c
···
726
726
};
727
727
DEFINE_SEQ_ATTRIBUTE(objects);
728
728
729
-
static int __init kfence_debugfs_init(void)
729
+
static int kfence_debugfs_init(void)
730
730
{
731
-
struct dentry *kfence_dir = debugfs_create_dir("kfence", NULL);
731
+
struct dentry *kfence_dir;
732
732
733
+
if (!READ_ONCE(kfence_enabled))
734
+
return 0;
735
+
736
+
kfence_dir = debugfs_create_dir("kfence", NULL);
733
737
debugfs_create_file("stats", 0444, kfence_dir, NULL, &stats_fops);
734
738
debugfs_create_file("objects", 0400, kfence_dir, NULL, &objects_fops);
735
739
return 0;
···
887
883
}
888
884
889
885
kfence_init_enable();
886
+
kfence_debugfs_init();
887
+
890
888
return 0;
891
889
}
892
890
+9
-2
mm/ksm.c
+9
-2
mm/ksm.c
···
988
988
989
989
mm = mm_slot->slot.mm;
990
990
mmap_read_lock(mm);
991
+
992
+
/*
993
+
* Exit right away if mm is exiting to avoid lockdep issue in
994
+
* the maple tree
995
+
*/
996
+
if (ksm_test_exit(mm))
997
+
goto mm_exiting;
998
+
991
999
for_each_vma(vmi, vma) {
992
-
if (ksm_test_exit(mm))
993
-
break;
994
1000
if (!(vma->vm_flags & VM_MERGEABLE) || !vma->anon_vma)
995
1001
continue;
996
1002
err = unmerge_ksm_pages(vma,
···
1005
999
goto error;
1006
1000
}
1007
1001
1002
+
mm_exiting:
1008
1003
remove_trailing_rmap_items(&mm_slot->rmap_list);
1009
1004
mmap_read_unlock(mm);
1010
1005
+1
-6
mm/mmap.c
+1
-6
mm/mmap.c
···
2621
2621
2622
2622
if (map_deny_write_exec(vma, vma->vm_flags)) {
2623
2623
error = -EACCES;
2624
-
if (file)
2625
-
goto close_and_free_vma;
2626
-
else if (vma->vm_file)
2627
-
goto unmap_and_free_vma;
2628
-
else
2629
-
goto free_vma;
2624
+
goto close_and_free_vma;
2630
2625
}
2631
2626
2632
2627
/* Allow architectures to sanity-check the vm_flags */
+1
-1
mm/mprotect.c
+1
-1
mm/mprotect.c
+2
-1
mm/page_alloc.c
+2
-1
mm/page_alloc.c
···
1398
1398
unsigned int order, bool check_free, fpi_t fpi_flags)
1399
1399
{
1400
1400
int bad = 0;
1401
+
bool skip_kasan_poison = should_skip_kasan_poison(page, fpi_flags);
1401
1402
bool init = want_init_on_free();
1402
1403
1403
1404
VM_BUG_ON_PAGE(PageTail(page), page);
···
1471
1470
* With hardware tag-based KASAN, memory tags must be set before the
1472
1471
* page becomes unavailable via debug_pagealloc or arch_free_page.
1473
1472
*/
1474
-
if (!should_skip_kasan_poison(page, fpi_flags)) {
1473
+
if (!skip_kasan_poison) {
1475
1474
kasan_poison_pages(page, order, init);
1476
1475
1477
1476
/* Memory is already initialized if KASAN did it internally. */
+1
-1
mm/slab.c
+1
-1
mm/slab.c
···
839
839
return 0;
840
840
}
841
841
842
-
#if (defined(CONFIG_NUMA) && defined(CONFIG_MEMORY_HOTPLUG)) || defined(CONFIG_SMP)
842
+
#if defined(CONFIG_NUMA) || defined(CONFIG_SMP)
843
843
/*
844
844
* Allocates and initializes node for a node on each slab cache, used for
845
845
* either memory or cpu hotplug. If memory is being hot-added, the kmem_cache_node
+23
-5
mm/vmalloc.c
+23
-5
mm/vmalloc.c
···
2883
2883
unsigned int order, unsigned int nr_pages, struct page **pages)
2884
2884
{
2885
2885
unsigned int nr_allocated = 0;
2886
+
gfp_t alloc_gfp = gfp;
2887
+
bool nofail = false;
2886
2888
struct page *page;
2887
2889
int i;
2888
2890
···
2895
2893
* more permissive.
2896
2894
*/
2897
2895
if (!order) {
2896
+
/* bulk allocator doesn't support nofail req. officially */
2898
2897
gfp_t bulk_gfp = gfp & ~__GFP_NOFAIL;
2899
2898
2900
2899
while (nr_allocated < nr_pages) {
···
2934
2931
if (nr != nr_pages_request)
2935
2932
break;
2936
2933
}
2934
+
} else if (gfp & __GFP_NOFAIL) {
2935
+
/*
2936
+
* Higher order nofail allocations are really expensive and
2937
+
* potentially dangerous (pre-mature OOM, disruptive reclaim
2938
+
* and compaction etc.
2939
+
*/
2940
+
alloc_gfp &= ~__GFP_NOFAIL;
2941
+
nofail = true;
2937
2942
}
2938
2943
2939
2944
/* High-order pages or fallback path if "bulk" fails. */
2940
-
2941
2945
while (nr_allocated < nr_pages) {
2942
2946
if (fatal_signal_pending(current))
2943
2947
break;
2944
2948
2945
2949
if (nid == NUMA_NO_NODE)
2946
-
page = alloc_pages(gfp, order);
2950
+
page = alloc_pages(alloc_gfp, order);
2947
2951
else
2948
-
page = alloc_pages_node(nid, gfp, order);
2949
-
if (unlikely(!page))
2950
-
break;
2952
+
page = alloc_pages_node(nid, alloc_gfp, order);
2953
+
if (unlikely(!page)) {
2954
+
if (!nofail)
2955
+
break;
2956
+
2957
+
/* fall back to the zero order allocations */
2958
+
alloc_gfp |= __GFP_NOFAIL;
2959
+
order = 0;
2960
+
continue;
2961
+
}
2962
+
2951
2963
/*
2952
2964
* Higher order allocations must be able to be treated as
2953
2965
* indepdenent small pages by callers (as they can with
+10
-6
net/can/bcm.c
+10
-6
net/can/bcm.c
···
941
941
942
942
cf = op->frames + op->cfsiz * i;
943
943
err = memcpy_from_msg((u8 *)cf, msg, op->cfsiz);
944
+
if (err < 0)
945
+
goto free_op;
944
946
945
947
if (op->flags & CAN_FD_FRAME) {
946
948
if (cf->len > 64)
···
952
950
err = -EINVAL;
953
951
}
954
952
955
-
if (err < 0) {
956
-
if (op->frames != &op->sframe)
957
-
kfree(op->frames);
958
-
kfree(op);
959
-
return err;
960
-
}
953
+
if (err < 0)
954
+
goto free_op;
961
955
962
956
if (msg_head->flags & TX_CP_CAN_ID) {
963
957
/* copy can_id into frame */
···
1024
1026
bcm_tx_start_timer(op);
1025
1027
1026
1028
return msg_head->nframes * op->cfsiz + MHSIZ;
1029
+
1030
+
free_op:
1031
+
if (op->frames != &op->sframe)
1032
+
kfree(op->frames);
1033
+
kfree(op);
1034
+
return err;
1027
1035
}
1028
1036
1029
1037
/*
+6
-2
net/can/j1939/transport.c
+6
-2
net/can/j1939/transport.c
···
1124
1124
1125
1125
if (session->sk)
1126
1126
j1939_sk_send_loop_abort(session->sk, session->err);
1127
-
else
1128
-
j1939_sk_errqueue(session, J1939_ERRQUEUE_RX_ABORT);
1129
1127
}
1130
1128
1131
1129
static void j1939_session_cancel(struct j1939_session *session,
···
1138
1140
}
1139
1141
1140
1142
j1939_session_list_unlock(session->priv);
1143
+
1144
+
if (!session->sk)
1145
+
j1939_sk_errqueue(session, J1939_ERRQUEUE_RX_ABORT);
1141
1146
}
1142
1147
1143
1148
static enum hrtimer_restart j1939_tp_txtimer(struct hrtimer *hrtimer)
···
1254
1253
__j1939_session_cancel(session, J1939_XTP_ABORT_TIMEOUT);
1255
1254
}
1256
1255
j1939_session_list_unlock(session->priv);
1256
+
1257
+
if (!session->sk)
1258
+
j1939_sk_errqueue(session, J1939_ERRQUEUE_RX_ABORT);
1257
1259
}
1258
1260
1259
1261
j1939_session_put(session);
+116
-5
net/dsa/slave.c
+116
-5
net/dsa/slave.c
···
57
57
u16 vid;
58
58
};
59
59
60
+
struct dsa_host_vlan_rx_filtering_ctx {
61
+
struct net_device *dev;
62
+
const unsigned char *addr;
63
+
enum dsa_standalone_event event;
64
+
};
65
+
60
66
static bool dsa_switch_supports_uc_filtering(struct dsa_switch *ds)
61
67
{
62
68
return ds->ops->port_fdb_add && ds->ops->port_fdb_del &&
···
161
155
return 0;
162
156
}
163
157
158
+
static int dsa_slave_host_vlan_rx_filtering(struct net_device *vdev, int vid,
159
+
void *arg)
160
+
{
161
+
struct dsa_host_vlan_rx_filtering_ctx *ctx = arg;
162
+
163
+
return dsa_slave_schedule_standalone_work(ctx->dev, ctx->event,
164
+
ctx->addr, vid);
165
+
}
166
+
164
167
static int dsa_slave_sync_uc(struct net_device *dev,
165
168
const unsigned char *addr)
166
169
{
167
170
struct net_device *master = dsa_slave_to_master(dev);
168
171
struct dsa_port *dp = dsa_slave_to_port(dev);
172
+
struct dsa_host_vlan_rx_filtering_ctx ctx = {
173
+
.dev = dev,
174
+
.addr = addr,
175
+
.event = DSA_UC_ADD,
176
+
};
177
+
int err;
169
178
170
179
dev_uc_add(master, addr);
171
180
172
181
if (!dsa_switch_supports_uc_filtering(dp->ds))
173
182
return 0;
174
183
175
-
return dsa_slave_schedule_standalone_work(dev, DSA_UC_ADD, addr, 0);
184
+
err = dsa_slave_schedule_standalone_work(dev, DSA_UC_ADD, addr, 0);
185
+
if (err)
186
+
return err;
187
+
188
+
return vlan_for_each(dev, dsa_slave_host_vlan_rx_filtering, &ctx);
176
189
}
177
190
178
191
static int dsa_slave_unsync_uc(struct net_device *dev,
···
199
174
{
200
175
struct net_device *master = dsa_slave_to_master(dev);
201
176
struct dsa_port *dp = dsa_slave_to_port(dev);
177
+
struct dsa_host_vlan_rx_filtering_ctx ctx = {
178
+
.dev = dev,
179
+
.addr = addr,
180
+
.event = DSA_UC_DEL,
181
+
};
182
+
int err;
202
183
203
184
dev_uc_del(master, addr);
204
185
205
186
if (!dsa_switch_supports_uc_filtering(dp->ds))
206
187
return 0;
207
188
208
-
return dsa_slave_schedule_standalone_work(dev, DSA_UC_DEL, addr, 0);
189
+
err = dsa_slave_schedule_standalone_work(dev, DSA_UC_DEL, addr, 0);
190
+
if (err)
191
+
return err;
192
+
193
+
return vlan_for_each(dev, dsa_slave_host_vlan_rx_filtering, &ctx);
209
194
}
210
195
211
196
static int dsa_slave_sync_mc(struct net_device *dev,
···
223
188
{
224
189
struct net_device *master = dsa_slave_to_master(dev);
225
190
struct dsa_port *dp = dsa_slave_to_port(dev);
191
+
struct dsa_host_vlan_rx_filtering_ctx ctx = {
192
+
.dev = dev,
193
+
.addr = addr,
194
+
.event = DSA_MC_ADD,
195
+
};
196
+
int err;
226
197
227
198
dev_mc_add(master, addr);
228
199
229
200
if (!dsa_switch_supports_mc_filtering(dp->ds))
230
201
return 0;
231
202
232
-
return dsa_slave_schedule_standalone_work(dev, DSA_MC_ADD, addr, 0);
203
+
err = dsa_slave_schedule_standalone_work(dev, DSA_MC_ADD, addr, 0);
204
+
if (err)
205
+
return err;
206
+
207
+
return vlan_for_each(dev, dsa_slave_host_vlan_rx_filtering, &ctx);
233
208
}
234
209
235
210
static int dsa_slave_unsync_mc(struct net_device *dev,
···
247
202
{
248
203
struct net_device *master = dsa_slave_to_master(dev);
249
204
struct dsa_port *dp = dsa_slave_to_port(dev);
205
+
struct dsa_host_vlan_rx_filtering_ctx ctx = {
206
+
.dev = dev,
207
+
.addr = addr,
208
+
.event = DSA_MC_DEL,
209
+
};
210
+
int err;
250
211
251
212
dev_mc_del(master, addr);
252
213
253
214
if (!dsa_switch_supports_mc_filtering(dp->ds))
254
215
return 0;
255
216
256
-
return dsa_slave_schedule_standalone_work(dev, DSA_MC_DEL, addr, 0);
217
+
err = dsa_slave_schedule_standalone_work(dev, DSA_MC_DEL, addr, 0);
218
+
if (err)
219
+
return err;
220
+
221
+
return vlan_for_each(dev, dsa_slave_host_vlan_rx_filtering, &ctx);
257
222
}
258
223
259
224
void dsa_slave_sync_ha(struct net_device *dev)
···
1757
1702
.flags = 0,
1758
1703
};
1759
1704
struct netlink_ext_ack extack = {0};
1705
+
struct dsa_switch *ds = dp->ds;
1706
+
struct netdev_hw_addr *ha;
1760
1707
int ret;
1761
1708
1762
1709
/* User port... */
···
1778
1721
return ret;
1779
1722
}
1780
1723
1724
+
if (!dsa_switch_supports_uc_filtering(ds) &&
1725
+
!dsa_switch_supports_mc_filtering(ds))
1726
+
return 0;
1727
+
1728
+
netif_addr_lock_bh(dev);
1729
+
1730
+
if (dsa_switch_supports_mc_filtering(ds)) {
1731
+
netdev_for_each_synced_mc_addr(ha, dev) {
1732
+
dsa_slave_schedule_standalone_work(dev, DSA_MC_ADD,
1733
+
ha->addr, vid);
1734
+
}
1735
+
}
1736
+
1737
+
if (dsa_switch_supports_uc_filtering(ds)) {
1738
+
netdev_for_each_synced_uc_addr(ha, dev) {
1739
+
dsa_slave_schedule_standalone_work(dev, DSA_UC_ADD,
1740
+
ha->addr, vid);
1741
+
}
1742
+
}
1743
+
1744
+
netif_addr_unlock_bh(dev);
1745
+
1746
+
dsa_flush_workqueue();
1747
+
1781
1748
return 0;
1782
1749
}
1783
1750
···
1814
1733
/* This API only allows programming tagged, non-PVID VIDs */
1815
1734
.flags = 0,
1816
1735
};
1736
+
struct dsa_switch *ds = dp->ds;
1737
+
struct netdev_hw_addr *ha;
1817
1738
int err;
1818
1739
1819
1740
err = dsa_port_vlan_del(dp, &vlan);
1820
1741
if (err)
1821
1742
return err;
1822
1743
1823
-
return dsa_port_host_vlan_del(dp, &vlan);
1744
+
err = dsa_port_host_vlan_del(dp, &vlan);
1745
+
if (err)
1746
+
return err;
1747
+
1748
+
if (!dsa_switch_supports_uc_filtering(ds) &&
1749
+
!dsa_switch_supports_mc_filtering(ds))
1750
+
return 0;
1751
+
1752
+
netif_addr_lock_bh(dev);
1753
+
1754
+
if (dsa_switch_supports_mc_filtering(ds)) {
1755
+
netdev_for_each_synced_mc_addr(ha, dev) {
1756
+
dsa_slave_schedule_standalone_work(dev, DSA_MC_DEL,
1757
+
ha->addr, vid);
1758
+
}
1759
+
}
1760
+
1761
+
if (dsa_switch_supports_uc_filtering(ds)) {
1762
+
netdev_for_each_synced_uc_addr(ha, dev) {
1763
+
dsa_slave_schedule_standalone_work(dev, DSA_UC_DEL,
1764
+
ha->addr, vid);
1765
+
}
1766
+
}
1767
+
1768
+
netif_addr_unlock_bh(dev);
1769
+
1770
+
dsa_flush_workqueue();
1771
+
1772
+
return 0;
1824
1773
}
1825
1774
1826
1775
static int dsa_slave_restore_vlan(struct net_device *vdev, int vid, void *arg)
+1
-2
net/ieee802154/nl802154.c
+1
-2
net/ieee802154/nl802154.c
···
2488
2488
if (wpan_dev->iftype == NL802154_IFTYPE_MONITOR)
2489
2489
return -EOPNOTSUPP;
2490
2490
2491
-
if (!info->attrs[NL802154_ATTR_SEC_LEVEL] ||
2492
-
llsec_parse_seclevel(info->attrs[NL802154_ATTR_SEC_LEVEL],
2491
+
if (llsec_parse_seclevel(info->attrs[NL802154_ATTR_SEC_LEVEL],
2493
2492
&sl) < 0)
2494
2493
return -EINVAL;
2495
2494
+5
-5
net/sunrpc/auth_gss/gss_krb5_crypto.c
+5
-5
net/sunrpc/auth_gss/gss_krb5_crypto.c
···
353
353
err = crypto_ahash_final(req);
354
354
if (err)
355
355
goto out_free_ahash;
356
-
memcpy(cksumout->data, checksumdata, cksumout->len);
356
+
357
+
memcpy(cksumout->data, checksumdata,
358
+
min_t(int, cksumout->len, crypto_ahash_digestsize(tfm)));
357
359
358
360
out_free_ahash:
359
361
ahash_request_free(req);
···
811
809
buf->tail[0].iov_len += GSS_KRB5_TOK_HDR_LEN;
812
810
buf->len += GSS_KRB5_TOK_HDR_LEN;
813
811
814
-
/* Do the HMAC */
815
-
hmac.len = GSS_KRB5_MAX_CKSUM_LEN;
812
+
hmac.len = kctx->gk5e->cksumlength;
816
813
hmac.data = buf->tail[0].iov_base + buf->tail[0].iov_len;
817
814
818
815
/*
···
874
873
if (ret)
875
874
goto out_err;
876
875
877
-
/* Calculate our hmac over the plaintext data */
878
-
our_hmac_obj.len = sizeof(our_hmac);
876
+
our_hmac_obj.len = kctx->gk5e->cksumlength;
879
877
our_hmac_obj.data = our_hmac;
880
878
ret = gss_krb5_checksum(ahash, NULL, 0, &subbuf, 0, &our_hmac_obj);
881
879
if (ret)
+8
-1
net/vmw_vsock/virtio_transport_common.c
+8
-1
net/vmw_vsock/virtio_transport_common.c
···
398
398
u32 free_space;
399
399
400
400
spin_lock_bh(&vvs->rx_lock);
401
+
402
+
if (WARN_ONCE(skb_queue_empty(&vvs->rx_queue) && vvs->rx_bytes,
403
+
"rx_queue is empty, but rx_bytes is non-zero\n")) {
404
+
spin_unlock_bh(&vvs->rx_lock);
405
+
return err;
406
+
}
407
+
401
408
while (total < len && !skb_queue_empty(&vvs->rx_queue)) {
402
409
skb = skb_peek(&vvs->rx_queue);
403
410
···
1108
1101
memcpy(skb_put(last_skb, skb->len), skb->data, skb->len);
1109
1102
free_pkt = true;
1110
1103
last_hdr->flags |= hdr->flags;
1111
-
last_hdr->len = cpu_to_le32(last_skb->len);
1104
+
le32_add_cpu(&last_hdr->len, len);
1112
1105
goto out;
1113
1106
}
1114
1107
}
+2
-8
net/vmw_vsock/vsock_loopback.c
+2
-8
net/vmw_vsock/vsock_loopback.c
···
15
15
struct vsock_loopback {
16
16
struct workqueue_struct *workqueue;
17
17
18
-
spinlock_t pkt_list_lock; /* protects pkt_list */
19
18
struct sk_buff_head pkt_queue;
20
19
struct work_struct pkt_work;
21
20
};
···
31
32
struct vsock_loopback *vsock = &the_vsock_loopback;
32
33
int len = skb->len;
33
34
34
-
spin_lock_bh(&vsock->pkt_list_lock);
35
35
skb_queue_tail(&vsock->pkt_queue, skb);
36
-
spin_unlock_bh(&vsock->pkt_list_lock);
37
36
38
37
queue_work(vsock->workqueue, &vsock->pkt_work);
39
38
···
112
115
113
116
skb_queue_head_init(&pkts);
114
117
115
-
spin_lock_bh(&vsock->pkt_list_lock);
118
+
spin_lock_bh(&vsock->pkt_queue.lock);
116
119
skb_queue_splice_init(&vsock->pkt_queue, &pkts);
117
-
spin_unlock_bh(&vsock->pkt_list_lock);
120
+
spin_unlock_bh(&vsock->pkt_queue.lock);
118
121
119
122
while ((skb = __skb_dequeue(&pkts))) {
120
123
virtio_transport_deliver_tap_pkt(skb);
···
131
134
if (!vsock->workqueue)
132
135
return -ENOMEM;
133
136
134
-
spin_lock_init(&vsock->pkt_list_lock);
135
137
skb_queue_head_init(&vsock->pkt_queue);
136
138
INIT_WORK(&vsock->pkt_work, vsock_loopback_work);
137
139
···
154
158
155
159
flush_work(&vsock->pkt_work);
156
160
157
-
spin_lock_bh(&vsock->pkt_list_lock);
158
161
virtio_vsock_skb_queue_purge(&vsock->pkt_queue);
159
-
spin_unlock_bh(&vsock->pkt_list_lock);
160
162
161
163
destroy_workqueue(vsock->workqueue);
162
164
}
+3
-1
scripts/checksyscalls.sh
+3
-1
scripts/checksyscalls.sh
···
114
114
#define __IGNORE_truncate
115
115
#define __IGNORE_stat
116
116
#define __IGNORE_lstat
117
-
#define __IGNORE_fstat
118
117
#define __IGNORE_fcntl
119
118
#define __IGNORE_fadvise64
120
119
#define __IGNORE_newfstatat
···
254
255
/* 64-bit ports never needed these, and new 32-bit ports can use statx */
255
256
#define __IGNORE_fstat64
256
257
#define __IGNORE_fstatat64
258
+
259
+
/* Newer ports are not required to provide fstat in favor of statx */
260
+
#define __IGNORE_fstat
257
261
EOF
258
262
}
259
263
+2
sound/core/pcm_lib.c
+2
sound/core/pcm_lib.c
+5
-1
sound/pci/hda/patch_conexant.c
+5
-1
sound/pci/hda/patch_conexant.c
···
980
980
SND_PCI_QUIRK(0x17aa, 0x3905, "Lenovo G50-30", CXT_FIXUP_STEREO_DMIC),
981
981
SND_PCI_QUIRK(0x17aa, 0x390b, "Lenovo G50-80", CXT_FIXUP_STEREO_DMIC),
982
982
SND_PCI_QUIRK(0x17aa, 0x3975, "Lenovo U300s", CXT_FIXUP_STEREO_DMIC),
983
-
SND_PCI_QUIRK(0x17aa, 0x3977, "Lenovo IdeaPad U310", CXT_PINCFG_LENOVO_NOTEBOOK),
983
+
/* NOTE: we'd need to extend the quirk for 17aa:3977 as the same
984
+
* PCI SSID is used on multiple Lenovo models
985
+
*/
986
+
SND_PCI_QUIRK(0x17aa, 0x3977, "Lenovo IdeaPad U310", CXT_FIXUP_STEREO_DMIC),
984
987
SND_PCI_QUIRK(0x17aa, 0x3978, "Lenovo G50-70", CXT_FIXUP_STEREO_DMIC),
985
988
SND_PCI_QUIRK(0x17aa, 0x397b, "Lenovo S205", CXT_FIXUP_STEREO_DMIC),
986
989
SND_PCI_QUIRK_VENDOR(0x17aa, "Thinkpad", CXT_FIXUP_THINKPAD_ACPI),
···
1006
1003
{ .id = CXT_FIXUP_MUTE_LED_GPIO, .name = "mute-led-gpio" },
1007
1004
{ .id = CXT_FIXUP_HP_ZBOOK_MUTE_LED, .name = "hp-zbook-mute-led" },
1008
1005
{ .id = CXT_FIXUP_HP_MIC_NO_PRESENCE, .name = "hp-mic-fix" },
1006
+
{ .id = CXT_PINCFG_LENOVO_NOTEBOOK, .name = "lenovo-20149" },
1009
1007
{}
1010
1008
};
1011
1009
+6
-1
sound/pci/hda/patch_realtek.c
+6
-1
sound/pci/hda/patch_realtek.c
···
2631
2631
SND_PCI_QUIRK(0x1558, 0x65e5, "Clevo PC50D[PRS](?:-D|-G)?", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
2632
2632
SND_PCI_QUIRK(0x1558, 0x65f1, "Clevo PC50HS", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
2633
2633
SND_PCI_QUIRK(0x1558, 0x65f5, "Clevo PD50PN[NRT]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
2634
+
SND_PCI_QUIRK(0x1558, 0x66a2, "Clevo PE60RNE", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
2634
2635
SND_PCI_QUIRK(0x1558, 0x67d1, "Clevo PB71[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
2635
2636
SND_PCI_QUIRK(0x1558, 0x67e1, "Clevo PB71[DE][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
2636
2637
SND_PCI_QUIRK(0x1558, 0x67e5, "Clevo PC70D[PRS](?:-D|-G)?", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
···
2652
2651
SND_PCI_QUIRK(0x1558, 0x96e1, "Clevo P960[ER][CDFN]-K", ALC1220_FIXUP_CLEVO_P950),
2653
2652
SND_PCI_QUIRK(0x1558, 0x97e1, "Clevo P970[ER][CDFN]", ALC1220_FIXUP_CLEVO_P950),
2654
2653
SND_PCI_QUIRK(0x1558, 0x97e2, "Clevo P970RC-M", ALC1220_FIXUP_CLEVO_P950),
2654
+
SND_PCI_QUIRK(0x1558, 0xd502, "Clevo PD50SNE", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
2655
2655
SND_PCI_QUIRK_VENDOR(0x1558, "Clevo laptop", ALC882_FIXUP_EAPD),
2656
2656
SND_PCI_QUIRK(0x161f, 0x2054, "Medion laptop", ALC883_FIXUP_EAPD),
2657
2657
SND_PCI_QUIRK(0x17aa, 0x3a0d, "Lenovo Y530", ALC882_FIXUP_LENOVO_Y530),
···
9262
9260
SND_PCI_QUIRK(0x1028, 0x0a62, "Dell Precision 5560", ALC289_FIXUP_DUAL_SPK),
9263
9261
SND_PCI_QUIRK(0x1028, 0x0a9d, "Dell Latitude 5430", ALC269_FIXUP_DELL4_MIC_NO_PRESENCE),
9264
9262
SND_PCI_QUIRK(0x1028, 0x0a9e, "Dell Latitude 5430", ALC269_FIXUP_DELL4_MIC_NO_PRESENCE),
9265
-
SND_PCI_QUIRK(0x1028, 0x0ac9, "Dell Precision 3260", ALC295_FIXUP_CHROME_BOOK),
9263
+
SND_PCI_QUIRK(0x1028, 0x0ac9, "Dell Precision 3260", ALC283_FIXUP_CHROME_BOOK),
9266
9264
SND_PCI_QUIRK(0x1028, 0x0b19, "Dell XPS 15 9520", ALC289_FIXUP_DUAL_SPK),
9267
9265
SND_PCI_QUIRK(0x1028, 0x0b1a, "Dell Precision 5570", ALC289_FIXUP_DUAL_SPK),
9268
9266
SND_PCI_QUIRK(0x1028, 0x0b37, "Dell Inspiron 16 Plus 7620 2-in-1", ALC295_FIXUP_DELL_INSPIRON_TOP_SPEAKERS),
···
9577
9575
SND_PCI_QUIRK(0x1558, 0x5101, "Clevo S510WU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
9578
9576
SND_PCI_QUIRK(0x1558, 0x5157, "Clevo W517GU1", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
9579
9577
SND_PCI_QUIRK(0x1558, 0x51a1, "Clevo NS50MU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
9578
+
SND_PCI_QUIRK(0x1558, 0x5630, "Clevo NP50RNJS", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
9580
9579
SND_PCI_QUIRK(0x1558, 0x70a1, "Clevo NB70T[HJK]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
9581
9580
SND_PCI_QUIRK(0x1558, 0x70b3, "Clevo NK70SB", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
9582
9581
SND_PCI_QUIRK(0x1558, 0x70f2, "Clevo NH79EPY", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
···
9612
9609
SND_PCI_QUIRK(0x1558, 0x971d, "Clevo N970T[CDF]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
9613
9610
SND_PCI_QUIRK(0x1558, 0xa500, "Clevo NL5[03]RU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
9614
9611
SND_PCI_QUIRK(0x1558, 0xa600, "Clevo NL50NU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
9612
+
SND_PCI_QUIRK(0x1558, 0xa671, "Clevo NP70SN[CDE]", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
9615
9613
SND_PCI_QUIRK(0x1558, 0xb018, "Clevo NP50D[BE]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
9616
9614
SND_PCI_QUIRK(0x1558, 0xb019, "Clevo NH77D[BE]Q", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
9617
9615
SND_PCI_QUIRK(0x1558, 0xb022, "Clevo NH77D[DC][QW]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
···
9713
9709
SND_PCI_QUIRK(0x17aa, 0x511e, "Thinkpad", ALC298_FIXUP_TPT470_DOCK),
9714
9710
SND_PCI_QUIRK(0x17aa, 0x511f, "Thinkpad", ALC298_FIXUP_TPT470_DOCK),
9715
9711
SND_PCI_QUIRK(0x17aa, 0x9e54, "LENOVO NB", ALC269_FIXUP_LENOVO_EAPD),
9712
+
SND_PCI_QUIRK(0x17aa, 0x9e56, "Lenovo ZhaoYang CF4620Z", ALC286_FIXUP_SONY_MIC_NO_PRESENCE),
9716
9713
SND_PCI_QUIRK(0x1849, 0x1233, "ASRock NUC Box 1100", ALC233_FIXUP_NO_AUDIO_JACK),
9717
9714
SND_PCI_QUIRK(0x1849, 0xa233, "Positivo Master C6300", ALC269_FIXUP_HEADSET_MIC),
9718
9715
SND_PCI_QUIRK(0x19e5, 0x3204, "Huawei MACH-WX9", ALC256_FIXUP_HUAWEI_MACH_WX9_PINS),
+1
-1
sound/pci/ymfpci/ymfpci.c
+1
-1
sound/pci/ymfpci/ymfpci.c
+1
-1
sound/pci/ymfpci/ymfpci_main.c
+1
-1
sound/pci/ymfpci/ymfpci_main.c
···
2165
2165
chip->work_base = ptr;
2166
2166
chip->work_base_addr = ptr_addr;
2167
2167
2168
-
snd_BUG_ON(ptr + chip->work_size !=
2168
+
snd_BUG_ON(ptr + PAGE_ALIGN(chip->work_size) !=
2169
2169
chip->work_ptr->area + chip->work_ptr->bytes);
2170
2170
2171
2171
snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
+14
-8
sound/usb/endpoint.c
+14
-8
sound/usb/endpoint.c
···
455
455
* This function is used both for implicit feedback endpoints and in low-
456
456
* latency playback mode.
457
457
*/
458
-
void snd_usb_queue_pending_output_urbs(struct snd_usb_endpoint *ep,
459
-
bool in_stream_lock)
458
+
int snd_usb_queue_pending_output_urbs(struct snd_usb_endpoint *ep,
459
+
bool in_stream_lock)
460
460
{
461
461
bool implicit_fb = snd_usb_endpoint_implicit_feedback_sink(ep);
462
462
···
480
480
spin_unlock_irqrestore(&ep->lock, flags);
481
481
482
482
if (ctx == NULL)
483
-
return;
483
+
break;
484
484
485
485
/* copy over the length information */
486
486
if (implicit_fb) {
···
495
495
break;
496
496
if (err < 0) {
497
497
/* push back to ready list again for -EAGAIN */
498
-
if (err == -EAGAIN)
498
+
if (err == -EAGAIN) {
499
499
push_back_to_ready_list(ep, ctx);
500
-
else
500
+
break;
501
+
}
502
+
503
+
if (!in_stream_lock)
501
504
notify_xrun(ep);
502
-
return;
505
+
return -EPIPE;
503
506
}
504
507
505
508
err = usb_submit_urb(ctx->urb, GFP_ATOMIC);
···
510
507
usb_audio_err(ep->chip,
511
508
"Unable to submit urb #%d: %d at %s\n",
512
509
ctx->index, err, __func__);
513
-
notify_xrun(ep);
514
-
return;
510
+
if (!in_stream_lock)
511
+
notify_xrun(ep);
512
+
return -EPIPE;
515
513
}
516
514
517
515
set_bit(ctx->index, &ep->active_mask);
518
516
atomic_inc(&ep->submitted_urbs);
519
517
}
518
+
519
+
return 0;
520
520
}
521
521
522
522
/*
+2
-2
sound/usb/endpoint.h
+2
-2
sound/usb/endpoint.h
···
52
52
int snd_usb_endpoint_next_packet_size(struct snd_usb_endpoint *ep,
53
53
struct snd_urb_ctx *ctx, int idx,
54
54
unsigned int avail);
55
-
void snd_usb_queue_pending_output_urbs(struct snd_usb_endpoint *ep,
56
-
bool in_stream_lock);
55
+
int snd_usb_queue_pending_output_urbs(struct snd_usb_endpoint *ep,
56
+
bool in_stream_lock);
57
57
58
58
#endif /* __USBAUDIO_ENDPOINT_H */
+6
-2
sound/usb/format.c
+6
-2
sound/usb/format.c
···
39
39
case UAC_VERSION_1:
40
40
default: {
41
41
struct uac_format_type_i_discrete_descriptor *fmt = _fmt;
42
-
if (format >= 64)
43
-
return 0; /* invalid format */
42
+
if (format >= 64) {
43
+
usb_audio_info(chip,
44
+
"%u:%d: invalid format type 0x%llx is detected, processed as PCM\n",
45
+
fp->iface, fp->altsetting, format);
46
+
format = UAC_FORMAT_TYPE_I_PCM;
47
+
}
44
48
sample_width = fmt->bBitResolution;
45
49
sample_bytes = fmt->bSubframeSize;
46
50
format = 1ULL << format;
+1
-1
sound/usb/pcm.c
+1
-1
sound/usb/pcm.c
+1
-2
tools/testing/selftests/mm/mdwe_test.c
+1
-2
tools/testing/selftests/mm/mdwe_test.c
+23
tools/testing/selftests/sigaltstack/current_stack_pointer.h
+23
tools/testing/selftests/sigaltstack/current_stack_pointer.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0 */
2
+
3
+
#if __alpha__
4
+
register unsigned long sp asm("$30");
5
+
#elif __arm__ || __aarch64__ || __csky__ || __m68k__ || __mips__ || __riscv
6
+
register unsigned long sp asm("sp");
7
+
#elif __i386__
8
+
register unsigned long sp asm("esp");
9
+
#elif __loongarch64
10
+
register unsigned long sp asm("$sp");
11
+
#elif __ppc__
12
+
register unsigned long sp asm("r1");
13
+
#elif __s390x__
14
+
register unsigned long sp asm("%15");
15
+
#elif __sh__
16
+
register unsigned long sp asm("r15");
17
+
#elif __x86_64__
18
+
register unsigned long sp asm("rsp");
19
+
#elif __XTENSA__
20
+
register unsigned long sp asm("a1");
21
+
#else
22
+
#error "implement current_stack_pointer equivalent"
23
+
#endif
+1
-6
tools/testing/selftests/sigaltstack/sas.c
+1
-6
tools/testing/selftests/sigaltstack/sas.c
···
20
20
#include <sys/auxv.h>
21
21
22
22
#include "../kselftest.h"
23
+
#include "current_stack_pointer.h"
23
24
24
25
#ifndef SS_AUTODISARM
25
26
#define SS_AUTODISARM (1U << 31)
···
46
45
int err;
47
46
stack_t stk;
48
47
struct stk_data *p;
49
-
50
-
#if __s390x__
51
-
register unsigned long sp asm("%15");
52
-
#else
53
-
register unsigned long sp asm("sp");
54
-
#endif
55
48
56
49
if (sp < (unsigned long)sstack ||
57
50
sp >= (unsigned long)sstack + stack_size) {
+105
-3
tools/testing/selftests/x86/amx.c
+105
-3
tools/testing/selftests/x86/amx.c
···
14
14
#include <sys/auxv.h>
15
15
#include <sys/mman.h>
16
16
#include <sys/shm.h>
17
+
#include <sys/ptrace.h>
17
18
#include <sys/syscall.h>
18
19
#include <sys/wait.h>
20
+
#include <sys/uio.h>
19
21
20
22
#include "../kselftest.h" /* For __cpuid_count() */
21
23
···
585
583
_exit(0);
586
584
}
587
585
586
+
static inline int __compare_tiledata_state(struct xsave_buffer *xbuf1, struct xsave_buffer *xbuf2)
587
+
{
588
+
return memcmp(&xbuf1->bytes[xtiledata.xbuf_offset],
589
+
&xbuf2->bytes[xtiledata.xbuf_offset],
590
+
xtiledata.size);
591
+
}
592
+
588
593
/*
589
594
* Save current register state and compare it to @xbuf1.'
590
595
*
···
608
599
fatal_error("failed to allocate XSAVE buffer\n");
609
600
610
601
xsave(xbuf2, XFEATURE_MASK_XTILEDATA);
611
-
ret = memcmp(&xbuf1->bytes[xtiledata.xbuf_offset],
612
-
&xbuf2->bytes[xtiledata.xbuf_offset],
613
-
xtiledata.size);
602
+
ret = __compare_tiledata_state(xbuf1, xbuf2);
614
603
615
604
free(xbuf2);
616
605
···
833
826
free(finfo);
834
827
}
835
828
829
+
/* Ptrace test */
830
+
831
+
/*
832
+
* Make sure the ptracee has the expanded kernel buffer on the first
833
+
* use. Then, initialize the state before performing the state
834
+
* injection from the ptracer.
835
+
*/
836
+
static inline void ptracee_firstuse_tiledata(void)
837
+
{
838
+
load_rand_tiledata(stashed_xsave);
839
+
init_xtiledata();
840
+
}
841
+
842
+
/*
843
+
* Ptracer injects the randomized tile data state. It also reads
844
+
* before and after that, which will execute the kernel's state copy
845
+
* functions. So, the tester is advised to double-check any emitted
846
+
* kernel messages.
847
+
*/
848
+
static void ptracer_inject_tiledata(pid_t target)
849
+
{
850
+
struct xsave_buffer *xbuf;
851
+
struct iovec iov;
852
+
853
+
xbuf = alloc_xbuf();
854
+
if (!xbuf)
855
+
fatal_error("unable to allocate XSAVE buffer");
856
+
857
+
printf("\tRead the init'ed tiledata via ptrace().\n");
858
+
859
+
iov.iov_base = xbuf;
860
+
iov.iov_len = xbuf_size;
861
+
862
+
memset(stashed_xsave, 0, xbuf_size);
863
+
864
+
if (ptrace(PTRACE_GETREGSET, target, (uint32_t)NT_X86_XSTATE, &iov))
865
+
fatal_error("PTRACE_GETREGSET");
866
+
867
+
if (!__compare_tiledata_state(stashed_xsave, xbuf))
868
+
printf("[OK]\tThe init'ed tiledata was read from ptracee.\n");
869
+
else
870
+
printf("[FAIL]\tThe init'ed tiledata was not read from ptracee.\n");
871
+
872
+
printf("\tInject tiledata via ptrace().\n");
873
+
874
+
load_rand_tiledata(xbuf);
875
+
876
+
memcpy(&stashed_xsave->bytes[xtiledata.xbuf_offset],
877
+
&xbuf->bytes[xtiledata.xbuf_offset],
878
+
xtiledata.size);
879
+
880
+
if (ptrace(PTRACE_SETREGSET, target, (uint32_t)NT_X86_XSTATE, &iov))
881
+
fatal_error("PTRACE_SETREGSET");
882
+
883
+
if (ptrace(PTRACE_GETREGSET, target, (uint32_t)NT_X86_XSTATE, &iov))
884
+
fatal_error("PTRACE_GETREGSET");
885
+
886
+
if (!__compare_tiledata_state(stashed_xsave, xbuf))
887
+
printf("[OK]\tTiledata was correctly written to ptracee.\n");
888
+
else
889
+
printf("[FAIL]\tTiledata was not correctly written to ptracee.\n");
890
+
}
891
+
892
+
static void test_ptrace(void)
893
+
{
894
+
pid_t child;
895
+
int status;
896
+
897
+
child = fork();
898
+
if (child < 0) {
899
+
err(1, "fork");
900
+
} else if (!child) {
901
+
if (ptrace(PTRACE_TRACEME, 0, NULL, NULL))
902
+
err(1, "PTRACE_TRACEME");
903
+
904
+
ptracee_firstuse_tiledata();
905
+
906
+
raise(SIGTRAP);
907
+
_exit(0);
908
+
}
909
+
910
+
do {
911
+
wait(&status);
912
+
} while (WSTOPSIG(status) != SIGTRAP);
913
+
914
+
ptracer_inject_tiledata(child);
915
+
916
+
ptrace(PTRACE_DETACH, child, NULL, NULL);
917
+
wait(&status);
918
+
if (!WIFEXITED(status) || WEXITSTATUS(status))
919
+
err(1, "ptrace test");
920
+
}
921
+
836
922
int main(void)
837
923
{
838
924
/* Check hardware availability at first */
···
945
845
ctxtswtest_config.iterations = 10;
946
846
ctxtswtest_config.num_threads = 5;
947
847
test_context_switch();
848
+
849
+
test_ptrace();
948
850
949
851
clearhandler(SIGILL);
950
852
free_stashed_xsave();
+90
tools/testing/vsock/vsock_test.c
+90
tools/testing/vsock/vsock_test.c
···
968
968
test_inv_buf_server(opts, false);
969
969
}
970
970
971
+
#define HELLO_STR "HELLO"
972
+
#define WORLD_STR "WORLD"
973
+
974
+
static void test_stream_virtio_skb_merge_client(const struct test_opts *opts)
975
+
{
976
+
ssize_t res;
977
+
int fd;
978
+
979
+
fd = vsock_stream_connect(opts->peer_cid, 1234);
980
+
if (fd < 0) {
981
+
perror("connect");
982
+
exit(EXIT_FAILURE);
983
+
}
984
+
985
+
/* Send first skbuff. */
986
+
res = send(fd, HELLO_STR, strlen(HELLO_STR), 0);
987
+
if (res != strlen(HELLO_STR)) {
988
+
fprintf(stderr, "unexpected send(2) result %zi\n", res);
989
+
exit(EXIT_FAILURE);
990
+
}
991
+
992
+
control_writeln("SEND0");
993
+
/* Peer reads part of first skbuff. */
994
+
control_expectln("REPLY0");
995
+
996
+
/* Send second skbuff, it will be appended to the first. */
997
+
res = send(fd, WORLD_STR, strlen(WORLD_STR), 0);
998
+
if (res != strlen(WORLD_STR)) {
999
+
fprintf(stderr, "unexpected send(2) result %zi\n", res);
1000
+
exit(EXIT_FAILURE);
1001
+
}
1002
+
1003
+
control_writeln("SEND1");
1004
+
/* Peer reads merged skbuff packet. */
1005
+
control_expectln("REPLY1");
1006
+
1007
+
close(fd);
1008
+
}
1009
+
1010
+
static void test_stream_virtio_skb_merge_server(const struct test_opts *opts)
1011
+
{
1012
+
unsigned char buf[64];
1013
+
ssize_t res;
1014
+
int fd;
1015
+
1016
+
fd = vsock_stream_accept(VMADDR_CID_ANY, 1234, NULL);
1017
+
if (fd < 0) {
1018
+
perror("accept");
1019
+
exit(EXIT_FAILURE);
1020
+
}
1021
+
1022
+
control_expectln("SEND0");
1023
+
1024
+
/* Read skbuff partially. */
1025
+
res = recv(fd, buf, 2, 0);
1026
+
if (res != 2) {
1027
+
fprintf(stderr, "expected recv(2) returns 2 bytes, got %zi\n", res);
1028
+
exit(EXIT_FAILURE);
1029
+
}
1030
+
1031
+
control_writeln("REPLY0");
1032
+
control_expectln("SEND1");
1033
+
1034
+
res = recv(fd, buf + 2, sizeof(buf) - 2, 0);
1035
+
if (res != 8) {
1036
+
fprintf(stderr, "expected recv(2) returns 8 bytes, got %zi\n", res);
1037
+
exit(EXIT_FAILURE);
1038
+
}
1039
+
1040
+
res = recv(fd, buf, sizeof(buf) - 8 - 2, MSG_DONTWAIT);
1041
+
if (res != -1) {
1042
+
fprintf(stderr, "expected recv(2) failure, got %zi\n", res);
1043
+
exit(EXIT_FAILURE);
1044
+
}
1045
+
1046
+
if (memcmp(buf, HELLO_STR WORLD_STR, strlen(HELLO_STR WORLD_STR))) {
1047
+
fprintf(stderr, "pattern mismatch\n");
1048
+
exit(EXIT_FAILURE);
1049
+
}
1050
+
1051
+
control_writeln("REPLY1");
1052
+
1053
+
close(fd);
1054
+
}
1055
+
971
1056
static struct test_case test_cases[] = {
972
1057
{
973
1058
.name = "SOCK_STREAM connection reset",
···
1122
1037
.name = "SOCK_SEQPACKET test invalid buffer",
1123
1038
.run_client = test_seqpacket_inv_buf_client,
1124
1039
.run_server = test_seqpacket_inv_buf_server,
1040
+
},
1041
+
{
1042
+
.name = "SOCK_STREAM virtio skb merge",
1043
+
.run_client = test_stream_virtio_skb_merge_client,
1044
+
.run_server = test_stream_virtio_skb_merge_server,
1125
1045
},
1126
1046
{},
1127
1047
};