Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'usb-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6
* 'usb-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6: (30 commits)
USB: ftdi_sio: add Calao reference board support
USB option driver K3765/K4505 avoid CDC_DATA interface
USB: option: add YUGA device id to driver
usb: s5p-ehci: fix a NULL pointer deference
USB: EHCI: Do not rely on PORT_SUSPEND to stop USB resuming in ehci_bus_resume().
USB option driver add PID of Huawei Vodafone K4605
USB option driver add PID of Huawei Vodafone K3806
xhci: Handle zero-length isochronous packets.
USB: Avoid NULL pointer deref in usb_hcd_alloc_bandwidth.
usb: musb: gadget: fix error path
usb: gadget: f_phonet: unlock in error case
usb: musb: blackfin: include prefetch head file
usb: musb: tusb6010: fix compilation
usb: gadget: renesas_usbhs: fix DMA build by including dma-mapping.h
usb: musb: cppi: fix build errors due to DBG and missing musb variable
usb: musb: ux500: replace missing DBG with dev_dbg
usb: musb: ux500: set dma config for both src and dst
usb: musb: fix oops on musb_gadget_pullup
usb: host: ehci-omap: fix .remove and failure handling path of .probe(v1)
usb: gadget: hid: don't STALL when processing a HID Descriptor request
...
+283
-76
+2
drivers/usb/core/hcd.c
+2
drivers/usb/core/hcd.c
+1
drivers/usb/gadget/f_phonet.c
+1
drivers/usb/gadget/f_phonet.c
+3
-4
drivers/usb/host/ehci-hub.c
+3
-4
drivers/usb/host/ehci-hub.c
···
343
343
u32 temp;
344
344
u32 power_okay;
345
345
int i;
346
-
u8 resume_needed = 0;
346
+
unsigned long resume_needed = 0;
347
347
348
348
if (time_before (jiffies, ehci->next_statechange))
349
349
msleep(5);
···
416
416
if (test_bit(i, &ehci->bus_suspended) &&
417
417
(temp & PORT_SUSPEND)) {
418
418
temp |= PORT_RESUME;
419
-
resume_needed = 1;
419
+
set_bit(i, &resume_needed);
420
420
}
421
421
ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
422
422
}
···
431
431
i = HCS_N_PORTS (ehci->hcs_params);
432
432
while (i--) {
433
433
temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
434
-
if (test_bit(i, &ehci->bus_suspended) &&
435
-
(temp & PORT_SUSPEND)) {
434
+
if (test_bit(i, &resume_needed)) {
436
435
temp &= ~(PORT_RWC_BITS | PORT_RESUME);
437
436
ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
438
437
ehci_vdbg (ehci, "resumed port %d\n", i + 1);
+1
drivers/usb/host/ehci-s5p.c
+1
drivers/usb/host/ehci-s5p.c
+13
-4
drivers/usb/host/xhci-hub.c
+13
-4
drivers/usb/host/xhci-hub.c
···
463
463
&& (temp & PORT_POWER))
464
464
status |= USB_PORT_STAT_SUSPEND;
465
465
}
466
-
if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
466
+
if ((temp & PORT_PLS_MASK) == XDEV_RESUME &&
467
+
!DEV_SUPERSPEED(temp)) {
467
468
if ((temp & PORT_RESET) || !(temp & PORT_PE))
468
469
goto error;
469
-
if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
470
-
bus_state->resume_done[wIndex])) {
470
+
if (time_after_eq(jiffies,
471
+
bus_state->resume_done[wIndex])) {
471
472
xhci_dbg(xhci, "Resume USB2 port %d\n",
472
473
wIndex + 1);
473
474
bus_state->resume_done[wIndex] = 0;
···
488
487
xhci_ring_device(xhci, slot_id);
489
488
bus_state->port_c_suspend |= 1 << wIndex;
490
489
bus_state->suspended_ports &= ~(1 << wIndex);
490
+
} else {
491
+
/*
492
+
* The resume has been signaling for less than
493
+
* 20ms. Report the port status as SUSPEND,
494
+
* let the usbcore check port status again
495
+
* and clear resume signaling later.
496
+
*/
497
+
status |= USB_PORT_STAT_SUSPEND;
491
498
}
492
499
}
493
500
if ((temp & PORT_PLS_MASK) == XDEV_U0
···
673
664
xhci_dbg(xhci, "PORTSC %04x\n", temp);
674
665
if (temp & PORT_RESET)
675
666
goto error;
676
-
if (temp & XDEV_U3) {
667
+
if ((temp & PORT_PLS_MASK) == XDEV_U3) {
677
668
if ((temp & PORT_PE) == 0)
678
669
goto error;
679
670
+63
-27
drivers/usb/host/xhci-ring.c
+63
-27
drivers/usb/host/xhci-ring.c
···
514
514
(unsigned long long) addr);
515
515
}
516
516
517
+
/* flip_cycle means flip the cycle bit of all but the first and last TRB.
518
+
* (The last TRB actually points to the ring enqueue pointer, which is not part
519
+
* of this TD.) This is used to remove partially enqueued isoc TDs from a ring.
520
+
*/
517
521
static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
518
-
struct xhci_td *cur_td)
522
+
struct xhci_td *cur_td, bool flip_cycle)
519
523
{
520
524
struct xhci_segment *cur_seg;
521
525
union xhci_trb *cur_trb;
···
532
528
* leave the pointers intact.
533
529
*/
534
530
cur_trb->generic.field[3] &= cpu_to_le32(~TRB_CHAIN);
531
+
/* Flip the cycle bit (link TRBs can't be the first
532
+
* or last TRB).
533
+
*/
534
+
if (flip_cycle)
535
+
cur_trb->generic.field[3] ^=
536
+
cpu_to_le32(TRB_CYCLE);
535
537
xhci_dbg(xhci, "Cancel (unchain) link TRB\n");
536
538
xhci_dbg(xhci, "Address = %p (0x%llx dma); "
537
539
"in seg %p (0x%llx dma)\n",
···
551
541
cur_trb->generic.field[2] = 0;
552
542
/* Preserve only the cycle bit of this TRB */
553
543
cur_trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
544
+
/* Flip the cycle bit except on the first or last TRB */
545
+
if (flip_cycle && cur_trb != cur_td->first_trb &&
546
+
cur_trb != cur_td->last_trb)
547
+
cur_trb->generic.field[3] ^=
548
+
cpu_to_le32(TRB_CYCLE);
554
549
cur_trb->generic.field[3] |= cpu_to_le32(
555
550
TRB_TYPE(TRB_TR_NOOP));
556
551
xhci_dbg(xhci, "Cancel TRB %p (0x%llx dma) "
···
734
719
cur_td->urb->stream_id,
735
720
cur_td, &deq_state);
736
721
else
737
-
td_to_noop(xhci, ep_ring, cur_td);
722
+
td_to_noop(xhci, ep_ring, cur_td, false);
738
723
remove_finished_td:
739
724
/*
740
725
* The event handler won't see a completion for this TD anymore,
741
726
* so remove it from the endpoint ring's TD list. Keep it in
742
727
* the cancelled TD list for URB completion later.
743
728
*/
744
-
list_del(&cur_td->td_list);
729
+
list_del_init(&cur_td->td_list);
745
730
}
746
731
last_unlinked_td = cur_td;
747
732
xhci_stop_watchdog_timer_in_irq(xhci, ep);
···
769
754
do {
770
755
cur_td = list_entry(ep->cancelled_td_list.next,
771
756
struct xhci_td, cancelled_td_list);
772
-
list_del(&cur_td->cancelled_td_list);
757
+
list_del_init(&cur_td->cancelled_td_list);
773
758
774
759
/* Clean up the cancelled URB */
775
760
/* Doesn't matter what we pass for status, since the core will
···
877
862
cur_td = list_first_entry(&ring->td_list,
878
863
struct xhci_td,
879
864
td_list);
880
-
list_del(&cur_td->td_list);
865
+
list_del_init(&cur_td->td_list);
881
866
if (!list_empty(&cur_td->cancelled_td_list))
882
-
list_del(&cur_td->cancelled_td_list);
867
+
list_del_init(&cur_td->cancelled_td_list);
883
868
xhci_giveback_urb_in_irq(xhci, cur_td,
884
869
-ESHUTDOWN, "killed");
885
870
}
···
888
873
&temp_ep->cancelled_td_list,
889
874
struct xhci_td,
890
875
cancelled_td_list);
891
-
list_del(&cur_td->cancelled_td_list);
876
+
list_del_init(&cur_td->cancelled_td_list);
892
877
xhci_giveback_urb_in_irq(xhci, cur_td,
893
878
-ESHUTDOWN, "killed");
894
879
}
···
1580
1565
else
1581
1566
*status = 0;
1582
1567
}
1583
-
list_del(&td->td_list);
1568
+
list_del_init(&td->td_list);
1584
1569
/* Was this TD slated to be cancelled but completed anyway? */
1585
1570
if (!list_empty(&td->cancelled_td_list))
1586
-
list_del(&td->cancelled_td_list);
1571
+
list_del_init(&td->cancelled_td_list);
1587
1572
1588
1573
urb_priv->td_cnt++;
1589
1574
/* Giveback the urb when all the tds are completed */
···
2515
2500
2516
2501
if (td_index == 0) {
2517
2502
ret = usb_hcd_link_urb_to_ep(bus_to_hcd(urb->dev->bus), urb);
2518
-
if (unlikely(ret)) {
2519
-
xhci_urb_free_priv(xhci, urb_priv);
2520
-
urb->hcpriv = NULL;
2503
+
if (unlikely(ret))
2521
2504
return ret;
2522
-
}
2523
2505
}
2524
2506
2525
2507
td->urb = urb;
···
2683
2671
unsigned int total_packet_count, struct urb *urb)
2684
2672
{
2685
2673
int packets_transferred;
2674
+
2675
+
/* One TRB with a zero-length data packet. */
2676
+
if (running_total == 0 && trb_buff_len == 0)
2677
+
return 0;
2686
2678
2687
2679
/* All the TRB queueing functions don't count the current TRB in
2688
2680
* running_total.
···
3129
3113
struct urb *urb, int i)
3130
3114
{
3131
3115
int num_trbs = 0;
3132
-
u64 addr, td_len, running_total;
3116
+
u64 addr, td_len;
3133
3117
3134
3118
addr = (u64) (urb->transfer_dma + urb->iso_frame_desc[i].offset);
3135
3119
td_len = urb->iso_frame_desc[i].length;
3136
3120
3137
-
running_total = TRB_MAX_BUFF_SIZE - (addr & (TRB_MAX_BUFF_SIZE - 1));
3138
-
running_total &= TRB_MAX_BUFF_SIZE - 1;
3139
-
if (running_total != 0)
3121
+
num_trbs = DIV_ROUND_UP(td_len + (addr & (TRB_MAX_BUFF_SIZE - 1)),
3122
+
TRB_MAX_BUFF_SIZE);
3123
+
if (num_trbs == 0)
3140
3124
num_trbs++;
3141
-
3142
-
while (running_total < td_len) {
3143
-
num_trbs++;
3144
-
running_total += TRB_MAX_BUFF_SIZE;
3145
-
}
3146
3125
3147
3126
return num_trbs;
3148
3127
}
···
3237
3226
start_trb = &ep_ring->enqueue->generic;
3238
3227
start_cycle = ep_ring->cycle_state;
3239
3228
3229
+
urb_priv = urb->hcpriv;
3240
3230
/* Queue the first TRB, even if it's zero-length */
3241
3231
for (i = 0; i < num_tds; i++) {
3242
3232
unsigned int total_packet_count;
···
3249
3237
addr = start_addr + urb->iso_frame_desc[i].offset;
3250
3238
td_len = urb->iso_frame_desc[i].length;
3251
3239
td_remain_len = td_len;
3252
-
/* FIXME: Ignoring zero-length packets, can those happen? */
3253
3240
total_packet_count = roundup(td_len,
3254
3241
le16_to_cpu(urb->ep->desc.wMaxPacketSize));
3242
+
/* A zero-length transfer still involves at least one packet. */
3243
+
if (total_packet_count == 0)
3244
+
total_packet_count++;
3255
3245
burst_count = xhci_get_burst_count(xhci, urb->dev, urb,
3256
3246
total_packet_count);
3257
3247
residue = xhci_get_last_burst_packet_count(xhci,
···
3263
3249
3264
3250
ret = prepare_transfer(xhci, xhci->devs[slot_id], ep_index,
3265
3251
urb->stream_id, trbs_per_td, urb, i, mem_flags);
3266
-
if (ret < 0)
3267
-
return ret;
3252
+
if (ret < 0) {
3253
+
if (i == 0)
3254
+
return ret;
3255
+
goto cleanup;
3256
+
}
3268
3257
3269
-
urb_priv = urb->hcpriv;
3270
3258
td = urb_priv->td[i];
3271
-
3272
3259
for (j = 0; j < trbs_per_td; j++) {
3273
3260
u32 remainder = 0;
3274
3261
field = TRB_TBC(burst_count) | TRB_TLBPC(residue);
···
3359
3344
giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
3360
3345
start_cycle, start_trb);
3361
3346
return 0;
3347
+
cleanup:
3348
+
/* Clean up a partially enqueued isoc transfer. */
3349
+
3350
+
for (i--; i >= 0; i--)
3351
+
list_del_init(&urb_priv->td[i]->td_list);
3352
+
3353
+
/* Use the first TD as a temporary variable to turn the TDs we've queued
3354
+
* into No-ops with a software-owned cycle bit. That way the hardware
3355
+
* won't accidentally start executing bogus TDs when we partially
3356
+
* overwrite them. td->first_trb and td->start_seg are already set.
3357
+
*/
3358
+
urb_priv->td[0]->last_trb = ep_ring->enqueue;
3359
+
/* Every TRB except the first & last will have its cycle bit flipped. */
3360
+
td_to_noop(xhci, ep_ring, urb_priv->td[0], true);
3361
+
3362
+
/* Reset the ring enqueue back to the first TRB and its cycle bit. */
3363
+
ep_ring->enqueue = urb_priv->td[0]->first_trb;
3364
+
ep_ring->enq_seg = urb_priv->td[0]->start_seg;
3365
+
ep_ring->cycle_state = start_cycle;
3366
+
usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb);
3367
+
return ret;
3362
3368
}
3363
3369
3364
3370
/*
+24
-4
drivers/usb/host/xhci.c
+24
-4
drivers/usb/host/xhci.c
···
1085
1085
if (urb->dev->speed == USB_SPEED_FULL) {
1086
1086
ret = xhci_check_maxpacket(xhci, slot_id,
1087
1087
ep_index, urb);
1088
-
if (ret < 0)
1088
+
if (ret < 0) {
1089
+
xhci_urb_free_priv(xhci, urb_priv);
1090
+
urb->hcpriv = NULL;
1089
1091
return ret;
1092
+
}
1090
1093
}
1091
1094
1092
1095
/* We have a spinlock and interrupts disabled, so we must pass
···
1100
1097
goto dying;
1101
1098
ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1102
1099
slot_id, ep_index);
1100
+
if (ret)
1101
+
goto free_priv;
1103
1102
spin_unlock_irqrestore(&xhci->lock, flags);
1104
1103
} else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1105
1104
spin_lock_irqsave(&xhci->lock, flags);
···
1122
1117
ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1123
1118
slot_id, ep_index);
1124
1119
}
1120
+
if (ret)
1121
+
goto free_priv;
1125
1122
spin_unlock_irqrestore(&xhci->lock, flags);
1126
1123
} else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1127
1124
spin_lock_irqsave(&xhci->lock, flags);
···
1131
1124
goto dying;
1132
1125
ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1133
1126
slot_id, ep_index);
1127
+
if (ret)
1128
+
goto free_priv;
1134
1129
spin_unlock_irqrestore(&xhci->lock, flags);
1135
1130
} else {
1136
1131
spin_lock_irqsave(&xhci->lock, flags);
···
1140
1131
goto dying;
1141
1132
ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1142
1133
slot_id, ep_index);
1134
+
if (ret)
1135
+
goto free_priv;
1143
1136
spin_unlock_irqrestore(&xhci->lock, flags);
1144
1137
}
1145
1138
exit:
1146
1139
return ret;
1147
1140
dying:
1148
-
xhci_urb_free_priv(xhci, urb_priv);
1149
-
urb->hcpriv = NULL;
1150
1141
xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1151
1142
"non-responsive xHCI host.\n",
1152
1143
urb->ep->desc.bEndpointAddress, urb);
1144
+
ret = -ESHUTDOWN;
1145
+
free_priv:
1146
+
xhci_urb_free_priv(xhci, urb_priv);
1147
+
urb->hcpriv = NULL;
1153
1148
spin_unlock_irqrestore(&xhci->lock, flags);
1154
-
return -ESHUTDOWN;
1149
+
return ret;
1155
1150
}
1156
1151
1157
1152
/* Get the right ring for the given URB.
···
1252
1239
if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1253
1240
xhci_dbg(xhci, "HW died, freeing TD.\n");
1254
1241
urb_priv = urb->hcpriv;
1242
+
for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1243
+
td = urb_priv->td[i];
1244
+
if (!list_empty(&td->td_list))
1245
+
list_del_init(&td->td_list);
1246
+
if (!list_empty(&td->cancelled_td_list))
1247
+
list_del_init(&td->cancelled_td_list);
1248
+
}
1255
1249
1256
1250
usb_hcd_unlink_urb_from_ep(hcd, urb);
1257
1251
spin_unlock_irqrestore(&xhci->lock, flags);
+1
drivers/usb/musb/blackfin.c
+1
drivers/usb/musb/blackfin.c
+17
-9
drivers/usb/musb/cppi_dma.c
+17
-9
drivers/usb/musb/cppi_dma.c
···
226
226
struct cppi *controller;
227
227
void __iomem *tibase;
228
228
int i;
229
+
struct musb *musb;
229
230
230
231
controller = container_of(c, struct cppi, controller);
232
+
musb = controller->musb;
231
233
232
234
tibase = controller->tibase;
233
235
/* DISABLE INDIVIDUAL CHANNEL Interrupts */
···
291
289
u8 index;
292
290
struct cppi_channel *cppi_ch;
293
291
void __iomem *tibase;
292
+
struct musb *musb;
294
293
295
294
controller = container_of(c, struct cppi, controller);
296
295
tibase = controller->tibase;
296
+
musb = controller->musb;
297
297
298
298
/* ep0 doesn't use DMA; remember cppi indices are 0..N-1 */
299
299
index = ep->epnum - 1;
···
343
339
c = container_of(channel, struct cppi_channel, channel);
344
340
tibase = c->controller->tibase;
345
341
if (!c->hw_ep)
346
-
dev_dbg(musb->controller, "releasing idle DMA channel %p\n", c);
342
+
dev_dbg(c->controller->musb->controller,
343
+
"releasing idle DMA channel %p\n", c);
347
344
else if (!c->transmit)
348
345
core_rxirq_enable(tibase, c->index + 1);
349
346
···
362
357
363
358
musb_ep_select(base, c->index + 1);
364
359
365
-
DBG(level, "RX DMA%d%s: %d left, csr %04x, "
366
-
"%08x H%08x S%08x C%08x, "
367
-
"B%08x L%08x %08x .. %08x"
368
-
"\n",
360
+
dev_dbg(c->controller->musb->controller,
361
+
"RX DMA%d%s: %d left, csr %04x, "
362
+
"%08x H%08x S%08x C%08x, "
363
+
"B%08x L%08x %08x .. %08x"
364
+
"\n",
369
365
c->index, tag,
370
366
musb_readl(c->controller->tibase,
371
367
DAVINCI_RXCPPI_BUFCNT0_REG + 4 * c->index),
···
393
387
394
388
musb_ep_select(base, c->index + 1);
395
389
396
-
DBG(level, "TX DMA%d%s: csr %04x, "
397
-
"H%08x S%08x C%08x %08x, "
398
-
"F%08x L%08x .. %08x"
399
-
"\n",
390
+
dev_dbg(c->controller->musb->controller,
391
+
"TX DMA%d%s: csr %04x, "
392
+
"H%08x S%08x C%08x %08x, "
393
+
"F%08x L%08x .. %08x"
394
+
"\n",
400
395
c->index, tag,
401
396
musb_readw(c->hw_ep->regs, MUSB_TXCSR),
402
397
···
1029
1022
int i;
1030
1023
dma_addr_t safe2ack;
1031
1024
void __iomem *regs = rx->hw_ep->regs;
1025
+
struct musb *musb = cppi->musb;
1032
1026
1033
1027
cppi_dump_rx(6, rx, "/K");
1034
1028
+8
-4
drivers/usb/musb/musb_core.h
+8
-4
drivers/usb/musb/musb_core.h
···
172
172
#endif
173
173
174
174
/* TUSB mapping: "flat" plus ep0 special cases */
175
-
#if defined(CONFIG_USB_MUSB_TUSB6010)
175
+
#if defined(CONFIG_USB_MUSB_TUSB6010) || \
176
+
defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
176
177
#define musb_ep_select(_mbase, _epnum) \
177
178
musb_writeb((_mbase), MUSB_INDEX, (_epnum))
178
179
#define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
···
242
241
void __iomem *fifo;
243
242
void __iomem *regs;
244
243
245
-
#ifdef CONFIG_USB_MUSB_TUSB6010
244
+
#if defined(CONFIG_USB_MUSB_TUSB6010) || \
245
+
defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
246
246
void __iomem *conf;
247
247
#endif
248
248
···
260
258
struct dma_channel *tx_channel;
261
259
struct dma_channel *rx_channel;
262
260
263
-
#ifdef CONFIG_USB_MUSB_TUSB6010
261
+
#if defined(CONFIG_USB_MUSB_TUSB6010) || \
262
+
defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
264
263
/* TUSB has "asynchronous" and "synchronous" dma modes */
265
264
dma_addr_t fifo_async;
266
265
dma_addr_t fifo_sync;
···
359
356
void __iomem *ctrl_base;
360
357
void __iomem *mregs;
361
358
362
-
#ifdef CONFIG_USB_MUSB_TUSB6010
359
+
#if defined(CONFIG_USB_MUSB_TUSB6010) || \
360
+
defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
363
361
dma_addr_t async;
364
362
dma_addr_t sync;
365
363
void __iomem *sync_va;
+3
-1
drivers/usb/musb/musb_gadget.c
+3
-1
drivers/usb/musb/musb_gadget.c
···
1856
1856
1857
1857
return 0;
1858
1858
err:
1859
+
musb->g.dev.parent = NULL;
1859
1860
device_unregister(&musb->g.dev);
1860
1861
return status;
1861
1862
}
···
1864
1863
void musb_gadget_cleanup(struct musb *musb)
1865
1864
{
1866
1865
usb_del_gadget_udc(&musb->g);
1867
-
device_unregister(&musb->g.dev);
1866
+
if (musb->g.dev.parent)
1867
+
device_unregister(&musb->g.dev);
1868
1868
}
1869
1869
1870
1870
/*
+4
-2
drivers/usb/musb/musb_regs.h
+4
-2
drivers/usb/musb/musb_regs.h
···
234
234
#define MUSB_TESTMODE 0x0F /* 8 bit */
235
235
236
236
/* Get offset for a given FIFO from musb->mregs */
237
-
#ifdef CONFIG_USB_MUSB_TUSB6010
237
+
#if defined(CONFIG_USB_MUSB_TUSB6010) || \
238
+
defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
238
239
#define MUSB_FIFO_OFFSET(epnum) (0x200 + ((epnum) * 0x20))
239
240
#else
240
241
#define MUSB_FIFO_OFFSET(epnum) (0x20 + ((epnum) * 4))
···
296
295
#define MUSB_FLAT_OFFSET(_epnum, _offset) \
297
296
(0x100 + (0x10*(_epnum)) + (_offset))
298
297
299
-
#ifdef CONFIG_USB_MUSB_TUSB6010
298
+
#if defined(CONFIG_USB_MUSB_TUSB6010) || \
299
+
defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
300
300
/* TUSB6010 EP0 configuration register is special */
301
301
#define MUSB_TUSB_OFFSET(_epnum, _offset) \
302
302
(0x10 + _offset)
+1
drivers/usb/musb/tusb6010.c
+1
drivers/usb/musb/tusb6010.c
+1
drivers/usb/musb/tusb6010_omap.c
+1
drivers/usb/musb/tusb6010_omap.c
+21
-17
drivers/usb/musb/ux500_dma.c
+21
-17
drivers/usb/musb/ux500_dma.c
···
65
65
struct musb *musb = hw_ep->musb;
66
66
unsigned long flags;
67
67
68
-
DBG(4, "DMA tx transfer done on hw_ep=%d\n", hw_ep->epnum);
68
+
dev_dbg(musb->controller, "DMA tx transfer done on hw_ep=%d\n",
69
+
hw_ep->epnum);
69
70
70
71
spin_lock_irqsave(&musb->lock, flags);
71
72
ux500_channel->channel.actual_len = ux500_channel->cur_len;
···
85
84
struct musb *musb = hw_ep->musb;
86
85
unsigned long flags;
87
86
88
-
DBG(4, "DMA rx transfer done on hw_ep=%d\n", hw_ep->epnum);
87
+
dev_dbg(musb->controller, "DMA rx transfer done on hw_ep=%d\n",
88
+
hw_ep->epnum);
89
89
90
90
spin_lock_irqsave(&musb->lock, flags);
91
91
ux500_channel->channel.actual_len = ux500_channel->cur_len;
···
118
116
enum dma_slave_buswidth addr_width;
119
117
dma_addr_t usb_fifo_addr = (MUSB_FIFO_OFFSET(hw_ep->epnum) +
120
118
ux500_channel->controller->phy_base);
119
+
struct musb *musb = ux500_channel->controller->private_data;
121
120
122
-
DBG(4, "packet_sz=%d, mode=%d, dma_addr=0x%x, len=%d is_tx=%d\n",
123
-
packet_sz, mode, dma_addr, len, ux500_channel->is_tx);
121
+
dev_dbg(musb->controller,
122
+
"packet_sz=%d, mode=%d, dma_addr=0x%x, len=%d is_tx=%d\n",
123
+
packet_sz, mode, dma_addr, len, ux500_channel->is_tx);
124
124
125
125
ux500_channel->cur_len = len;
126
126
···
137
133
DMA_SLAVE_BUSWIDTH_4_BYTES;
138
134
139
135
slave_conf.direction = direction;
140
-
if (direction == DMA_FROM_DEVICE) {
141
-
slave_conf.src_addr = usb_fifo_addr;
142
-
slave_conf.src_addr_width = addr_width;
143
-
slave_conf.src_maxburst = 16;
144
-
} else {
145
-
slave_conf.dst_addr = usb_fifo_addr;
146
-
slave_conf.dst_addr_width = addr_width;
147
-
slave_conf.dst_maxburst = 16;
148
-
}
136
+
slave_conf.src_addr = usb_fifo_addr;
137
+
slave_conf.src_addr_width = addr_width;
138
+
slave_conf.src_maxburst = 16;
139
+
slave_conf.dst_addr = usb_fifo_addr;
140
+
slave_conf.dst_addr_width = addr_width;
141
+
slave_conf.dst_maxburst = 16;
142
+
149
143
dma_chan->device->device_control(dma_chan, DMA_SLAVE_CONFIG,
150
144
(unsigned long) &slave_conf);
151
145
···
168
166
struct ux500_dma_controller *controller = container_of(c,
169
167
struct ux500_dma_controller, controller);
170
168
struct ux500_dma_channel *ux500_channel = NULL;
169
+
struct musb *musb = controller->private_data;
171
170
u8 ch_num = hw_ep->epnum - 1;
172
171
u32 max_ch;
173
172
···
195
192
ux500_channel->hw_ep = hw_ep;
196
193
ux500_channel->is_allocated = 1;
197
194
198
-
DBG(7, "hw_ep=%d, is_tx=0x%x, channel=%d\n",
195
+
dev_dbg(musb->controller, "hw_ep=%d, is_tx=0x%x, channel=%d\n",
199
196
hw_ep->epnum, is_tx, ch_num);
200
197
201
198
return &(ux500_channel->channel);
···
204
201
static void ux500_dma_channel_release(struct dma_channel *channel)
205
202
{
206
203
struct ux500_dma_channel *ux500_channel = channel->private_data;
204
+
struct musb *musb = ux500_channel->controller->private_data;
207
205
208
-
DBG(7, "channel=%d\n", ux500_channel->ch_num);
206
+
dev_dbg(musb->controller, "channel=%d\n", ux500_channel->ch_num);
209
207
210
208
if (ux500_channel->is_allocated) {
211
209
ux500_channel->is_allocated = 0;
···
256
252
void __iomem *epio = musb->endpoints[ux500_channel->hw_ep->epnum].regs;
257
253
u16 csr;
258
254
259
-
DBG(4, "channel=%d, is_tx=%d\n", ux500_channel->ch_num,
260
-
ux500_channel->is_tx);
255
+
dev_dbg(musb->controller, "channel=%d, is_tx=%d\n",
256
+
ux500_channel->ch_num, ux500_channel->is_tx);
261
257
262
258
if (channel->status == MUSB_DMA_STATUS_BUSY) {
263
259
if (ux500_channel->is_tx) {
+19
-1
drivers/usb/serial/ftdi_sio.c
+19
-1
drivers/usb/serial/ftdi_sio.c
···
101
101
static int ftdi_mtxorb_hack_setup(struct usb_serial *serial);
102
102
static int ftdi_NDI_device_setup(struct usb_serial *serial);
103
103
static int ftdi_stmclite_probe(struct usb_serial *serial);
104
+
static int ftdi_8u2232c_probe(struct usb_serial *serial);
104
105
static void ftdi_USB_UIRT_setup(struct ftdi_private *priv);
105
106
static void ftdi_HE_TIRA1_setup(struct ftdi_private *priv);
106
107
···
127
126
128
127
static struct ftdi_sio_quirk ftdi_stmclite_quirk = {
129
128
.probe = ftdi_stmclite_probe,
129
+
};
130
+
131
+
static struct ftdi_sio_quirk ftdi_8u2232c_quirk = {
132
+
.probe = ftdi_8u2232c_probe,
130
133
};
131
134
132
135
/*
···
183
178
{ USB_DEVICE(FTDI_VID, FTDI_8U232AM_PID) },
184
179
{ USB_DEVICE(FTDI_VID, FTDI_8U232AM_ALT_PID) },
185
180
{ USB_DEVICE(FTDI_VID, FTDI_232RL_PID) },
186
-
{ USB_DEVICE(FTDI_VID, FTDI_8U2232C_PID) },
181
+
{ USB_DEVICE(FTDI_VID, FTDI_8U2232C_PID) ,
182
+
.driver_info = (kernel_ulong_t)&ftdi_8u2232c_quirk },
187
183
{ USB_DEVICE(FTDI_VID, FTDI_4232H_PID) },
188
184
{ USB_DEVICE(FTDI_VID, FTDI_232H_PID) },
189
185
{ USB_DEVICE(FTDI_VID, FTDI_MICRO_CHAMELEON_PID) },
···
1739
1733
"Ignoring serial port reserved for JTAG\n");
1740
1734
return -ENODEV;
1741
1735
}
1736
+
1737
+
return 0;
1738
+
}
1739
+
1740
+
static int ftdi_8u2232c_probe(struct usb_serial *serial)
1741
+
{
1742
+
struct usb_device *udev = serial->dev;
1743
+
1744
+
dbg("%s", __func__);
1745
+
1746
+
if (strcmp(udev->manufacturer, "CALAO Systems") == 0)
1747
+
return ftdi_jtag_probe(serial);
1742
1748
1743
1749
return 0;
1744
1750
}
+101
-3
drivers/usb/serial/option.c
+101
-3
drivers/usb/serial/option.c
···
148
148
#define HUAWEI_PRODUCT_K4505 0x1464
149
149
#define HUAWEI_PRODUCT_K3765 0x1465
150
150
#define HUAWEI_PRODUCT_E14AC 0x14AC
151
+
#define HUAWEI_PRODUCT_K3806 0x14AE
152
+
#define HUAWEI_PRODUCT_K4605 0x14C6
151
153
#define HUAWEI_PRODUCT_K3770 0x14C9
152
154
#define HUAWEI_PRODUCT_K3771 0x14CA
153
155
#define HUAWEI_PRODUCT_K4510 0x14CB
···
418
416
#define SAMSUNG_VENDOR_ID 0x04e8
419
417
#define SAMSUNG_PRODUCT_GT_B3730 0x6889
420
418
419
+
/* YUGA products www.yuga-info.com*/
420
+
#define YUGA_VENDOR_ID 0x257A
421
+
#define YUGA_PRODUCT_CEM600 0x1601
422
+
#define YUGA_PRODUCT_CEM610 0x1602
423
+
#define YUGA_PRODUCT_CEM500 0x1603
424
+
#define YUGA_PRODUCT_CEM510 0x1604
425
+
#define YUGA_PRODUCT_CEM800 0x1605
426
+
#define YUGA_PRODUCT_CEM900 0x1606
427
+
428
+
#define YUGA_PRODUCT_CEU818 0x1607
429
+
#define YUGA_PRODUCT_CEU816 0x1608
430
+
#define YUGA_PRODUCT_CEU828 0x1609
431
+
#define YUGA_PRODUCT_CEU826 0x160A
432
+
#define YUGA_PRODUCT_CEU518 0x160B
433
+
#define YUGA_PRODUCT_CEU516 0x160C
434
+
#define YUGA_PRODUCT_CEU528 0x160D
435
+
#define YUGA_PRODUCT_CEU526 0x160F
436
+
437
+
#define YUGA_PRODUCT_CWM600 0x2601
438
+
#define YUGA_PRODUCT_CWM610 0x2602
439
+
#define YUGA_PRODUCT_CWM500 0x2603
440
+
#define YUGA_PRODUCT_CWM510 0x2604
441
+
#define YUGA_PRODUCT_CWM800 0x2605
442
+
#define YUGA_PRODUCT_CWM900 0x2606
443
+
444
+
#define YUGA_PRODUCT_CWU718 0x2607
445
+
#define YUGA_PRODUCT_CWU716 0x2608
446
+
#define YUGA_PRODUCT_CWU728 0x2609
447
+
#define YUGA_PRODUCT_CWU726 0x260A
448
+
#define YUGA_PRODUCT_CWU518 0x260B
449
+
#define YUGA_PRODUCT_CWU516 0x260C
450
+
#define YUGA_PRODUCT_CWU528 0x260D
451
+
#define YUGA_PRODUCT_CWU526 0x260F
452
+
453
+
#define YUGA_PRODUCT_CLM600 0x2601
454
+
#define YUGA_PRODUCT_CLM610 0x2602
455
+
#define YUGA_PRODUCT_CLM500 0x2603
456
+
#define YUGA_PRODUCT_CLM510 0x2604
457
+
#define YUGA_PRODUCT_CLM800 0x2605
458
+
#define YUGA_PRODUCT_CLM900 0x2606
459
+
460
+
#define YUGA_PRODUCT_CLU718 0x2607
461
+
#define YUGA_PRODUCT_CLU716 0x2608
462
+
#define YUGA_PRODUCT_CLU728 0x2609
463
+
#define YUGA_PRODUCT_CLU726 0x260A
464
+
#define YUGA_PRODUCT_CLU518 0x260B
465
+
#define YUGA_PRODUCT_CLU516 0x260C
466
+
#define YUGA_PRODUCT_CLU528 0x260D
467
+
#define YUGA_PRODUCT_CLU526 0x260F
468
+
421
469
/* some devices interfaces need special handling due to a number of reasons */
422
470
enum option_blacklist_reason {
423
471
OPTION_BLACKLIST_NONE = 0,
···
603
551
{ USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K3765, 0xff, 0xff, 0xff) },
604
552
{ USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_ETS1220, 0xff, 0xff, 0xff) },
605
553
{ USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E14AC, 0xff, 0xff, 0xff) },
554
+
{ USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K3806, 0xff, 0xff, 0xff) },
555
+
{ USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K4605, 0xff, 0xff, 0xff) },
606
556
{ USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K3770, 0xff, 0x02, 0x31) },
607
557
{ USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K3770, 0xff, 0x02, 0x32) },
608
558
{ USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K3771, 0xff, 0x02, 0x31) },
···
1059
1005
{ USB_DEVICE(CELOT_VENDOR_ID, CELOT_PRODUCT_CT680M) }, /* CT-650 CDMA 450 1xEVDO modem */
1060
1006
{ USB_DEVICE(ONDA_VENDOR_ID, ONDA_MT825UP) }, /* ONDA MT825UP modem */
1061
1007
{ USB_DEVICE_AND_INTERFACE_INFO(SAMSUNG_VENDOR_ID, SAMSUNG_PRODUCT_GT_B3730, USB_CLASS_CDC_DATA, 0x00, 0x00) }, /* Samsung GT-B3730 LTE USB modem.*/
1008
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEM600) },
1009
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEM610) },
1010
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEM500) },
1011
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEM510) },
1012
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEM800) },
1013
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEM900) },
1014
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEU818) },
1015
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEU816) },
1016
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEU828) },
1017
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEU826) },
1018
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEU518) },
1019
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEU516) },
1020
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEU528) },
1021
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEU526) },
1022
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWM600) },
1023
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWM610) },
1024
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWM500) },
1025
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWM510) },
1026
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWM800) },
1027
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWM900) },
1028
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWU718) },
1029
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWU716) },
1030
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWU728) },
1031
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWU726) },
1032
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWU518) },
1033
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWU516) },
1034
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWU528) },
1035
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CWU526) },
1036
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLM600) },
1037
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLM610) },
1038
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLM500) },
1039
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLM510) },
1040
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLM800) },
1041
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLM900) },
1042
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLU718) },
1043
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLU716) },
1044
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLU728) },
1045
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLU726) },
1046
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLU518) },
1047
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLU516) },
1048
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLU528) },
1049
+
{ USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CLU526) },
1062
1050
{ } /* Terminating entry */
1063
1051
};
1064
1052
MODULE_DEVICE_TABLE(usb, option_ids);
···
1230
1134
serial->interface->cur_altsetting->desc.bInterfaceClass != 0xff)
1231
1135
return -ENODEV;
1232
1136
1233
-
/* Don't bind network interfaces on Huawei K3765 & K4505 */
1137
+
/* Don't bind network interfaces on Huawei K3765, K4505 & K4605 */
1234
1138
if (serial->dev->descriptor.idVendor == HUAWEI_VENDOR_ID &&
1235
1139
(serial->dev->descriptor.idProduct == HUAWEI_PRODUCT_K3765 ||
1236
-
serial->dev->descriptor.idProduct == HUAWEI_PRODUCT_K4505) &&
1237
-
serial->interface->cur_altsetting->desc.bInterfaceNumber == 1)
1140
+
serial->dev->descriptor.idProduct == HUAWEI_PRODUCT_K4505 ||
1141
+
serial->dev->descriptor.idProduct == HUAWEI_PRODUCT_K4605) &&
1142
+
(serial->interface->cur_altsetting->desc.bInterfaceNumber == 1 ||
1143
+
serial->interface->cur_altsetting->desc.bInterfaceNumber == 2))
1238
1144
return -ENODEV;
1239
1145
1240
1146
/* Don't bind network interface on Samsung GT-B3730, it is handled by a separate module */