Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge git://git.infradead.org/~dwmw2/mtd-2.6.23
* git://git.infradead.org/~dwmw2/mtd-2.6.23:
[MTD] [NAND] nand_base.c: fix type of eccpos pointer
[MTD] [NAND] at91_nand rdy_pin fix
[MTD] [NAND] fix race in nand_base.c
[MTD] [NAND] Fix refactoring of EDB7312 hwcontrol function.
[MTD] Fix potential leak in rfd_ftl_add_mtd
[JFFS2] Print correct node offset when complaining about broken data CRC
[JFFS2] Fix suspend failure with JFFS2 GC thread.
[JFFS2] Deletion dirents should be REF_NORMAL, not REF_PRISTINE.
[JFFS2] Prevent oops after 'node added in wrong place' debug check
+45
-18
+4
-1
drivers/mtd/nand/at91_nand.c
+4
-1
drivers/mtd/nand/at91_nand.c
···
128
128
nand_chip->IO_ADDR_R = host->io_base;
129
129
nand_chip->IO_ADDR_W = host->io_base;
130
130
nand_chip->cmd_ctrl = at91_nand_cmd_ctrl;
131
-
nand_chip->dev_ready = at91_nand_device_ready;
131
+
132
+
if (host->board->rdy_pin)
133
+
nand_chip->dev_ready = at91_nand_device_ready;
134
+
132
135
nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */
133
136
nand_chip->chip_delay = 20; /* 20us command delay time */
134
137
+5
-5
drivers/mtd/nand/edb7312.c
+5
-5
drivers/mtd/nand/edb7312.c
···
74
74
/*
75
75
* hardware specific access to control-lines
76
76
*
77
-
* NAND_NCE: bit 0 -> bit 7
77
+
* NAND_NCE: bit 0 -> bit 6 (bit 7 = 1)
78
78
* NAND_CLE: bit 1 -> bit 4
79
79
* NAND_ALE: bit 2 -> bit 5
80
80
*/
···
83
83
struct nand_chip *chip = mtd->priv;
84
84
85
85
if (ctrl & NAND_CTRL_CHANGE) {
86
-
unsigned char bits;
86
+
unsigned char bits = 0x80;
87
87
88
-
bits = (ctrl & (NAND_CLE | NAND_ALE)) << 3;
89
-
bits = (ctrl & NAND_NCE) << 7;
88
+
bits |= (ctrl & (NAND_CLE | NAND_ALE)) << 3;
89
+
bits |= (ctrl & NAND_NCE) ? 0x00 : 0x40;
90
90
91
-
clps_writeb((clps_readb(ep7312_pxdr) & 0xB0) | 0x10,
91
+
clps_writeb((clps_readb(ep7312_pxdr) & 0xF0) | bits,
92
92
ep7312_pxdr);
93
93
}
94
94
if (cmd != NAND_CMD_NONE)
+8
-4
drivers/mtd/nand/nand_base.c
+8
-4
drivers/mtd/nand/nand_base.c
···
24
24
* if we have HW ecc support.
25
25
* The AG-AND chips have nice features for speed improvement,
26
26
* which are not supported yet. Read / program 4 pages in one go.
27
+
* BBT table is not serialized, has to be fixed
27
28
*
28
29
* This program is free software; you can redistribute it and/or modify
29
30
* it under the terms of the GNU General Public License version 2 as
···
361
360
/* We write two bytes, so we dont have to mess with 16 bit
362
361
* access
363
362
*/
363
+
nand_get_device(chip, mtd, FL_WRITING);
364
364
ofs += mtd->oobsize;
365
365
chip->ops.len = chip->ops.ooblen = 2;
366
366
chip->ops.datbuf = NULL;
···
369
367
chip->ops.ooboffs = chip->badblockpos & ~0x01;
370
368
371
369
ret = nand_do_write_oob(mtd, ofs, &chip->ops);
370
+
nand_release_device(mtd);
372
371
}
373
372
if (!ret)
374
373
mtd->ecc_stats.badblocks++;
374
+
375
375
return ret;
376
376
}
377
377
···
772
768
uint8_t *p = buf;
773
769
uint8_t *ecc_calc = chip->buffers->ecccalc;
774
770
uint8_t *ecc_code = chip->buffers->ecccode;
775
-
int *eccpos = chip->ecc.layout->eccpos;
771
+
uint32_t *eccpos = chip->ecc.layout->eccpos;
776
772
777
773
chip->ecc.read_page_raw(mtd, chip, buf);
778
774
···
814
810
uint8_t *p = buf;
815
811
uint8_t *ecc_calc = chip->buffers->ecccalc;
816
812
uint8_t *ecc_code = chip->buffers->ecccode;
817
-
int *eccpos = chip->ecc.layout->eccpos;
813
+
uint32_t *eccpos = chip->ecc.layout->eccpos;
818
814
819
815
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
820
816
chip->ecc.hwctl(mtd, NAND_ECC_READ);
···
1420
1416
int eccsteps = chip->ecc.steps;
1421
1417
uint8_t *ecc_calc = chip->buffers->ecccalc;
1422
1418
const uint8_t *p = buf;
1423
-
int *eccpos = chip->ecc.layout->eccpos;
1419
+
uint32_t *eccpos = chip->ecc.layout->eccpos;
1424
1420
1425
1421
/* Software ecc calculation */
1426
1422
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
···
1446
1442
int eccsteps = chip->ecc.steps;
1447
1443
uint8_t *ecc_calc = chip->buffers->ecccalc;
1448
1444
const uint8_t *p = buf;
1449
-
int *eccpos = chip->ecc.layout->eccpos;
1445
+
uint32_t *eccpos = chip->ecc.layout->eccpos;
1450
1446
1451
1447
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1452
1448
chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
+1
drivers/mtd/rfd_ftl.c
+1
drivers/mtd/rfd_ftl.c
+4
-4
fs/jffs2/background.c
+4
-4
fs/jffs2/background.c
···
84
84
set_freezable();
85
85
for (;;) {
86
86
allow_signal(SIGHUP);
87
-
87
+
again:
88
88
if (!jffs2_thread_should_wake(c)) {
89
89
set_current_state (TASK_INTERRUPTIBLE);
90
90
D1(printk(KERN_DEBUG "jffs2_garbage_collect_thread sleeping...\n"));
···
94
94
is only an optimisation anyway. */
95
95
schedule();
96
96
}
97
-
98
-
if (try_to_freeze())
99
-
continue;
100
97
101
98
/* This thread is purely an optimisation. But if it runs when
102
99
other things could be running, it actually makes things a
···
108
111
while (signal_pending(current)) {
109
112
siginfo_t info;
110
113
unsigned long signr;
114
+
115
+
if (try_to_freeze())
116
+
goto again;
111
117
112
118
signr = dequeue_signal_lock(current, ¤t->blocked, &info);
113
119
+5
fs/jffs2/nodelist.h
+5
fs/jffs2/nodelist.h
···
139
139
#define ref_obsolete(ref) (((ref)->flash_offset & 3) == REF_OBSOLETE)
140
140
#define mark_ref_normal(ref) do { (ref)->flash_offset = ref_offset(ref) | REF_NORMAL; } while(0)
141
141
142
+
/* Dirent nodes should be REF_PRISTINE only if they are not a deletion
143
+
dirent. Deletion dirents should be REF_NORMAL so that GC gets to
144
+
throw them away when appropriate */
145
+
#define dirent_node_state(rd) ( (je32_to_cpu((rd)->ino)?REF_PRISTINE:REF_NORMAL) )
146
+
142
147
/* NB: REF_PRISTINE for an inode-less node (ref->next_in_ino == NULL) indicates
143
148
it is an unknown node of type JFFS2_NODETYPE_RWCOMPAT_COPY, so it'll get
144
149
copied. If you need to do anything different to GC inode-less nodes, then
+2
-2
fs/jffs2/readinode.c
+2
-2
fs/jffs2/readinode.c
···
104
104
105
105
if (crc != tn->data_crc) {
106
106
JFFS2_NOTICE("wrong data CRC in data node at 0x%08x: read %#08x, calculated %#08x.\n",
107
-
ofs, tn->data_crc, crc);
107
+
ref_offset(ref), tn->data_crc, crc);
108
108
return 1;
109
109
}
110
110
···
613
613
jeb->unchecked_size -= len;
614
614
c->used_size += len;
615
615
c->unchecked_size -= len;
616
-
ref->flash_offset = ref_offset(ref) | REF_PRISTINE;
616
+
ref->flash_offset = ref_offset(ref) | dirent_node_state(rd);
617
617
spin_unlock(&c->erase_completion_lock);
618
618
}
619
619
+2
-1
fs/jffs2/scan.c
+2
-1
fs/jffs2/scan.c
···
1049
1049
return -ENOMEM;
1050
1050
}
1051
1051
1052
-
fd->raw = jffs2_link_node_ref(c, jeb, ofs | REF_PRISTINE, PAD(je32_to_cpu(rd->totlen)), ic);
1052
+
fd->raw = jffs2_link_node_ref(c, jeb, ofs | dirent_node_state(rd),
1053
+
PAD(je32_to_cpu(rd->totlen)), ic);
1053
1054
1054
1055
fd->next = NULL;
1055
1056
fd->version = je32_to_cpu(rd->version);
+14
-1
fs/jffs2/write.c
+14
-1
fs/jffs2/write.c
···
173
173
flash_ofs |= REF_NORMAL;
174
174
}
175
175
fn->raw = jffs2_add_physical_node_ref(c, flash_ofs, PAD(sizeof(*ri)+datalen), f->inocache);
176
+
if (IS_ERR(fn->raw)) {
177
+
void *hold_err = fn->raw;
178
+
/* Release the full_dnode which is now useless, and return */
179
+
jffs2_free_full_dnode(fn);
180
+
return ERR_PTR(PTR_ERR(hold_err));
181
+
}
176
182
fn->ofs = je32_to_cpu(ri->offset);
177
183
fn->size = je32_to_cpu(ri->dsize);
178
184
fn->frags = 0;
···
296
290
return ERR_PTR(ret?ret:-EIO);
297
291
}
298
292
/* Mark the space used */
299
-
fd->raw = jffs2_add_physical_node_ref(c, flash_ofs | REF_PRISTINE, PAD(sizeof(*rd)+namelen), f->inocache);
293
+
fd->raw = jffs2_add_physical_node_ref(c, flash_ofs | dirent_node_state(rd),
294
+
PAD(sizeof(*rd)+namelen), f->inocache);
295
+
if (IS_ERR(fd->raw)) {
296
+
void *hold_err = fd->raw;
297
+
/* Release the full_dirent which is now useless, and return */
298
+
jffs2_free_full_dirent(fd);
299
+
return ERR_PTR(PTR_ERR(hold_err));
300
+
}
300
301
301
302
if (retried) {
302
303
jffs2_dbg_acct_sanity_check(c,NULL);