Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
Pull SCSI fixes from James Bottomley:
"Small drivers fixes, except for ufs which has two large updates, one
for exposing the device level feature, which is a new addition to the
device spec and the other reworking the exynos driver to fix coherence
issues on some android phones"
* tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi:
scsi: megaraid_sas: Driver version update to 07.734.00.00-rc1
scsi: megaraid_sas: Block zero-length ATA VPD inquiry
scsi: scsi_transport_srp: Replace min/max nesting with clamp()
scsi: ufs: core: Add device level exception support
scsi: ufs: core: Rename ufshcd_wb_presrv_usrspc_keep_vcc_on()
scsi: smartpqi: Use is_kdump_kernel() to check for kdump
scsi: pm80xx: Set phy_attached to zero when device is gone
scsi: ufs: exynos: gs101: Put UFS device in reset on .suspend()
scsi: ufs: exynos: Move phy calls to .exit() callback
scsi: ufs: exynos: Enable PRDT pre-fetching with UFSHCD_CAP_CRYPTO
scsi: ufs: exynos: Ensure consistent phy reference counts
scsi: ufs: exynos: Disable iocc if dma-coherent property isn't set
scsi: ufs: exynos: Move UFS shareability value to drvdata
scsi: ufs: exynos: Ensure pre_link() executes before exynos_ufs_phy_init()
scsi: iscsi: Fix missing scsi_host_put() in error path
scsi: ufs: core: Fix a race condition related to device commands
scsi: hisi_sas: Fix I/O errors caused by hardware port ID changes
scsi: hisi_sas: Enable force phy when SATA disk directly connected
+299
-67
+32
Documentation/ABI/testing/sysfs-driver-ufs
+32
Documentation/ABI/testing/sysfs-driver-ufs
···
1604
1604
prevent the UFS from frequently performing clock gating/ungating.
1605
1605
1606
1606
The attribute is read/write.
1607
+
1608
+
What: /sys/bus/platform/drivers/ufshcd/*/device_lvl_exception_count
1609
+
What: /sys/bus/platform/devices/*.ufs/device_lvl_exception_count
1610
+
Date: March 2025
1611
+
Contact: Bao D. Nguyen <quic_nguyenb@quicinc.com>
1612
+
Description:
1613
+
This attribute is applicable to ufs devices compliant to the
1614
+
JEDEC specifications version 4.1 or later. The
1615
+
device_lvl_exception_count is a counter indicating the number of
1616
+
times the device level exceptions have occurred since the last
1617
+
time this variable is reset. Writing a 0 value to this
1618
+
attribute will reset the device_lvl_exception_count. If the
1619
+
device_lvl_exception_count reads a positive value, the user
1620
+
application should read the device_lvl_exception_id attribute to
1621
+
know more information about the exception.
1622
+
1623
+
The attribute is read/write.
1624
+
1625
+
What: /sys/bus/platform/drivers/ufshcd/*/device_lvl_exception_id
1626
+
What: /sys/bus/platform/devices/*.ufs/device_lvl_exception_id
1627
+
Date: March 2025
1628
+
Contact: Bao D. Nguyen <quic_nguyenb@quicinc.com>
1629
+
Description:
1630
+
Reading the device_lvl_exception_id returns the
1631
+
qDeviceLevelExceptionID attribute of the ufs device JEDEC
1632
+
specification version 4.1. The definition of the
1633
+
qDeviceLevelExceptionID is the ufs device vendor specific
1634
+
implementation. Refer to the device manufacturer datasheet for
1635
+
more information on the meaning of the qDeviceLevelExceptionID
1636
+
attribute value.
1637
+
1638
+
The attribute is read only.
+20
drivers/scsi/hisi_sas/hisi_sas_main.c
+20
drivers/scsi/hisi_sas/hisi_sas_main.c
···
935
935
container_of(work, typeof(*phy), works[event]);
936
936
struct hisi_hba *hisi_hba = phy->hisi_hba;
937
937
struct asd_sas_phy *sas_phy = &phy->sas_phy;
938
+
struct asd_sas_port *sas_port = sas_phy->port;
939
+
struct hisi_sas_port *port = phy->port;
940
+
struct device *dev = hisi_hba->dev;
941
+
struct domain_device *port_dev;
938
942
int phy_no = sas_phy->id;
943
+
944
+
if (!test_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags) &&
945
+
sas_port && port && (port->id != phy->port_id)) {
946
+
dev_info(dev, "phy%d's hw port id changed from %d to %llu\n",
947
+
phy_no, port->id, phy->port_id);
948
+
port_dev = sas_port->port_dev;
949
+
if (port_dev && !dev_is_expander(port_dev->dev_type)) {
950
+
/*
951
+
* Set the device state to gone to block
952
+
* sending IO to the device.
953
+
*/
954
+
set_bit(SAS_DEV_GONE, &port_dev->state);
955
+
hisi_sas_notify_phy_event(phy, HISI_PHYE_LINK_RESET);
956
+
return;
957
+
}
958
+
}
939
959
940
960
phy->wait_phyup_cnt = 0;
941
961
if (phy->identify.target_port_protocols == SAS_PROTOCOL_SSP)
+7
-2
drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
+7
-2
drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
···
2501
2501
struct hisi_sas_port *port = to_hisi_sas_port(sas_port);
2502
2502
struct sas_ata_task *ata_task = &task->ata_task;
2503
2503
struct sas_tmf_task *tmf = slot->tmf;
2504
+
int phy_id;
2504
2505
u8 *buf_cmd;
2505
2506
int has_data = 0, hdr_tag = 0;
2506
2507
u32 dw0, dw1 = 0, dw2 = 0;
···
2509
2508
/* create header */
2510
2509
/* dw0 */
2511
2510
dw0 = port->id << CMD_HDR_PORT_OFF;
2512
-
if (parent_dev && dev_is_expander(parent_dev->dev_type))
2511
+
if (parent_dev && dev_is_expander(parent_dev->dev_type)) {
2513
2512
dw0 |= 3 << CMD_HDR_CMD_OFF;
2514
-
else
2513
+
} else {
2514
+
phy_id = device->phy->identify.phy_identifier;
2515
+
dw0 |= (1U << phy_id) << CMD_HDR_PHY_ID_OFF;
2516
+
dw0 |= CMD_HDR_FORCE_PHY_MSK;
2515
2517
dw0 |= 4 << CMD_HDR_CMD_OFF;
2518
+
}
2516
2519
2517
2520
if (tmf && ata_task->force_phy) {
2518
2521
dw0 |= CMD_HDR_FORCE_PHY_MSK;
+12
-2
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
+12
-2
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
···
359
359
#define CMD_HDR_RESP_REPORT_MSK (0x1 << CMD_HDR_RESP_REPORT_OFF)
360
360
#define CMD_HDR_TLR_CTRL_OFF 6
361
361
#define CMD_HDR_TLR_CTRL_MSK (0x3 << CMD_HDR_TLR_CTRL_OFF)
362
+
#define CMD_HDR_PHY_ID_OFF 8
363
+
#define CMD_HDR_PHY_ID_MSK (0x1ff << CMD_HDR_PHY_ID_OFF)
364
+
#define CMD_HDR_FORCE_PHY_OFF 17
365
+
#define CMD_HDR_FORCE_PHY_MSK (0x1U << CMD_HDR_FORCE_PHY_OFF)
362
366
#define CMD_HDR_PORT_OFF 18
363
367
#define CMD_HDR_PORT_MSK (0xf << CMD_HDR_PORT_OFF)
364
368
#define CMD_HDR_PRIORITY_OFF 27
···
1433
1429
struct hisi_sas_cmd_hdr *hdr = slot->cmd_hdr;
1434
1430
struct asd_sas_port *sas_port = device->port;
1435
1431
struct hisi_sas_port *port = to_hisi_sas_port(sas_port);
1432
+
int phy_id;
1436
1433
u8 *buf_cmd;
1437
1434
int has_data = 0, hdr_tag = 0;
1438
1435
u32 dw1 = 0, dw2 = 0;
1439
1436
1440
1437
hdr->dw0 = cpu_to_le32(port->id << CMD_HDR_PORT_OFF);
1441
-
if (parent_dev && dev_is_expander(parent_dev->dev_type))
1438
+
if (parent_dev && dev_is_expander(parent_dev->dev_type)) {
1442
1439
hdr->dw0 |= cpu_to_le32(3 << CMD_HDR_CMD_OFF);
1443
-
else
1440
+
} else {
1441
+
phy_id = device->phy->identify.phy_identifier;
1442
+
hdr->dw0 |= cpu_to_le32((1U << phy_id)
1443
+
<< CMD_HDR_PHY_ID_OFF);
1444
+
hdr->dw0 |= CMD_HDR_FORCE_PHY_MSK;
1444
1445
hdr->dw0 |= cpu_to_le32(4U << CMD_HDR_CMD_OFF);
1446
+
}
1445
1447
1446
1448
switch (task->data_dir) {
1447
1449
case DMA_TO_DEVICE:
+2
-2
drivers/scsi/megaraid/megaraid_sas.h
+2
-2
drivers/scsi/megaraid/megaraid_sas.h
+7
-2
drivers/scsi/megaraid/megaraid_sas_base.c
+7
-2
drivers/scsi/megaraid/megaraid_sas_base.c
···
2103
2103
/* This sdev property may change post OCR */
2104
2104
megasas_set_dynamic_target_properties(sdev, lim, is_target_prop);
2105
2105
2106
+
if (!MEGASAS_IS_LOGICAL(sdev))
2107
+
sdev->no_vpd_size = 1;
2108
+
2106
2109
mutex_unlock(&instance->reset_mutex);
2107
2110
2108
2111
return 0;
···
3665
3662
3666
3663
case MFI_STAT_SCSI_IO_FAILED:
3667
3664
case MFI_STAT_LD_INIT_IN_PROGRESS:
3668
-
cmd->scmd->result =
3669
-
(DID_ERROR << 16) | hdr->scsi_status;
3665
+
if (hdr->scsi_status == 0xf0)
3666
+
cmd->scmd->result = (DID_ERROR << 16) | SAM_STAT_CHECK_CONDITION;
3667
+
else
3668
+
cmd->scmd->result = (DID_ERROR << 16) | hdr->scsi_status;
3670
3669
break;
3671
3670
3672
3671
case MFI_STAT_SCSI_DONE_WITH_ERROR:
+4
-1
drivers/scsi/megaraid/megaraid_sas_fusion.c
+4
-1
drivers/scsi/megaraid/megaraid_sas_fusion.c
···
2043
2043
2044
2044
case MFI_STAT_SCSI_IO_FAILED:
2045
2045
case MFI_STAT_LD_INIT_IN_PROGRESS:
2046
-
scmd->result = (DID_ERROR << 16) | ext_status;
2046
+
if (ext_status == 0xf0)
2047
+
scmd->result = (DID_ERROR << 16) | SAM_STAT_CHECK_CONDITION;
2048
+
else
2049
+
scmd->result = (DID_ERROR << 16) | ext_status;
2047
2050
break;
2048
2051
2049
2052
case MFI_STAT_SCSI_DONE_WITH_ERROR:
+1
drivers/scsi/pm8001/pm8001_sas.c
+1
drivers/scsi/pm8001/pm8001_sas.c
···
766
766
spin_lock_irqsave(&pm8001_ha->lock, flags);
767
767
}
768
768
PM8001_CHIP_DISP->dereg_dev_req(pm8001_ha, device_id);
769
+
pm8001_ha->phy[pm8001_dev->attached_phy].phy_attached = 0;
769
770
pm8001_free_dev(pm8001_dev);
770
771
} else {
771
772
pm8001_dbg(pm8001_ha, DISC, "Found dev has gone.\n");
+5
-2
drivers/scsi/scsi_transport_iscsi.c
+5
-2
drivers/scsi/scsi_transport_iscsi.c
···
3182
3182
}
3183
3183
3184
3184
/* see similar check in iscsi_if_set_param() */
3185
-
if (strlen(data) > ev->u.set_host_param.len)
3186
-
return -EINVAL;
3185
+
if (strlen(data) > ev->u.set_host_param.len) {
3186
+
err = -EINVAL;
3187
+
goto out;
3188
+
}
3187
3189
3188
3190
err = transport->set_host_param(shost, ev->u.set_host_param.param,
3189
3191
data, ev->u.set_host_param.len);
3192
+
out:
3190
3193
scsi_host_put(shost);
3191
3194
return err;
3192
3195
}
+1
-1
drivers/scsi/scsi_transport_srp.c
+1
-1
drivers/scsi/scsi_transport_srp.c
···
388
388
"reconnect attempt %d failed (%d)\n",
389
389
++rport->failed_reconnects, res);
390
390
delay = rport->reconnect_delay *
391
-
min(100, max(1, rport->failed_reconnects - 10));
391
+
clamp(rport->failed_reconnects - 10, 1, 100);
392
392
if (delay > 0)
393
393
queue_delayed_work(system_long_wq,
394
394
&rport->reconnect_work, delay * HZ);
+7
-6
drivers/scsi/smartpqi/smartpqi_init.c
+7
-6
drivers/scsi/smartpqi/smartpqi_init.c
···
19
19
#include <linux/bcd.h>
20
20
#include <linux/reboot.h>
21
21
#include <linux/cciss_ioctl.h>
22
+
#include <linux/crash_dump.h>
22
23
#include <scsi/scsi_host.h>
23
24
#include <scsi/scsi_cmnd.h>
24
25
#include <scsi/scsi_device.h>
···
5247
5246
ctrl_info->error_buffer_length =
5248
5247
ctrl_info->max_io_slots * PQI_ERROR_BUFFER_ELEMENT_LENGTH;
5249
5248
5250
-
if (reset_devices)
5249
+
if (is_kdump_kernel())
5251
5250
max_transfer_size = min(ctrl_info->max_transfer_size,
5252
5251
PQI_MAX_TRANSFER_SIZE_KDUMP);
5253
5252
else
···
5276
5275
u16 num_elements_per_iq;
5277
5276
u16 num_elements_per_oq;
5278
5277
5279
-
if (reset_devices) {
5278
+
if (is_kdump_kernel()) {
5280
5279
num_queue_groups = 1;
5281
5280
} else {
5282
5281
int num_cpus;
···
8289
8288
u32 product_id;
8290
8289
8291
8290
if (reset_devices) {
8292
-
if (pqi_is_fw_triage_supported(ctrl_info)) {
8291
+
if (is_kdump_kernel() && pqi_is_fw_triage_supported(ctrl_info)) {
8293
8292
rc = sis_wait_for_fw_triage_completion(ctrl_info);
8294
8293
if (rc)
8295
8294
return rc;
8296
8295
}
8297
-
if (sis_is_ctrl_logging_supported(ctrl_info)) {
8296
+
if (is_kdump_kernel() && sis_is_ctrl_logging_supported(ctrl_info)) {
8298
8297
sis_notify_kdump(ctrl_info);
8299
8298
rc = sis_wait_for_ctrl_logging_completion(ctrl_info);
8300
8299
if (rc)
···
8345
8344
ctrl_info->product_id = (u8)product_id;
8346
8345
ctrl_info->product_revision = (u8)(product_id >> 8);
8347
8346
8348
-
if (reset_devices) {
8347
+
if (is_kdump_kernel()) {
8349
8348
if (ctrl_info->max_outstanding_requests >
8350
8349
PQI_MAX_OUTSTANDING_REQUESTS_KDUMP)
8351
8350
ctrl_info->max_outstanding_requests =
···
8481
8480
if (rc)
8482
8481
return rc;
8483
8482
8484
-
if (ctrl_info->ctrl_logging_supported && !reset_devices) {
8483
+
if (ctrl_info->ctrl_logging_supported && !is_kdump_kernel()) {
8485
8484
pqi_host_setup_buffer(ctrl_info, &ctrl_info->ctrl_log_memory, PQI_CTRL_LOG_TOTAL_SIZE, PQI_CTRL_LOG_MIN_SIZE);
8486
8485
pqi_host_memory_update(ctrl_info, &ctrl_info->ctrl_log_memory, PQI_VENDOR_GENERAL_CTRL_LOG_MEMORY_UPDATE);
8487
8486
}
+54
drivers/ufs/core/ufs-sysfs.c
+54
drivers/ufs/core/ufs-sysfs.c
···
466
466
return sysfs_emit(buf, "%d\n", hba->critical_health_count);
467
467
}
468
468
469
+
static ssize_t device_lvl_exception_count_show(struct device *dev,
470
+
struct device_attribute *attr,
471
+
char *buf)
472
+
{
473
+
struct ufs_hba *hba = dev_get_drvdata(dev);
474
+
475
+
if (hba->dev_info.wspecversion < 0x410)
476
+
return -EOPNOTSUPP;
477
+
478
+
return sysfs_emit(buf, "%u\n", atomic_read(&hba->dev_lvl_exception_count));
479
+
}
480
+
481
+
static ssize_t device_lvl_exception_count_store(struct device *dev,
482
+
struct device_attribute *attr,
483
+
const char *buf, size_t count)
484
+
{
485
+
struct ufs_hba *hba = dev_get_drvdata(dev);
486
+
unsigned int value;
487
+
488
+
if (kstrtouint(buf, 0, &value))
489
+
return -EINVAL;
490
+
491
+
/* the only supported usecase is to reset the dev_lvl_exception_count */
492
+
if (value)
493
+
return -EINVAL;
494
+
495
+
atomic_set(&hba->dev_lvl_exception_count, 0);
496
+
497
+
return count;
498
+
}
499
+
500
+
static ssize_t device_lvl_exception_id_show(struct device *dev,
501
+
struct device_attribute *attr,
502
+
char *buf)
503
+
{
504
+
struct ufs_hba *hba = dev_get_drvdata(dev);
505
+
u64 exception_id;
506
+
int err;
507
+
508
+
ufshcd_rpm_get_sync(hba);
509
+
err = ufshcd_read_device_lvl_exception_id(hba, &exception_id);
510
+
ufshcd_rpm_put_sync(hba);
511
+
512
+
if (err)
513
+
return err;
514
+
515
+
hba->dev_lvl_exception_id = exception_id;
516
+
return sysfs_emit(buf, "%llu\n", exception_id);
517
+
}
518
+
469
519
static DEVICE_ATTR_RW(rpm_lvl);
470
520
static DEVICE_ATTR_RO(rpm_target_dev_state);
471
521
static DEVICE_ATTR_RO(rpm_target_link_state);
···
529
479
static DEVICE_ATTR_RW(rtc_update_ms);
530
480
static DEVICE_ATTR_RW(pm_qos_enable);
531
481
static DEVICE_ATTR_RO(critical_health);
482
+
static DEVICE_ATTR_RW(device_lvl_exception_count);
483
+
static DEVICE_ATTR_RO(device_lvl_exception_id);
532
484
533
485
static struct attribute *ufs_sysfs_ufshcd_attrs[] = {
534
486
&dev_attr_rpm_lvl.attr,
···
546
494
&dev_attr_rtc_update_ms.attr,
547
495
&dev_attr_pm_qos_enable.attr,
548
496
&dev_attr_critical_health.attr,
497
+
&dev_attr_device_lvl_exception_count.attr,
498
+
&dev_attr_device_lvl_exception_id.attr,
549
499
NULL
550
500
};
551
501
+1
drivers/ufs/core/ufshcd-priv.h
+1
drivers/ufs/core/ufshcd-priv.h
···
94
94
enum query_opcode desc_op);
95
95
96
96
int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable);
97
+
int ufshcd_read_device_lvl_exception_id(struct ufs_hba *hba, u64 *exception_id);
97
98
98
99
/* Wrapper functions for safely calling variant operations */
99
100
static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
+68
-24
drivers/ufs/core/ufshcd.c
+68
-24
drivers/ufs/core/ufshcd.c
···
3176
3176
int err;
3177
3177
3178
3178
retry:
3179
-
time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
3179
+
time_left = wait_for_completion_timeout(&hba->dev_cmd.complete,
3180
3180
time_left);
3181
3181
3182
3182
if (likely(time_left)) {
3183
-
/*
3184
-
* The completion handler called complete() and the caller of
3185
-
* this function still owns the @lrbp tag so the code below does
3186
-
* not trigger any race conditions.
3187
-
*/
3188
-
hba->dev_cmd.complete = NULL;
3189
3183
err = ufshcd_get_tr_ocs(lrbp, NULL);
3190
3184
if (!err)
3191
3185
err = ufshcd_dev_cmd_completion(hba, lrbp);
···
3193
3199
/* successfully cleared the command, retry if needed */
3194
3200
if (ufshcd_clear_cmd(hba, lrbp->task_tag) == 0)
3195
3201
err = -EAGAIN;
3196
-
hba->dev_cmd.complete = NULL;
3197
3202
return err;
3198
3203
}
3199
3204
···
3208
3215
spin_lock_irqsave(&hba->outstanding_lock, flags);
3209
3216
pending = test_bit(lrbp->task_tag,
3210
3217
&hba->outstanding_reqs);
3211
-
if (pending) {
3212
-
hba->dev_cmd.complete = NULL;
3218
+
if (pending)
3213
3219
__clear_bit(lrbp->task_tag,
3214
3220
&hba->outstanding_reqs);
3215
-
}
3216
3221
spin_unlock_irqrestore(&hba->outstanding_lock, flags);
3217
3222
3218
3223
if (!pending) {
···
3228
3237
spin_lock_irqsave(&hba->outstanding_lock, flags);
3229
3238
pending = test_bit(lrbp->task_tag,
3230
3239
&hba->outstanding_reqs);
3231
-
if (pending)
3232
-
hba->dev_cmd.complete = NULL;
3233
3240
spin_unlock_irqrestore(&hba->outstanding_lock, flags);
3234
3241
3235
3242
if (!pending) {
···
3261
3272
static int ufshcd_issue_dev_cmd(struct ufs_hba *hba, struct ufshcd_lrb *lrbp,
3262
3273
const u32 tag, int timeout)
3263
3274
{
3264
-
DECLARE_COMPLETION_ONSTACK(wait);
3265
3275
int err;
3266
3276
3267
-
hba->dev_cmd.complete = &wait;
3268
-
3269
3277
ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr);
3270
-
3271
3278
ufshcd_send_command(hba, tag, hba->dev_cmd_queue);
3272
3279
err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
3273
3280
···
5570
5585
ufshcd_release_scsi_cmd(hba, lrbp);
5571
5586
/* Do not touch lrbp after scsi done */
5572
5587
scsi_done(cmd);
5573
-
} else if (hba->dev_cmd.complete) {
5588
+
} else {
5574
5589
if (cqe) {
5575
5590
ocs = le32_to_cpu(cqe->status) & MASK_OCS;
5576
5591
lrbp->utr_descriptor_ptr->header.ocs = ocs;
5577
5592
}
5578
-
complete(hba->dev_cmd.complete);
5593
+
complete(&hba->dev_cmd.complete);
5579
5594
}
5580
5595
}
5581
5596
···
5998
6013
__func__, err);
5999
6014
}
6000
6015
6016
+
int ufshcd_read_device_lvl_exception_id(struct ufs_hba *hba, u64 *exception_id)
6017
+
{
6018
+
struct utp_upiu_query_v4_0 *upiu_resp;
6019
+
struct ufs_query_req *request = NULL;
6020
+
struct ufs_query_res *response = NULL;
6021
+
int err;
6022
+
6023
+
if (hba->dev_info.wspecversion < 0x410)
6024
+
return -EOPNOTSUPP;
6025
+
6026
+
ufshcd_hold(hba);
6027
+
mutex_lock(&hba->dev_cmd.lock);
6028
+
6029
+
ufshcd_init_query(hba, &request, &response,
6030
+
UPIU_QUERY_OPCODE_READ_ATTR,
6031
+
QUERY_ATTR_IDN_DEV_LVL_EXCEPTION_ID, 0, 0);
6032
+
6033
+
request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
6034
+
6035
+
err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
6036
+
6037
+
if (err) {
6038
+
dev_err(hba->dev, "%s: failed to read device level exception %d\n",
6039
+
__func__, err);
6040
+
goto out;
6041
+
}
6042
+
6043
+
upiu_resp = (struct utp_upiu_query_v4_0 *)response;
6044
+
*exception_id = get_unaligned_be64(&upiu_resp->osf3);
6045
+
out:
6046
+
mutex_unlock(&hba->dev_cmd.lock);
6047
+
ufshcd_release(hba);
6048
+
6049
+
return err;
6050
+
}
6051
+
6001
6052
static int __ufshcd_wb_toggle(struct ufs_hba *hba, bool set, enum flag_idn idn)
6002
6053
{
6003
6054
u8 index;
···
6104
6083
return ret;
6105
6084
}
6106
6085
6107
-
static bool ufshcd_wb_presrv_usrspc_keep_vcc_on(struct ufs_hba *hba,
6086
+
static bool ufshcd_wb_curr_buff_threshold_check(struct ufs_hba *hba,
6108
6087
u32 avail_buf)
6109
6088
{
6110
6089
u32 cur_buf;
···
6186
6165
}
6187
6166
6188
6167
/*
6189
-
* The ufs device needs the vcc to be ON to flush.
6190
6168
* With user-space reduction enabled, it's enough to enable flush
6191
6169
* by checking only the available buffer. The threshold
6192
6170
* defined here is > 90% full.
6193
6171
* With user-space preserved enabled, the current-buffer
6194
6172
* should be checked too because the wb buffer size can reduce
6195
6173
* when disk tends to be full. This info is provided by current
6196
-
* buffer (dCurrentWriteBoosterBufferSize). There's no point in
6197
-
* keeping vcc on when current buffer is empty.
6174
+
* buffer (dCurrentWriteBoosterBufferSize).
6198
6175
*/
6199
6176
index = ufshcd_wb_get_query_index(hba);
6200
6177
ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
···
6207
6188
if (!hba->dev_info.b_presrv_uspc_en)
6208
6189
return avail_buf <= UFS_WB_BUF_REMAIN_PERCENT(10);
6209
6190
6210
-
return ufshcd_wb_presrv_usrspc_keep_vcc_on(hba, avail_buf);
6191
+
return ufshcd_wb_curr_buff_threshold_check(hba, avail_buf);
6211
6192
}
6212
6193
6213
6194
static void ufshcd_rpm_dev_flush_recheck_work(struct work_struct *work)
···
6257
6238
if (status & hba->ee_drv_mask & MASK_EE_HEALTH_CRITICAL) {
6258
6239
hba->critical_health_count++;
6259
6240
sysfs_notify(&hba->dev->kobj, NULL, "critical_health");
6241
+
}
6242
+
6243
+
if (status & hba->ee_drv_mask & MASK_EE_DEV_LVL_EXCEPTION) {
6244
+
atomic_inc(&hba->dev_lvl_exception_count);
6245
+
sysfs_notify(&hba->dev->kobj, NULL, "device_lvl_exception_count");
6260
6246
}
6261
6247
6262
6248
ufs_debugfs_exception_event(hba, status);
···
8163
8139
}
8164
8140
}
8165
8141
8142
+
static void ufshcd_device_lvl_exception_probe(struct ufs_hba *hba, u8 *desc_buf)
8143
+
{
8144
+
u32 ext_ufs_feature;
8145
+
8146
+
if (hba->dev_info.wspecversion < 0x410)
8147
+
return;
8148
+
8149
+
ext_ufs_feature = get_unaligned_be32(desc_buf +
8150
+
DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
8151
+
if (!(ext_ufs_feature & UFS_DEV_LVL_EXCEPTION_SUP))
8152
+
return;
8153
+
8154
+
atomic_set(&hba->dev_lvl_exception_count, 0);
8155
+
ufshcd_enable_ee(hba, MASK_EE_DEV_LVL_EXCEPTION);
8156
+
}
8157
+
8166
8158
static void ufshcd_set_rtt(struct ufs_hba *hba)
8167
8159
{
8168
8160
struct ufs_dev_info *dev_info = &hba->dev_info;
···
8378
8338
}
8379
8339
8380
8340
ufs_init_rtc(hba, desc_buf);
8341
+
8342
+
ufshcd_device_lvl_exception_probe(hba, desc_buf);
8381
8343
8382
8344
/*
8383
8345
* ufshcd_read_string_desc returns size of the string
···
10531
10489
hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
10532
10490
UFS_SLEEP_PWR_MODE,
10533
10491
UIC_LINK_HIBERN8_STATE);
10492
+
10493
+
init_completion(&hba->dev_cmd.complete);
10534
10494
10535
10495
err = ufshcd_hba_init(hba);
10536
10496
if (err)
+63
-22
drivers/ufs/host/ufs-exynos.c
+63
-22
drivers/ufs/host/ufs-exynos.c
···
34
34
* Exynos's Vendor specific registers for UFSHCI
35
35
*/
36
36
#define HCI_TXPRDT_ENTRY_SIZE 0x00
37
-
#define PRDT_PREFECT_EN BIT(31)
37
+
#define PRDT_PREFETCH_EN BIT(31)
38
38
#define HCI_RXPRDT_ENTRY_SIZE 0x04
39
39
#define HCI_1US_TO_CNT_VAL 0x0C
40
40
#define CNT_VAL_1US_MASK 0x3FF
···
92
92
UIC_TRANSPORT_NO_CONNECTION_RX |\
93
93
UIC_TRANSPORT_BAD_TC)
94
94
95
-
/* FSYS UFS Shareability */
96
-
#define UFS_WR_SHARABLE BIT(2)
97
-
#define UFS_RD_SHARABLE BIT(1)
98
-
#define UFS_SHARABLE (UFS_WR_SHARABLE | UFS_RD_SHARABLE)
99
-
#define UFS_SHAREABILITY_OFFSET 0x710
95
+
/* UFS Shareability */
96
+
#define UFS_EXYNOSAUTO_WR_SHARABLE BIT(2)
97
+
#define UFS_EXYNOSAUTO_RD_SHARABLE BIT(1)
98
+
#define UFS_EXYNOSAUTO_SHARABLE (UFS_EXYNOSAUTO_WR_SHARABLE | \
99
+
UFS_EXYNOSAUTO_RD_SHARABLE)
100
+
#define UFS_GS101_WR_SHARABLE BIT(1)
101
+
#define UFS_GS101_RD_SHARABLE BIT(0)
102
+
#define UFS_GS101_SHARABLE (UFS_GS101_WR_SHARABLE | \
103
+
UFS_GS101_RD_SHARABLE)
104
+
#define UFS_SHAREABILITY_OFFSET 0x710
100
105
101
106
/* Multi-host registers */
102
107
#define MHCTRL 0xC4
···
214
209
/* IO Coherency setting */
215
210
if (ufs->sysreg) {
216
211
return regmap_update_bits(ufs->sysreg,
217
-
ufs->shareability_reg_offset,
218
-
UFS_SHARABLE, UFS_SHARABLE);
212
+
ufs->iocc_offset,
213
+
ufs->iocc_mask, ufs->iocc_val);
219
214
}
220
215
221
216
return 0;
···
962
957
}
963
958
964
959
phy_set_bus_width(generic_phy, ufs->avail_ln_rx);
960
+
961
+
if (generic_phy->power_count) {
962
+
phy_power_off(generic_phy);
963
+
phy_exit(generic_phy);
964
+
}
965
+
965
966
ret = phy_init(generic_phy);
966
967
if (ret) {
967
968
dev_err(hba->dev, "%s: phy init failed, ret = %d\n",
···
1060
1049
exynos_ufs_config_intr(ufs, DFES_DEF_L4_ERRS, UNIPRO_L4);
1061
1050
exynos_ufs_set_unipro_pclk_div(ufs);
1062
1051
1052
+
exynos_ufs_setup_clocks(hba, true, PRE_CHANGE);
1053
+
1063
1054
/* unipro */
1064
1055
exynos_ufs_config_unipro(ufs);
1056
+
1057
+
if (ufs->drv_data->pre_link)
1058
+
ufs->drv_data->pre_link(ufs);
1065
1059
1066
1060
/* m-phy */
1067
1061
exynos_ufs_phy_init(ufs);
···
1074
1058
exynos_ufs_config_phy_time_attr(ufs);
1075
1059
exynos_ufs_config_phy_cap_attr(ufs);
1076
1060
}
1077
-
1078
-
exynos_ufs_setup_clocks(hba, true, PRE_CHANGE);
1079
-
1080
-
if (ufs->drv_data->pre_link)
1081
-
ufs->drv_data->pre_link(ufs);
1082
1061
1083
1062
return 0;
1084
1063
}
···
1098
1087
struct exynos_ufs *ufs = ufshcd_get_variant(hba);
1099
1088
struct phy *generic_phy = ufs->phy;
1100
1089
struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr;
1090
+
u32 val = ilog2(DATA_UNIT_SIZE);
1101
1091
1102
1092
exynos_ufs_establish_connt(ufs);
1103
1093
exynos_ufs_fit_aggr_timeout(ufs);
1104
1094
1105
1095
hci_writel(ufs, 0xa, HCI_DATA_REORDER);
1106
-
hci_writel(ufs, ilog2(DATA_UNIT_SIZE), HCI_TXPRDT_ENTRY_SIZE);
1096
+
1097
+
if (hba->caps & UFSHCD_CAP_CRYPTO)
1098
+
val |= PRDT_PREFETCH_EN;
1099
+
hci_writel(ufs, val, HCI_TXPRDT_ENTRY_SIZE);
1100
+
1107
1101
hci_writel(ufs, ilog2(DATA_UNIT_SIZE), HCI_RXPRDT_ENTRY_SIZE);
1108
1102
hci_writel(ufs, (1 << hba->nutrs) - 1, HCI_UTRL_NEXUS_TYPE);
1109
1103
hci_writel(ufs, (1 << hba->nutmrs) - 1, HCI_UTMRL_NEXUS_TYPE);
···
1184
1168
ufs->sysreg = NULL;
1185
1169
else {
1186
1170
if (of_property_read_u32_index(np, "samsung,sysreg", 1,
1187
-
&ufs->shareability_reg_offset)) {
1171
+
&ufs->iocc_offset)) {
1188
1172
dev_warn(dev, "can't get an offset from sysreg. Set to default value\n");
1189
-
ufs->shareability_reg_offset = UFS_SHAREABILITY_OFFSET;
1173
+
ufs->iocc_offset = UFS_SHAREABILITY_OFFSET;
1190
1174
}
1191
1175
}
1176
+
1177
+
ufs->iocc_mask = ufs->drv_data->iocc_mask;
1178
+
/*
1179
+
* no 'dma-coherent' property means the descriptors are
1180
+
* non-cacheable so iocc shareability should be disabled.
1181
+
*/
1182
+
if (of_dma_is_coherent(dev->of_node))
1183
+
ufs->iocc_val = ufs->iocc_mask;
1184
+
else
1185
+
ufs->iocc_val = 0;
1192
1186
1193
1187
ufs->pclk_avail_min = PCLK_AVAIL_MIN;
1194
1188
ufs->pclk_avail_max = PCLK_AVAIL_MAX;
···
1523
1497
return ret;
1524
1498
}
1525
1499
1500
+
static void exynos_ufs_exit(struct ufs_hba *hba)
1501
+
{
1502
+
struct exynos_ufs *ufs = ufshcd_get_variant(hba);
1503
+
1504
+
phy_power_off(ufs->phy);
1505
+
phy_exit(ufs->phy);
1506
+
}
1507
+
1526
1508
static int exynos_ufs_host_reset(struct ufs_hba *hba)
1527
1509
{
1528
1510
struct exynos_ufs *ufs = ufshcd_get_variant(hba);
···
1701
1667
}
1702
1668
}
1703
1669
1670
+
static int gs101_ufs_suspend(struct exynos_ufs *ufs)
1671
+
{
1672
+
hci_writel(ufs, 0 << 0, HCI_GPIO_OUT);
1673
+
return 0;
1674
+
}
1675
+
1704
1676
static int exynos_ufs_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op,
1705
1677
enum ufs_notify_change_status status)
1706
1678
{
···
1714
1674
1715
1675
if (status == PRE_CHANGE)
1716
1676
return 0;
1677
+
1678
+
if (ufs->drv_data->suspend)
1679
+
ufs->drv_data->suspend(ufs);
1717
1680
1718
1681
if (!ufshcd_is_link_active(hba))
1719
1682
phy_power_off(ufs->phy);
···
1995
1952
static const struct ufs_hba_variant_ops ufs_hba_exynos_ops = {
1996
1953
.name = "exynos_ufs",
1997
1954
.init = exynos_ufs_init,
1955
+
.exit = exynos_ufs_exit,
1998
1956
.hce_enable_notify = exynos_ufs_hce_enable_notify,
1999
1957
.link_startup_notify = exynos_ufs_link_startup_notify,
2000
1958
.pwr_change_notify = exynos_ufs_pwr_change_notify,
···
2034
1990
2035
1991
static void exynos_ufs_remove(struct platform_device *pdev)
2036
1992
{
2037
-
struct ufs_hba *hba = platform_get_drvdata(pdev);
2038
-
struct exynos_ufs *ufs = ufshcd_get_variant(hba);
2039
-
2040
1993
ufshcd_pltfrm_remove(pdev);
2041
-
2042
-
phy_power_off(ufs->phy);
2043
-
phy_exit(ufs->phy);
2044
1994
}
2045
1995
2046
1996
static struct exynos_ufs_uic_attr exynos7_uic_attr = {
···
2073
2035
.opts = EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL |
2074
2036
EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR |
2075
2037
EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX,
2038
+
.iocc_mask = UFS_EXYNOSAUTO_SHARABLE,
2076
2039
.drv_init = exynosauto_ufs_drv_init,
2077
2040
.post_hce_enable = exynosauto_ufs_post_hce_enable,
2078
2041
.pre_link = exynosauto_ufs_pre_link,
···
2175
2136
.opts = EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR |
2176
2137
EXYNOS_UFS_OPT_UFSPR_SECURE |
2177
2138
EXYNOS_UFS_OPT_TIMER_TICK_SELECT,
2139
+
.iocc_mask = UFS_GS101_SHARABLE,
2178
2140
.drv_init = gs101_ufs_drv_init,
2179
2141
.pre_link = gs101_ufs_pre_link,
2180
2142
.post_link = gs101_ufs_post_link,
2181
2143
.pre_pwr_change = gs101_ufs_pre_pwr_change,
2144
+
.suspend = gs101_ufs_suspend,
2182
2145
};
2183
2146
2184
2147
static const struct of_device_id exynos_ufs_of_match[] = {
+5
-1
drivers/ufs/host/ufs-exynos.h
+5
-1
drivers/ufs/host/ufs-exynos.h
···
181
181
struct exynos_ufs_uic_attr *uic_attr;
182
182
unsigned int quirks;
183
183
unsigned int opts;
184
+
u32 iocc_mask;
184
185
/* SoC's specific operations */
185
186
int (*drv_init)(struct exynos_ufs *ufs);
186
187
int (*pre_link)(struct exynos_ufs *ufs);
···
192
191
const struct ufs_pa_layer_attr *pwr);
193
192
int (*pre_hce_enable)(struct exynos_ufs *ufs);
194
193
int (*post_hce_enable)(struct exynos_ufs *ufs);
194
+
int (*suspend)(struct exynos_ufs *ufs);
195
195
};
196
196
197
197
struct ufs_phy_time_cfg {
···
232
230
ktime_t entry_hibern8_t;
233
231
const struct exynos_ufs_drv_data *drv_data;
234
232
struct regmap *sysreg;
235
-
u32 shareability_reg_offset;
233
+
u32 iocc_offset;
234
+
u32 iocc_mask;
235
+
u32 iocc_val;
236
236
237
237
u32 opts;
238
238
#define EXYNOS_UFS_OPT_HAS_APB_CLK_CTRL BIT(0)
+4
-1
include/ufs/ufs.h
+4
-1
include/ufs/ufs.h
···
180
180
QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE = 0x1D,
181
181
QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST = 0x1E,
182
182
QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE = 0x1F,
183
-
QUERY_ATTR_IDN_TIMESTAMP = 0x30
183
+
QUERY_ATTR_IDN_TIMESTAMP = 0x30,
184
+
QUERY_ATTR_IDN_DEV_LVL_EXCEPTION_ID = 0x34,
184
185
};
185
186
186
187
/* Descriptor idn for Query requests */
···
391
390
UFS_DEV_EXT_TEMP_NOTIF = BIT(6),
392
391
UFS_DEV_HPB_SUPPORT = BIT(7),
393
392
UFS_DEV_WRITE_BOOSTER_SUP = BIT(8),
393
+
UFS_DEV_LVL_EXCEPTION_SUP = BIT(12),
394
394
};
395
395
#define UFS_DEV_HPB_SUPPORT_VERSION 0x310
396
396
···
421
419
MASK_EE_TOO_LOW_TEMP = BIT(4),
422
420
MASK_EE_WRITEBOOSTER_EVENT = BIT(5),
423
421
MASK_EE_PERFORMANCE_THROTTLING = BIT(6),
422
+
MASK_EE_DEV_LVL_EXCEPTION = BIT(7),
424
423
MASK_EE_HEALTH_CRITICAL = BIT(9),
425
424
};
426
425
#define MASK_EE_URGENT_TEMP (MASK_EE_TOO_HIGH_TEMP | MASK_EE_TOO_LOW_TEMP)
+6
-1
include/ufs/ufshcd.h
+6
-1
include/ufs/ufshcd.h
···
246
246
struct ufs_dev_cmd {
247
247
enum dev_cmd_type type;
248
248
struct mutex lock;
249
-
struct completion *complete;
249
+
struct completion complete;
250
250
struct ufs_query query;
251
251
};
252
252
···
968
968
* @pm_qos_req: PM QoS request handle
969
969
* @pm_qos_enabled: flag to check if pm qos is enabled
970
970
* @critical_health_count: count of critical health exceptions
971
+
* @dev_lvl_exception_count: count of device level exceptions since last reset
972
+
* @dev_lvl_exception_id: vendor specific information about the
973
+
* device level exception event.
971
974
*/
972
975
struct ufs_hba {
973
976
void __iomem *mmio_base;
···
1141
1138
bool pm_qos_enabled;
1142
1139
1143
1140
int critical_health_count;
1141
+
atomic_t dev_lvl_exception_count;
1142
+
u64 dev_lvl_exception_id;
1144
1143
};
1145
1144
1146
1145
/**